JPH02101544A - Extension function board - Google Patents

Extension function board

Info

Publication number
JPH02101544A
JPH02101544A JP63255077A JP25507788A JPH02101544A JP H02101544 A JPH02101544 A JP H02101544A JP 63255077 A JP63255077 A JP 63255077A JP 25507788 A JP25507788 A JP 25507788A JP H02101544 A JPH02101544 A JP H02101544A
Authority
JP
Japan
Prior art keywords
signal
circuit
switch
conditions
trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63255077A
Other languages
Japanese (ja)
Inventor
Akira Tsuchiya
土屋 晃
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63255077A priority Critical patent/JPH02101544A/en
Publication of JPH02101544A publication Critical patent/JPH02101544A/en
Pending legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To facilitate analysis from the reciprocal relation of hardware and software by providing a circuit setting the conditions of plural signals with respect to an external trigger input signal. CONSTITUTION:A condition setting switch 6 sets the conditions with respect to one signal. When the jumper of the switch 6 is set in the position of a first jumper switch 6a, the signal becomes invalid with respect to a trigger condition. When it set in the position of a second jumper switch 6b, the signal becomes valid when it becomes L for the trigger signal. When it is set in the position of a third jumper switch 6c, it becomes valid when it is in H. Respective signals generated in the trigger condition setting circuit 3 are inputted to an AND circuit 4, and a signal output pin 5 becomes H when all input signals are H. ICE (in-circuit emulator) or the like fetch signals from the signal output pin 5 into an external trigger input line, and set the conditions for executing a program with setting H to be the external trigger condition.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はOA機器等に用いられる拡張機能ボードに関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an extended function board used in OA equipment and the like.

〔従来の技術〕[Conventional technology]

従来、この種の拡張機能ボードは、拡張パス上の各信号
をそのまま延長してコネクタ部等に出力していた。
Conventionally, this type of expansion function board extends each signal on the expansion path as it is and outputs it to a connector section or the like.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の拡張機能ボードにおいては、拡張パス上
の信号をそのまま延長して出力しているため、In−C
1reult Imulator (以下ICEと言う
)等の外部トリガ入力を利用して・・−ドウエアやソフ
トウェアの解析、評価を行なう時に1つの信号条件でプ
ログラム実行を中断できるが、複数の信号条件でプログ
ラム実行を中断ずゐことができない。したがって、ハー
ドウェアとソフトウェアとの相互関係を解析するとき、
特Kas−ドウエアのパス関係は複数の信号条件での中
断が必要なため、従来の拡張機能ボードでは解析が困難
であった。
In the conventional expansion function board mentioned above, the signal on the expansion path is extended and output as is, so the In-C
Using an external trigger input such as a 1reult Imulator (hereinafter referred to as ICE)... - When analyzing or evaluating hardware or software, program execution can be interrupted with one signal condition, but it is not possible to interrupt program execution with multiple signal conditions. I can't do it without interruption. Therefore, when analyzing the interrelationship between hardware and software,
Since the path relationship between special Kas and software requires interruptions under multiple signal conditions, it has been difficult to analyze with conventional expansion function boards.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の拡張機能ボードは前述した従来の問題に鑑みて
なされた本のであ)、トリガ信号発生ボード上に各外部
トリガ入力信号に対しての条件設定用ジャンパスイッチ
等を含むトリガ条件設定回路と、全ての条件が成立し死
時に出力信号を変化させる論理積回路とを有している。
The extended function board of the present invention was created in view of the above-mentioned conventional problems), and includes a trigger condition setting circuit including jumper switches for setting conditions for each external trigger input signal on the trigger signal generation board. , and an AND circuit that changes the output signal when all conditions are met and the device dies.

〔作用〕[Effect]

本発明においては、外部トリガ入力に複数の信号の条件
を設定できる。
In the present invention, multiple signal conditions can be set for the external trigger input.

〔実施例〕〔Example〕

次に本発明について図閘を参照して説明する。 Next, the present invention will be explained with reference to the drawing board.

第1図は本発明の一実施例による拡張機能ボードの構成
を示す平面図である。同図において、1はトリガ信号発
生ボード、2a〜2ntf外部トリガ信号入力端子、3
はトリガ条件設定回路、4は論理積回路、5は信号出力
ピンである。
FIG. 1 is a plan view showing the configuration of an extended function board according to an embodiment of the present invention. In the figure, 1 is a trigger signal generation board, 2a to 2ntf external trigger signal input terminals, 3
4 is a trigger condition setting circuit, 4 is an AND circuit, and 5 is a signal output pin.

第2図はトリガ入力信号SK対するトリガ条件設定回路
3の一例を示し丸ものであ夛、このトリガ条件設定回路
3には例えば1つのトリガ入力信号Sに対して第1のジ
ャンパスイッチ6m、第2のジャンパスイッチ6bおよ
び第3のジャンパスイッチ6Cを有する条件設定スイッ
チ6が接続されている。
FIG. 2 shows an example of the trigger condition setting circuit 3 for the trigger input signal SK. A condition setting switch 6 having two jumper switches 6b and a third jumper switch 6C is connected.

このように構成された拡張機能ボードにおいて、条件設
定スイッチ6によLlつの信号に対する条件が設定され
る。この条件設定スイッチ6のジャンパ設定を第1のジ
ャンパスイッチ6aの位置にした場合、その信号はトリ
ガ条件に対して無効となる。また、第2のジャンパスイ
ッチ6bの位置にした場合、その信号はトリガ条件に対
してロウレベルの時に有効と々シ、マた、第3のジャン
パスイッチ6cの位置にした場合はハイレベルの時に有
効となる。そして、トリガ条件設定回路3によシ生成さ
れた各信号は、論理積回路4に入力され、入力信号の全
てがノ・イレベルの条件の時に信号出力ピン5はハイレ
ベルとなる。また、ICE等は信号出力ピン5からの信
号を外部トリガ入力ラインに取込み、・・イレペルを外
部トリガ条件としてプログラム実行の中断を行なうこと
ができる。
In the extended function board configured in this manner, conditions for L1 signals are set by the condition setting switch 6. When the jumper setting of the condition setting switch 6 is set to the first jumper switch 6a, the signal becomes invalid for the trigger condition. Also, when the second jumper switch 6b is set to the position, the signal is valid when it is at a low level in response to the trigger condition, and when the third jumper switch 6c is set to the position, the signal is valid when it is at a high level. becomes. Each signal generated by the trigger condition setting circuit 3 is input to the AND circuit 4, and when all the input signals are at the no-y level, the signal output pin 5 becomes high level. Further, the ICE etc. can take in the signal from the signal output pin 5 to the external trigger input line, and interrupt the program execution by using an irregularity as an external trigger condition.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ICE等の外部トリガ入
力に複数の信号の条件を設定できるので、ハードウェア
とソフトウェアとの相互関係からの解析が容易となる効
果がある。
As described above, the present invention has the effect of facilitating analysis from the mutual relationship between hardware and software, since conditions for a plurality of signals can be set for external trigger input such as ICE.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の拡張機能ボードの平面図、第2図はト
リガ条件設定回路例である。 1・・・・トリガ信号発生ボード、21〜2n・・・・
入力信号端子、311・・・トリガ条件設定回路、4a
・・・論理積回路、5・・・・トリガ信号出力ビン、6
・・・・条件設定スイッチ、6at6b+6c ・・・
・ジャンパスイッチ。
FIG. 1 is a plan view of an extended function board of the present invention, and FIG. 2 is an example of a trigger condition setting circuit. 1...Trigger signal generation board, 21~2n...
Input signal terminal, 311... trigger condition setting circuit, 4a
...AND circuit, 5...Trigger signal output bin, 6
...Condition setting switch, 6at6b+6c...
・Jumper switch.

Claims (1)

【特許請求の範囲】[Claims] トリガ信号発生ボード上に各外部トリガ入力信号に対し
て条件設定用ジャンパスイッチを有するトリガ条件設定
回路と、全ての条件が成立したときに出力信号を変化さ
せる論理積回路とを備えたことを特徴とする拡張機能ボ
ード。
The trigger condition setting circuit has a jumper switch for setting conditions for each external trigger input signal on the trigger signal generation board, and an AND circuit that changes the output signal when all conditions are met. Extension function board.
JP63255077A 1988-10-11 1988-10-11 Extension function board Pending JPH02101544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63255077A JPH02101544A (en) 1988-10-11 1988-10-11 Extension function board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63255077A JPH02101544A (en) 1988-10-11 1988-10-11 Extension function board

Publications (1)

Publication Number Publication Date
JPH02101544A true JPH02101544A (en) 1990-04-13

Family

ID=17273815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63255077A Pending JPH02101544A (en) 1988-10-11 1988-10-11 Extension function board

Country Status (1)

Country Link
JP (1) JPH02101544A (en)

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