JPH0197613U - - Google Patents
Info
- Publication number
- JPH0197613U JPH0197613U JP19460187U JP19460187U JPH0197613U JP H0197613 U JPH0197613 U JP H0197613U JP 19460187 U JP19460187 U JP 19460187U JP 19460187 U JP19460187 U JP 19460187U JP H0197613 U JPH0197613 U JP H0197613U
- Authority
- JP
- Japan
- Prior art keywords
- input
- terminal
- resistor
- switch element
- microphone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims 1
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Control Of Amplification And Gain Control (AREA)
Description
第１図及び第２図は本考案の実施例の説明回路
図である。
図中１，２は入力端子、３はホツト側、４は出
力側、６はアテネータ、８はマイクロホンアンプ
、Ｂは＋Ｂ電源、Ｄはドレーン端子、ＧはＧ端子
、Ｑはスイツチ素子、Ｑ２は増幅回路、ＳはＳ端
子である。
1 and 2 are explanatory circuit diagrams of an embodiment of the present invention. In the figure, 1 and 2 are input terminals, 3 is the hot side, 4 is the output side, 6 is the attenuator, 8 is the microphone amplifier, B is the +B power supply, D is the drain terminal, G is the G terminal, Q is the switch element, and Q2 is the In the amplifier circuit, S is the S terminal.
Claims (1)
入力端子１，２間に入力抵抗Ｒ１を接続し、ホツ
ト側端子１を、抵抗Ｒ２を経て＋Ｂ電源Ｂへ接続
するとともに、入力カツプリングコンデンサＣ１
を経て、増幅回路Ｑ２の入力側へそれぞれ接続し
、増幅回路Ｑ２の入力ホツト側３と、出力側４間
に抵抗Ｒ５を接続し、それと並列に抵抗Ｒ４の一
端を出力側４に、他端をスイツチング回路５のス
イツチ素子ＱのＳ端子Ｓにそれぞれ接続し、スイ
ツチ素子ＱのＤ端子Ｄを増幅回路Ｑ２の入力端子
３に、スイツチ素子ＱのＧ端子Ｇを入力端子１に
それぞれ接続したことを特徴とするマイクロホン
アンプの自動利得調節回路。 In the microphone amplifier 8, an input resistor R1 is connected between the microphone input terminals 1 and 2, and the hot side terminal 1 is connected to the +B power supply B via the resistor R2, and an input coupling capacitor C1 is connected to the input resistor R1.
A resistor R5 is connected between the input hot side 3 and the output side 4 of the amplifier circuit Q2, and in parallel, one end of the resistor R4 is connected to the output side 4, and the other end is connected to the input side of the amplifier circuit Q2. are connected to the S terminal S of the switch element Q of the switching circuit 5, the D terminal D of the switch element Q is connected to the input terminal 3 of the amplifier circuit Q2, and the G terminal G of the switch element Q is connected to the input terminal 1. An automatic gain adjustment circuit for microphone amplifiers featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19460187U JPH0197613U (en) | 1987-12-21 | 1987-12-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19460187U JPH0197613U (en) | 1987-12-21 | 1987-12-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0197613U true JPH0197613U (en) | 1989-06-29 |
Family
ID=31485324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19460187U Pending JPH0197613U (en) | 1987-12-21 | 1987-12-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0197613U (en) |
-
1987
- 1987-12-21 JP JP19460187U patent/JPH0197613U/ja active Pending
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