JPH0193121A - Semiconductor wafer baking device - Google Patents
Semiconductor wafer baking deviceInfo
- Publication number
- JPH0193121A JPH0193121A JP24971687A JP24971687A JPH0193121A JP H0193121 A JPH0193121 A JP H0193121A JP 24971687 A JP24971687 A JP 24971687A JP 24971687 A JP24971687 A JP 24971687A JP H0193121 A JPH0193121 A JP H0193121A
- Authority
- JP
- Japan
- Prior art keywords
- wafers
- heater
- temperature
- time
- heated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 235000012431 wafers Nutrition 0.000 claims abstract description 36
- 238000010438 heat treatment Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 abstract description 15
- 238000001816 cooling Methods 0.000 abstract description 3
- 230000000630 rising effect Effects 0.000 abstract 1
- 239000003643 water by type Substances 0.000 abstract 1
- 230000032258 transport Effects 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体ウェハのベーキング装置に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a semiconductor wafer baking apparatus.
(従来の技術とその問題点)
半導体ウェハのベーキング装置としては従来、露光・現
像後のハードベークを、ウェハ25枚あるいは50枚を
一度にバッチ炉で行っていた。この方式によれば、処理
は約30〜50分で終了するが、バッチ炉の性質上、炉
内の位置によって昇温速度、温度分布が違うため、ウェ
ハ間でベーキング条件が異なり、製品品質のばらつきの
一因となっていた。上記欠点を回避するため、特開昭5
8−78629号のように、ウェハ加熱をホットプレー
トで行い、均一の温度で、しかも温度の立ち上がりをも
良好にする方法がある。しかしながら、この方法はうエ
バ裏面をプレートに接触させ加熱する方法であり、ウェ
ハ上面のレジストが加熱されるまで若干の時間を要する
こと、そして接触式の性質上、1枚ずつプレート上で処
理するため、つ亙ハ25枚あるいは50枚を処理するた
めには長時間要し、スルー・プツトが低下すると言う問
題があった。(Prior Art and its Problems) Conventionally, semiconductor wafer baking equipment has used a batch furnace to hard bake 25 or 50 wafers at a time after exposure and development. According to this method, the process is completed in about 30 to 50 minutes, but due to the nature of batch furnaces, the heating rate and temperature distribution differ depending on the position in the furnace, so the baking conditions differ between wafers, which may affect product quality. This was a cause of variation. In order to avoid the above drawbacks,
There is a method, as in No. 8-78629, in which the wafer is heated with a hot plate to achieve a uniform temperature and a good temperature rise. However, this method heats the back side of the evaporator by bringing it into contact with the plate, and it takes some time for the resist on the top surface of the wafer to heat up. Also, due to the nature of the contact method, each wafer is processed on the plate one by one. Therefore, there is a problem that it takes a long time to process 25 or 50 sheets, and the throughput decreases.
本発明の目的は、加熱されるまでの時間を短縮し、多数
のウェハを処理しても均一な温度分布を保ちながら、短
時間で操作できるベーキング装置を提供することである
。An object of the present invention is to provide a baking apparatus that can be operated in a short time while reducing the time required for heating and maintaining uniform temperature distribution even when processing a large number of wafers.
(問題点を解決するための手段)
本発明の半導体ウェハベーキング装置は、温度コントロ
ーラを備えた棒状ヒーターを平行に複数本並べ、少な(
とも半導体ウェハを2枚以上加熱できる長さを有するヒ
ーター部を形成し、さらに同ヒーター部の下部に連続的
に該ウェハを搬送する搬送部を備えたことを特徴とする
。(Means for Solving the Problems) The semiconductor wafer baking apparatus of the present invention has a plurality of rod-shaped heaters each equipped with a temperature controller arranged in parallel.
The present invention is characterized by forming a heater section having a length capable of heating two or more semiconductor wafers, and further comprising a transport section below the heater section for continuously transporting the wafers.
本発明の装置は、ベーキング温度と時間の設定により、
ヒーター部は温度コントローラを中継してウェハ温度を
所定温度に保持して、ウェハをベーキングし、搬送部は
搬送系コントローラを中継してウェハを所定時間でヒー
ター部を通過するようにする。The device of the present invention allows baking to be performed by setting the baking temperature and time.
The heater section relays the temperature controller to maintain the wafer temperature at a predetermined temperature and bakes the wafer, and the transfer section relays the transfer system controller so that the wafer passes through the heater section in a predetermined time.
以下、本発明を図面に基づき説明する。Hereinafter, the present invention will be explained based on the drawings.
第1図において、ヒーター部1は赤外線ヒーター、ハロ
ゲンランプ等の昇温速度の高い棒状ヒーター2を平行に
複数本並べ、少なくとも半導体ウェハ3を2枚以上加熱
できる長さにする。同ヒーター部1の下部に連続的にウ
ェハ3を搬送する搬送部には、テーブルローラー等の搬
送ローラー4を配置する。ヒーター部1は温度コントロ
ーラ5を備え、搬送ローラー4は搬送系コントローラ6
を備える。制御装置7は予め設定されたベーキング温度
および時間を、温度コントローラ5および搬送系コント
ローラ6に信号で送出し、コントローラ5および6から
の情報を入力すると共に制御する。ここでは、搬送ロー
ラー4の回転数制御によりウェハの通過時間を制御して
いる。ローグー部8からヒーター部の下部を通過して加
熱された半導体ウェハ3は、冷却帯9を通過して冷却さ
れ、アンローダ一部10に達する。In FIG. 1, a heater section 1 has a plurality of rod-shaped heaters 2 such as infrared heaters, halogen lamps, etc., which have a high temperature increase rate, arranged in parallel and have a length that can heat at least two or more semiconductor wafers 3. A transport roller 4 such as a table roller is disposed in a transport section that continuously transports the wafer 3 to the lower part of the heater section 1 . The heater section 1 is equipped with a temperature controller 5, and the conveyance roller 4 is equipped with a conveyance system controller 6.
Equipped with. The control device 7 sends a preset baking temperature and time to the temperature controller 5 and the transport system controller 6 as signals, inputs information from the controllers 5 and 6, and controls the baking temperature and time. Here, the passage time of the wafer is controlled by controlling the rotation speed of the transport roller 4. The heated semiconductor wafer 3 passes through the lower part of the heater section from the log section 8, passes through the cooling zone 9, is cooled, and reaches the unloader section 10.
(実施例)
本発明法として前記第1図に示したような装置を用いて
、ヒーター部の全長をウェハが5枚程入る長さにした。(Example) As the method of the present invention, an apparatus as shown in FIG. 1 was used, and the total length of the heater section was set to a length that could accommodate about five wafers.
従来法の装置として上述の接触式の装置を用い、ホット
プレートを用いて1枚ずつ処理した。In the conventional method, the above-mentioned contact type device was used, and each sheet was processed using a hot plate.
上記2法につき、ウェハ(6インチウェハ)50枚を処
理し、処理時間と温度分布を比較した。Fifty wafers (6-inch wafers) were processed using the above two methods, and the processing time and temperature distribution were compared.
それぞれ1枚のウェハにつき、130℃で5分間ずつ加
熱した。Each wafer was heated at 130° C. for 5 minutes.
50枚のウェハを全部処理した時間は、本発明法では5
6分、従来法では256分であった。本発明法は従来法
に比べ約115である。The time it takes to process all 50 wafers is 5 minutes using the method of the present invention.
6 minutes, compared to 256 minutes using the conventional method. The method of the present invention is about 115 compared to the conventional method.
第2図は本発明法(○)と従来法(・)によるウェハ中
心からの距離(横軸)と温度(縦軸)との関係を示す温
度分布測定図である。FIG. 2 is a temperature distribution measurement diagram showing the relationship between the distance from the wafer center (horizontal axis) and temperature (vertical axis) according to the present invention method (◯) and the conventional method (•).
本発明法も、従来法も、温度分布は良好であるが(く±
2℃)である。しかし、本発明法が目標の130℃付近
であるのに対し、従来法では127〜128℃である。Both the method of the present invention and the conventional method have good temperature distribution.
2°C). However, the temperature in the method of the present invention is around the target of 130°C, whereas in the conventional method, the temperature is 127 to 128°C.
これは、ホットプレートが130℃であっても電熱し、
ウェハ表面に達するまでに温度降下するためである。This heats up even when the hot plate is at 130℃,
This is because the temperature drops before reaching the wafer surface.
(発明の効果)
本発明によれば、
■ 赤外線ヒーター、ハロゲンランプ等の急熱可能なヒ
ーターを用いることができ、この加熱により、ベーキン
グ温度まで5秒以内で昇温可能となる。(Effects of the Invention) According to the present invention, (1) A heater capable of rapid heating such as an infrared heater or a halogen lamp can be used, and by this heating, the temperature can be raised to the baking temperature within 5 seconds.
■ 棒状ヒーター列を直角にウェハが進むのでヒーター
とヒーター間の温度低下を防止することができる。■ Since the wafer advances at right angles to the row of rod-shaped heaters, it is possible to prevent a drop in temperature between the heaters.
■ さらにウェハ直径の1.5倍以上の長さを有するヒ
ーターを用いることにより、ウェハのヒーター軸方向の
温度分布を±2℃以内に納めることが可能となる。(2) Furthermore, by using a heater having a length of at least 1.5 times the wafer diameter, it is possible to keep the temperature distribution of the wafer in the heater axis direction within ±2°C.
■ 多数のウェハについて、処理時間を大幅に短縮する
ことができる。■ Processing time can be significantly reduced for large numbers of wafers.
第1図は、本発明実施例によるベーキング装置を説明す
2概路線図、
第2図は、本発明法(○)と従来法(・)によるウェハ
中心からの距離(横軸)と温度(縦軸)との関係を示す
温度分布を示すグラフである。
1・・・ヒーター部 2・・・棒状ヒーター3・
・・半導体ウェハ 4・・・搬送ローラー5・・・
温度コントローラ 6・・・搬送系コントローラ7・・
・制御装置 ゛ 8・・・ローダ一部9・・・冷
却帯 10・・・アンローダ一部。Fig. 1 is a schematic diagram illustrating a baking apparatus according to an embodiment of the present invention, and Fig. 2 shows distance from the wafer center (horizontal axis) and temperature ( 3 is a graph showing temperature distribution showing the relationship with the vertical axis). 1... Heater section 2... Rod-shaped heater 3.
...Semiconductor wafer 4...Transport roller 5...
Temperature controller 6...Transport system controller 7...
・Control device ゛ 8... Part of the loader 9... Cooling zone 10... Part of the unloader.
Claims (1)
複数本並べ、少なくとも半導体ウェハを2枚以上加熱で
きる長さを有するヒーター部を形成し、さらに同ヒータ
ー部の下部に連続的に該ウェハを搬送する搬送部を備え
た半導体ウェハベーキング装置。(1) A plurality of rod-shaped heaters equipped with temperature controllers are arranged in parallel to form a heater section having a length capable of heating at least two semiconductor wafers, and the wafers are continuously conveyed to the lower part of the heater section. Semiconductor wafer baking equipment equipped with a transport section.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24971687A JPH0193121A (en) | 1987-10-05 | 1987-10-05 | Semiconductor wafer baking device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24971687A JPH0193121A (en) | 1987-10-05 | 1987-10-05 | Semiconductor wafer baking device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0193121A true JPH0193121A (en) | 1989-04-12 |
Family
ID=17197137
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24971687A Pending JPH0193121A (en) | 1987-10-05 | 1987-10-05 | Semiconductor wafer baking device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0193121A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01248626A (en) * | 1988-03-30 | 1989-10-04 | Fujitsu Ltd | Device for heat treatment of wafer |
JPH023910A (en) * | 1988-06-21 | 1990-01-09 | Tokyo Electron Ltd | Heating equipment |
US5191451A (en) * | 1990-04-20 | 1993-03-02 | Sharp Kabushiki Kaisha | Active matrix display device having drain electrodes of the pair of tfts being symmetrically formed with respect to the central plane to prevent the flicker due to the different parasitic capacitances |
JPH06104269A (en) * | 1992-08-07 | 1994-04-15 | Mitsubishi Materials Corp | Heat treatment device of semiconductor wafer |
JP2007158253A (en) * | 2005-12-08 | 2007-06-21 | Tokyo Electron Ltd | Heat treatment equipment |
JP2007158088A (en) * | 2005-12-06 | 2007-06-21 | Tokyo Electron Ltd | Heat-treating apparatus, heat-treatment method, control program, and computer-readable storage medium |
CN102468200A (en) * | 2010-11-16 | 2012-05-23 | 东京毅力科创株式会社 | Heat processing apparatus |
-
1987
- 1987-10-05 JP JP24971687A patent/JPH0193121A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01248626A (en) * | 1988-03-30 | 1989-10-04 | Fujitsu Ltd | Device for heat treatment of wafer |
JPH023910A (en) * | 1988-06-21 | 1990-01-09 | Tokyo Electron Ltd | Heating equipment |
US5191451A (en) * | 1990-04-20 | 1993-03-02 | Sharp Kabushiki Kaisha | Active matrix display device having drain electrodes of the pair of tfts being symmetrically formed with respect to the central plane to prevent the flicker due to the different parasitic capacitances |
JPH06104269A (en) * | 1992-08-07 | 1994-04-15 | Mitsubishi Materials Corp | Heat treatment device of semiconductor wafer |
JP2007158088A (en) * | 2005-12-06 | 2007-06-21 | Tokyo Electron Ltd | Heat-treating apparatus, heat-treatment method, control program, and computer-readable storage medium |
JP4672538B2 (en) * | 2005-12-06 | 2011-04-20 | 東京エレクトロン株式会社 | Heat treatment device |
JP2007158253A (en) * | 2005-12-08 | 2007-06-21 | Tokyo Electron Ltd | Heat treatment equipment |
CN102468200A (en) * | 2010-11-16 | 2012-05-23 | 东京毅力科创株式会社 | Heat processing apparatus |
JP2012109324A (en) * | 2010-11-16 | 2012-06-07 | Tokyo Electron Ltd | Heat treatment apparatus |
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