JPH0191953U - - Google Patents

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Publication number
JPH0191953U
JPH0191953U JP18642887U JP18642887U JPH0191953U JP H0191953 U JPH0191953 U JP H0191953U JP 18642887 U JP18642887 U JP 18642887U JP 18642887 U JP18642887 U JP 18642887U JP H0191953 U JPH0191953 U JP H0191953U
Authority
JP
Japan
Prior art keywords
signal
interrupt
irq signal
irq
control device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18642887U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18642887U priority Critical patent/JPH0191953U/ja
Publication of JPH0191953U publication Critical patent/JPH0191953U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本案に係る割込み制御装置と割込み要
求装置との信号の流れを示す図、第2図は第1図
に示した信号のタイムチヤート、第3図は第1図
に示した入力ラツチ部の一構成例を図である。 102……割込制御装置、103……iRQ信
号の入力ラツチ部。
FIG. 1 is a diagram showing the flow of signals between the interrupt control device and the interrupt request device according to the present invention, FIG. 2 is a time chart of the signals shown in FIG. 1, and FIG. 3 is a diagram showing the input latch shown in FIG. 1. FIG. 102...Interrupt control device, 103...iRQ signal input latch section.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1つあるいは複数の割込み要求装置からの割込
み要求信号(以下iRQ信号と略す)を評価し、
また、その評価結果に基いて中央処理装置(以下
CPUと略す)に対して割込み信号(以下iNT
信号と略す)を出力する割込み制御装置において
、iRQ信号をラツチする装置を設けたことを特
徴とする割込み制御装置。
Evaluating an interrupt request signal (hereinafter abbreviated as iRQ signal) from one or more interrupt request devices,
Based on the evaluation results, an interrupt signal (hereinafter referred to as iNT) is sent to the central processing unit (hereinafter referred to as CPU).
1. An interrupt control device for outputting an iRQ signal (abbreviated as “iRQ signal”), characterized in that the interrupt control device is provided with a device for latching an iRQ signal.
JP18642887U 1987-12-09 1987-12-09 Pending JPH0191953U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18642887U JPH0191953U (en) 1987-12-09 1987-12-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18642887U JPH0191953U (en) 1987-12-09 1987-12-09

Publications (1)

Publication Number Publication Date
JPH0191953U true JPH0191953U (en) 1989-06-16

Family

ID=31477657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18642887U Pending JPH0191953U (en) 1987-12-09 1987-12-09

Country Status (1)

Country Link
JP (1) JPH0191953U (en)

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