JPH0184155U

JPH0184155U -

Info

Publication number: JPH0184155U
Application number: JP1987177443U
Authority: JP
Priority date: 1987-11-20
Filing date: 1987-11-20
Publication date: 1989-06-05

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例を対向して適用して
いる場合を示すブロツク図、第２図は第１図にお
ける主要な信号の送出タイミングの一例を示すタ
イミング図、第３図は従来のインタフエース装置
を対向して使用している場合の使用の一例を示す
ブロツク図、第４図は第３図に示す従来のインタ
フエース装置における要求信号、確認信号及びデ
ータの送出タイミングの一例を示すタイミング図
である。１，２……インタフエース装置、３……要求信
号線、３ａ，３ｂ……要求信号発生回路、４―１
……確認信号線、４―１ａ，４―１ｂ……要求確
認信号受信回路、４―２……転送確認信号線、４
―２ａ，４―２ｂ……転送確認信号送受信回路、
５……データ線、６ａ，６ｂ……データ処理回路
、７ａ，７ｂ……バツフア、１０ａ，１０ｂ……
保留フラグ発生回路、１１，１２……従来のイン
タフエース装置、１３……要求信号線、１３ａ，
１３ｂ……信号発生回路、１４……確認信号線、
１４ａ，１４ｂ……信号受信回路、１５……デー
タ線、１６ａ，１６ｂ……データ処理回路、１７
ａ，１７ｂ……バツフア。 Fig. 1 is a block diagram showing a case where an embodiment of the present invention is applied facing each other, Fig. 2 is a timing diagram showing an example of the sending timing of the main signals in Fig. 1, and Fig. 3 is a conventional one. FIG. 4 is a block diagram showing an example of usage when two interface devices are used facing each other. FIG. 1, 2...Interface device, 3...Request signal line, 3a, 3b...Request signal generation circuit, 4-1
...Confirmation signal line, 4-1a, 4-1b...Request confirmation signal receiving circuit, 4-2...Transfer confirmation signal line, 4
-2a, 4-2b...Transfer confirmation signal transmission/reception circuit,
5...Data line, 6a, 6b...Data processing circuit, 7a, 7b...Buffer, 10a, 10b...
Pending flag generation circuit, 11, 12... Conventional interface device, 13... Request signal line, 13a,
13b...Signal generation circuit, 14...Confirmation signal line,
14a, 14b...signal receiving circuit, 15...data line, 16a, 16b...data processing circuit, 17
a, 17b...Batsuhua.

Claims

[Scope of utility model registration request]

In an interface device having a sending circuit that sends out a request signal for requesting permission to transfer information and a receiving circuit that receives a confirmation signal for the request signal, preparation for receiving the information via a transfer confirmation signal line is completed. and a confirmation signal transmitting/receiving circuit that transmits a signal indicating completion of reception of the information when receiving the information, and receives a signal when transmitting the information;
An interface device characterized by comprising the confirmation signal transmitting/receiving circuit and a flag generating circuit that generates a signal indicating that the information is in a transmitting/receiving state based on a signal from the receiving circuit.