JPH0172727U - - Google Patents
Info
- Publication number
- JPH0172727U JPH0172727U JP1987169379U JP16937987U JPH0172727U JP H0172727 U JPH0172727 U JP H0172727U JP 1987169379 U JP1987169379 U JP 1987169379U JP 16937987 U JP16937987 U JP 16937987U JP H0172727 U JPH0172727 U JP H0172727U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- control circuit
- subtraction
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Tests Of Electronic Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169379U JPH0172727U (cs) | 1987-11-04 | 1987-11-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169379U JPH0172727U (cs) | 1987-11-04 | 1987-11-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0172727U true JPH0172727U (cs) | 1989-05-16 |
Family
ID=31459383
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987169379U Pending JPH0172727U (cs) | 1987-11-04 | 1987-11-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0172727U (cs) |
-
1987
- 1987-11-04 JP JP1987169379U patent/JPH0172727U/ja active Pending
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