JPH0161747U - - Google Patents

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Publication number
JPH0161747U
JPH0161747U JP15568087U JP15568087U JPH0161747U JP H0161747 U JPH0161747 U JP H0161747U JP 15568087 U JP15568087 U JP 15568087U JP 15568087 U JP15568087 U JP 15568087U JP H0161747 U JPH0161747 U JP H0161747U
Authority
JP
Japan
Prior art keywords
data
output
parallel data
bit
format
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15568087U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15568087U priority Critical patent/JPH0161747U/ja
Publication of JPH0161747U publication Critical patent/JPH0161747U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例に係るシリアルデー
タ出力装置の回路ブロツク図、第2図はその回路
の動作を示すタイミングチヤート、第3図は2の
補数形式のデータを示す図、第4図は無符号絶対
値形式のデータを示す図である。 A〜A15,B〜B15……ゲート群、1
5〜18……4ビツトフリツプフロツプ。
FIG. 1 is a circuit block diagram of a serial data output device according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the circuit, FIG. 3 is a diagram showing data in two's complement format, and FIG. The figure shows data in an unsigned absolute value format. A0 to A15 , B0 to B15 ...Gate group, 1
5-18...4-bit flip-flop.

Claims (1)

【実用新案登録請求の範囲】 入力するパラレルデータをシリアルデータに変
換し出力するデータ出力装置において、 前記パラレルデータの最上位ビツトを先頭ビツ
トとして出力するかあるいは最下位ビツトを先頭
ビツトとして出力するかを選択する第1の選択手
段と、 前記パラレルデータの最上位ビツトを反転する
か否かを選択することにより、前記パラレルデー
タを2の補数形式、もしくは無符号絶対値形式の
データに変換して出力するかあるいは前記パラレ
ルデータのデータ形式のまま出力するかを選択す
る第2の選択手段とを有することを特徴とするシ
リアルデータ出力装置。
[Claims for Utility Model Registration] In a data output device that converts input parallel data into serial data and outputs it, whether the most significant bit of the parallel data is output as the first bit or the least significant bit is output as the first bit. and converting the parallel data into two's complement format or unsigned absolute value format data by selecting whether or not to invert the most significant bit of the parallel data. and second selection means for selecting whether to output the parallel data or to output the parallel data in its data format.
JP15568087U 1987-10-12 1987-10-12 Pending JPH0161747U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15568087U JPH0161747U (en) 1987-10-12 1987-10-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15568087U JPH0161747U (en) 1987-10-12 1987-10-12

Publications (1)

Publication Number Publication Date
JPH0161747U true JPH0161747U (en) 1989-04-19

Family

ID=31433525

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15568087U Pending JPH0161747U (en) 1987-10-12 1987-10-12

Country Status (1)

Country Link
JP (1) JPH0161747U (en)

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