JPS58101235U - keyboard encoder - Google Patents

keyboard encoder

Info

Publication number
JPS58101235U
JPS58101235U JP19304281U JP19304281U JPS58101235U JP S58101235 U JPS58101235 U JP S58101235U JP 19304281 U JP19304281 U JP 19304281U JP 19304281 U JP19304281 U JP 19304281U JP S58101235 U JPS58101235 U JP S58101235U
Authority
JP
Japan
Prior art keywords
keyboard encoder
key
keyboard
abstract
keys
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19304281U
Other languages
Japanese (ja)
Inventor
小出 澄男
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP19304281U priority Critical patent/JPS58101235U/en
Publication of JPS58101235U publication Critical patent/JPS58101235U/en
Pending legal-status Critical Current

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  • Input From Keyboards Or The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のキーマトリクスを説明するための図、第
2図はキーマトリクスの3キ一押下時の回り込みを説明
するための図、第3図は本考案によるキーボードエンコ
ーダの回路を説明するための回路図である。 図面に於いて、2はキーマトリクス、3はマルチプレク
サ、4はデコーダ、5はキースキャン用カウンタ、6は
押下キー計数用カウンタ、7はフリップフロップ回路、
8はディレィ及びストローブ発生回路をそれぞれ示す。
Fig. 1 is a diagram for explaining a conventional key matrix, Fig. 2 is a diagram for explaining wraparound when three keys of the key matrix are pressed, and Fig. 3 is a diagram for explaining the circuit of the keyboard encoder according to the present invention. FIG. In the drawing, 2 is a key matrix, 3 is a multiplexer, 4 is a decoder, 5 is a key scan counter, 6 is a counter for counting pressed keys, 7 is a flip-flop circuit,
8 indicates a delay and strobe generation circuit, respectively.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] キーマトリクスのキー押下により各キーにそれぞれ対応
したコードを送出するキーボードエンコーダにおいて、
3キ一以上の同時押下があった場合にコードの送出を禁
止する機能をもったことを特徴とするキーボードエンコ
ーダ。
In a keyboard encoder that sends a code corresponding to each key by pressing a key in a key matrix,
A keyboard encoder characterized by having a function of prohibiting code transmission when three or more keys are pressed simultaneously.
JP19304281U 1981-12-28 1981-12-28 keyboard encoder Pending JPS58101235U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19304281U JPS58101235U (en) 1981-12-28 1981-12-28 keyboard encoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19304281U JPS58101235U (en) 1981-12-28 1981-12-28 keyboard encoder

Publications (1)

Publication Number Publication Date
JPS58101235U true JPS58101235U (en) 1983-07-09

Family

ID=30106416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19304281U Pending JPS58101235U (en) 1981-12-28 1981-12-28 keyboard encoder

Country Status (1)

Country Link
JP (1) JPS58101235U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61143829A (en) * 1984-12-14 1986-07-01 Canon Inc Keyboard device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122928A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Keyboard control circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54122928A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Keyboard control circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61143829A (en) * 1984-12-14 1986-07-01 Canon Inc Keyboard device

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