JPH0161730U - - Google Patents
Info
- Publication number
- JPH0161730U JPH0161730U JP15631787U JP15631787U JPH0161730U JP H0161730 U JPH0161730 U JP H0161730U JP 15631787 U JP15631787 U JP 15631787U JP 15631787 U JP15631787 U JP 15631787U JP H0161730 U JPH0161730 U JP H0161730U
- Authority
- JP
- Japan
- Prior art keywords
- microprocessor
- signal source
- computer
- frequency
- control means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Description
第１図はこの考案の一実施例を示す要部構成図
、第２図は従来例を示す要部構成図、第３図は従
来例における周波数の切り換えタイミングを示す
タイミングチヤートである。
１……マイクロプロセツサ、８……可変システ
ム・クロツク信号源、１０……マイクロプロセツ
サ負荷検出装置（制御手段）。なお、図中同一符
号は同一又は相当部分を示す。
FIG. 1 is a block diagram of main parts showing an embodiment of this invention, FIG. 2 is a block diagram of main parts showing a conventional example, and FIG. 3 is a timing chart showing frequency switching timing in the conventional example. 1...Microprocessor, 8...Variable system clock signal source, 10...Microprocessor load detection device (control means). Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
ツクを供給するためのクロツク信号源を備え、マ
イクロプロセツサを異なる周波数のクロツクで動
作可能としたコンピユータにおいて、 上記クロツク信号源を周波数可変の１つの信号
源で構成するとともに、この信号源の周波数を制
御する制御手段を備えたことを特徴とするコンピ
ユータ。 (2) 制御手段は、マイクロプロセツサの負荷状
態を検出して負荷の大小に応じてクロツク信号源
の周波数を制御するマイクロプロセツサ負荷検出
装置から成ることを特徴とする実用新案登録請求
の範囲第１項記載のコンピユータ。[Claims for Utility Model Registration] (1) In a computer that is equipped with a clock signal source for supplying clocks of different frequencies to a microprocessor and that enables the microprocessor to operate with clocks of different frequencies, What is claimed is: 1. A computer comprising: a single frequency-variable signal source; and a control means for controlling the frequency of the signal source. (2) The scope of the utility model registration claim characterized in that the control means comprises a microprocessor load detection device that detects the load state of the microprocessor and controls the frequency of the clock signal source according to the magnitude of the load. The computer described in paragraph 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15631787U JPH0161730U (en) | 1987-10-13 | 1987-10-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15631787U JPH0161730U (en) | 1987-10-13 | 1987-10-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0161730U true JPH0161730U (en) | 1989-04-19 |
Family
ID=31434751
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15631787U Pending JPH0161730U (en) | 1987-10-13 | 1987-10-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0161730U (en) |
-
1987
- 1987-10-13 JP JP15631787U patent/JPH0161730U/ja active Pending
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