JPH0159332U - - Google Patents
Info
- Publication number
- JPH0159332U JPH0159332U JP15399887U JP15399887U JPH0159332U JP H0159332 U JPH0159332 U JP H0159332U JP 15399887 U JP15399887 U JP 15399887U JP 15399887 U JP15399887 U JP 15399887U JP H0159332 U JPH0159332 U JP H0159332U
- Authority
- JP
- Japan
- Prior art keywords
- output
- input
- matrix switch
- switch circuit
- branch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案によるマトリクススイツチ回路
の一実施例を示す構成図、第２図は本考案による
マトリクススイツチ回路を使用して増設を行つた
場合の実施例を示す構成図、第３図は従来のマト
リクススイツチ回路を使用して増設を行つた場合
の一例を示す構成図である。
１―１〜１―ｎ……分岐回路、２……入力ｎ、
出力ｍのマトリクススイツチ回路、３―１〜３−
ｍ……選択回路、４―１〜４―４……マトリクス
スイツチ回路、Ｘ１〜Ｘｎ……行方向入力端子、
ＥＸ１〜ＥＸｎ……行方向増設端子、Ｙ１〜Ｙｍ
……列方向出力端子、ＥＹ１〜ＥＹｍ……列方向
増設端子。
Fig. 1 is a block diagram showing an embodiment of the matrix switch circuit according to the present invention, Fig. 2 is a block diagram showing an embodiment in which the matrix switch circuit according to the present invention is expanded. FIG. 2 is a configuration diagram showing an example of an expansion using a conventional matrix switch circuit. 1-1 to 1-n...branch circuit, 2...input n,
Matrix switch circuit with output m, 3-1 to 3-
m...Selection circuit, 4-1 to 4-4...Matrix switch circuit, X1 to Xn...Row direction input terminal,
EX 1 ~ EXn... Row direction expansion terminal, Y 1 ~ Ym
...Column direction output terminal, EY1 to EYm...Column direction expansion terminal.
Claims (1)
出力ｍのマトリクススイツチ回路と、２つの入力
を選択して一方を出力する複数の選択回路とから
構成され、前記マトリクススイツチ回路の入力は
各分岐回路の一方の出力に接続し出力は各選択回
路の一方の入力に接続し、前記各分岐回路の入力
を行方向入力端子とし前記マトリクススイツチ回
路に接続されていない方の分岐出力を行方向増設
端子とし、前記各選択回路の出力を列方向出力端
子とし前記マトリクススイツチ回路に接続されて
いない方の入力を列方向増設端子とするようにし
たことを特徴とするマトリクススイツチ回路。 A plurality of branch circuits that branch the input into two, and an input n,
It is composed of a matrix switch circuit with output m, and a plurality of selection circuits that select two inputs and output one of them.The input of the matrix switch circuit is connected to one output of each branch circuit, and the output is connected to each selection circuit. The input of each of the branch circuits is used as a row direction input terminal, the branch output not connected to the matrix switch circuit is used as a row direction extension terminal, and the output of each of the selection circuits is a column direction output. A matrix switch circuit characterized in that the input terminal that is not connected to the matrix switch circuit is used as a column direction expansion terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15399887U JPH0159332U (en) | 1987-10-09 | 1987-10-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15399887U JPH0159332U (en) | 1987-10-09 | 1987-10-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0159332U true JPH0159332U (en) | 1989-04-13 |
Family
ID=31430334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15399887U Pending JPH0159332U (en) | 1987-10-09 | 1987-10-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0159332U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010210608A (en) * | 2009-03-11 | 2010-09-24 | Star Technologies Inc | Construction method of combinatorial switching matrix and test system of semiconductor device thereof |
-
1987
- 1987-10-09 JP JP15399887U patent/JPH0159332U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010210608A (en) * | 2009-03-11 | 2010-09-24 | Star Technologies Inc | Construction method of combinatorial switching matrix and test system of semiconductor device thereof |
| US8310264B2 (en) | 2009-03-11 | 2012-11-13 | Star Technologies Inc. | Method for configuring combinational switching matrix and testing system for semiconductor devices using the same |
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