JPH0150934B2 - - Google Patents

Info

Publication number
JPH0150934B2
JPH0150934B2 JP56052415A JP5241581A JPH0150934B2 JP H0150934 B2 JPH0150934 B2 JP H0150934B2 JP 56052415 A JP56052415 A JP 56052415A JP 5241581 A JP5241581 A JP 5241581A JP H0150934 B2 JPH0150934 B2 JP H0150934B2
Authority
JP
Japan
Prior art keywords
operand
instruction
address
register
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56052415A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57168345A (en
Inventor
Takayuki Morioka
Takeshi Kato
Tadaaki Bando
Hidekazu Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5241581A priority Critical patent/JPS57168345A/ja
Publication of JPS57168345A publication Critical patent/JPS57168345A/ja
Publication of JPH0150934B2 publication Critical patent/JPH0150934B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP5241581A 1981-04-09 1981-04-09 Data processing device Granted JPS57168345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5241581A JPS57168345A (en) 1981-04-09 1981-04-09 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5241581A JPS57168345A (en) 1981-04-09 1981-04-09 Data processing device

Publications (2)

Publication Number Publication Date
JPS57168345A JPS57168345A (en) 1982-10-16
JPH0150934B2 true JPH0150934B2 (en, 2012) 1989-11-01

Family

ID=12914150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5241581A Granted JPS57168345A (en) 1981-04-09 1981-04-09 Data processing device

Country Status (1)

Country Link
JP (1) JPS57168345A (en, 2012)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072028A (ja) * 1983-09-28 1985-04-24 Hitachi Ltd デ−タ処理装置
JPS62117038A (ja) * 1985-11-15 1987-05-28 Mitsubishi Electric Corp マイクロプログラム制御装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5441039A (en) * 1977-09-08 1979-03-31 Nec Corp Processing unit of high level language program

Also Published As

Publication number Publication date
JPS57168345A (en) 1982-10-16

Similar Documents

Publication Publication Date Title
US12235773B2 (en) Two address translations from a single table look-aside buffer read
US4648034A (en) Busy signal interface between master and slave processors in a computer system
US4586130A (en) Central processing unit for a digital computer
US4897787A (en) Data processing system
JP3203401B2 (ja) データ処理装置
JPH0477925A (ja) マイクロプロセッサ
US4005391A (en) Peripheral interrupt priority resolution in a micro program data processor having plural levels of subinstruction sets
JPH04233640A (ja) メモリ拡張スキームを切り替える疑似直線バンクを有するマイクロコントローラ
JPS5847053B2 (ja) デ−タ処理装置
US6687808B2 (en) Data processor using indirect register addressing
US4812971A (en) Central processing unit for a digital computer
EP0240606B1 (en) Pipe-line processing system and microprocessor using the system
JPS623461B2 (en, 2012)
US5404471A (en) Method and apparatus for switching address generation modes in CPU having plural address generation modes
JPH027097B2 (en, 2012)
JPH0150934B2 (en, 2012)
US4758978A (en) Method and apparatus for selectively evaluating an effective address for a coprocessor
US5187782A (en) Data processing system
JP3027627B2 (ja) プログラマブルコントローラの演算プロセッサ
JP3644892B2 (ja) 複数組の命令組を実行するためのデータ処理装置
JPS63163929A (ja) マイクロプロセツサ
WO1984000833A1 (en) Pre-execution next address calculating mechanism
JPH0524537B2 (en, 2012)
JPH0241770B2 (en, 2012)
JPS6160458B2 (en, 2012)