JPH0149035B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for producing a multilayer printing plate in which a planar circuit is formed using electroless plated layers.

Conventional technology Multilayer printed wiring boards are made by stacking printed wiring boards with circuits formed on both sides, interposing prepreg in the middle, and performing lamination pressing. After the lamination is integrated, through holes are made and chemical copper plating is performed. It is manufactured by electrolytic copper plating and etching.

Problems to be Solved by the Invention In the conventional manufacturing method for multilayer printed wiring boards, the inner layer circuit pattern has unevenness, and when laminating multiple layers of printed circuit boards using prepreg, air bubbles cannot be completely expelled to the outside, resulting in adhesive voids. There are drawbacks that occur. To counter this void, a thick prepreg was used and lamination pressing had to be carried out for a long time under high temperature and pressure, resulting in poor workability.

Means for Solving the Problems The present invention uses an insulating substrate as a base material in which an adhesive containing a plating catalyst is applied on the upper surface of an insulating substrate containing a plating catalyst, and a plating resist layer is formed on this base material. The surface of the adhesive is roughened, an electroless copper plating layer is provided, and a planar circuit is formed on the inner layer. After applying a non-containing insulating layer and further applying an adhesive, a plating resist layer is formed at predetermined locations, the surface of the exposed adhesive is chemically roughened, and a hole is made through the wiring board. This is a method for manufacturing a multilayer printed wiring board in which through holes and a planar circuit on the outer layer are formed by immersing it in an electrolytic plating bath.

Example 0.8 mm thick paper phenol resin insulation board 1 (ACL/manufactured by Hitachi Chemical Co., Ltd.) coated with plating catalyst-containing adhesive 2 (model HA21, made by Hitachi Chemical Co., Ltd.)
141S type) as the base material 3 (Fig. 2), and on this base material 3, apply plating resist ink 4 (HGM-02BK-1 manufactured by Hitachi Chemical Co., Ltd.) using a screen printing method to mark out the areas where no circuit pattern will be provided. After printing, this plating resist ink 4 is heated at a temperature of 160° C. for 30 minutes to harden to form a plating resist layer 4 (FIG. 3). The surface of the adhesive 2 on which the plating resist layer 4 is not formed is chemically roughened 5 with a roughening solution containing a mixture of borofluoric acid and dichromic acid (FIG. 4). After washing off this roughening solution, the substrate is immersed in a known electroless plating bath to form an electroless copper plating 6 with the same thickness as the resist layer 4 on the surface where the adhesive has been roughened 5. Printed wiring board 10 provided with planar circuit 7
(Figure 5).

On this wiring board 10, insulating ink containing no plating catalyst (HGM-
02BK-1) to a thickness of 50 μm by screen printing to form the insulating layer 11. An adhesive layer 12 is formed by coating the insulating layer 11 with a thickness of 20 μm using a curtain coater method (FIG. 6). This adhesive layer 1
A plating resist layer 13 is formed on 2 (FIG. 7),
The surface of the adhesive layer 12 is chemically roughened 14. After that, holes 15 are made through the wiring board with a punch or drill (Fig. 8), and electroless copper plating is applied on the holes 15 and the roughened adhesive 12 by immersing it in an electroless plating solution. 16 are formed, and through holes 18 are formed to connect the outer layer circuit 17 and the inner layer circuit 7 (FIG. 1).

Since the insulating plate 1 and the adhesive 2 contain a palladium-based plating catalyst for depositing the copper plating 6, the copper plating will surely adhere when immersed in an electroless plating bath. If the coating thickness of the insulating layer 11 coated on the inner copper plating layer 6 is 70μ or less,
It has been found that sufficient through holes 18 can be obtained even without including a plating catalyst or without performing a seeder treatment in a post-process.

Effects of the Invention The multilayer printed wiring board manufactured by the manufacturing method of the present invention was subjected to thermal cycles based on the MIL1070 (-65°C 125°C) standard, and achieved reliability of 75 cycles or more. In addition, conventionally, it was necessary to perform seeder treatment after drilling for through-holes, but this is no longer necessary, and the manufacturing process can be omitted.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the product manufactured according to the present invention, FIG. 2 is a cross-sectional view of the base material, FIG. 3 is a cross-sectional view of the inner plating resist layer formed, FIG. Fig. 5 is a cross-sectional view of the inner copper plating layer formed, Fig. 6 is a cross-sectional view of the insulating layer and adhesive layer formed, Fig. 7 is a cross-sectional view of the outer plating resist layer formed, and Fig. 8 is a cross-sectional view of the inner copper plating layer formed. FIG. 3 is a cross-sectional view showing a through hole being drilled. In the drawing, 1 is an insulating plate, 2 is an adhesive layer, and 3 is an insulating plate.
is a base material, 10 is an inner layer printed wiring board, 11 is an insulating layer,
12 is an adhesive layer, 13 is a plating resist layer, 14 is
15 is a hole, 16 is a mating layer, 17 is an outer layer circuit, and 18 is a through hole.

Claims (1)

[Claims] 1 An insulating substrate with a plating catalyst-containing insulating substrate coated with an adhesive containing a plating catalyst on the top surface is used as a base material,
A plating resist layer is formed at a predetermined location on this base material, the surface of the exposed adhesive layer is roughened, and an electroless plating layer is provided at a location other than the plating resist layer. A printed wiring board with a circuit formed thereon is made, and an insulating layer with a thickness of 70 μm or less that does not contain a plating catalyst is applied to the printed wiring board. After an adhesive is further applied, a plating resist layer is applied to the designated areas. , roughen the surface of the adhesive, make holes through the wiring board, and immerse it in an electroless plating bath to form through holes and planar circuits on the outer layer. Production method.