JPH0147891B2 - - Google Patents

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Publication number
JPH0147891B2
JPH0147891B2 JP56010532A JP1053281A JPH0147891B2 JP H0147891 B2 JPH0147891 B2 JP H0147891B2 JP 56010532 A JP56010532 A JP 56010532A JP 1053281 A JP1053281 A JP 1053281A JP H0147891 B2 JPH0147891 B2 JP H0147891B2
Authority
JP
Japan
Prior art keywords
chip
tape
chip parts
series
ceramic substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56010532A
Other languages
Japanese (ja)
Other versions
JPS57124420A (en
Inventor
Shoichi Iwatani
Jun Sato
Hiroshi Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP56010532A priority Critical patent/JPS57124420A/en
Publication of JPS57124420A publication Critical patent/JPS57124420A/en
Publication of JPH0147891B2 publication Critical patent/JPH0147891B2/ja
Granted legal-status Critical Current

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  • Packages (AREA)
  • Ceramic Capacitors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Supply And Installment Of Electrical Components (AREA)

Description

【発明の詳細な説明】 本発明は、コンデンサ、抵抗、サーミスタ、バ
リスタ等のセラミツクチツプ部品を連続帯状に配
列したチツプ部品連に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a series of chip parts in which ceramic chip parts such as capacitors, resistors, thermistors, varistors, etc. are arranged in a continuous band shape.

チツプ部品は、平面状の導電パターンに直接ボ
ンデイングが可能で高密度実装化の要請に合うこ
と、外形が統一されていてプリント回路基板等に
実装する際に自動装着、組立が可能であること、
小型かつ高信頼性であること等々の優れた特長を
有しており、回路の厚膜IC化、モジユール化の
一端を担う重要部品として、電子計算機、通信
機、テレビ受像機、ラジオ受信機、電子時計、電
卓等の各種の電子機器に広く利用されつつある。
これらのチツプ部品は、自動挿入機で自動挿入、
組立ができるようにするために、一般に、連続帯
状に配列したチツプ部品連の形態をとることが多
い。第1図〜第3図はチツプ部品連の従来例を示
す斜視図である。
Chip components can be directly bonded to a flat conductive pattern, meeting the demands for high-density packaging, and have a uniform external shape, allowing for automatic mounting and assembly when mounted on a printed circuit board, etc.
It has excellent features such as being small and highly reliable, and is used as an important component for thick-film IC circuits and modularization in electronic computers, communication equipment, television receivers, radio receivers, It is becoming widely used in various electronic devices such as electronic watches and calculators.
These chip parts are automatically inserted using an automatic insertion machine.
To facilitate assembly, they typically take the form of a series of chip parts arranged in a continuous band. 1 to 3 are perspective views showing a conventional example of a series of chip parts.

まず第1図に示すチツプ部品連は、合成樹脂等
より成るテープ1の一面上に予め熱硬化性粘着剤
Aなどを塗布しておき、この粘着剤Aを塗布した
テープ1の一面上に、チツプ部品2を順次連接し
て貼着した構造となつている。チツプ部品2の
各々は、両端に端部電極3,4を有する矩形平板
状になつていて、端部電極3,4の方向をテープ
1の幅方向に合わせて順次連接させてある。
First, the series of chip parts shown in FIG. 1 is made by applying a thermosetting adhesive A or the like on one side of a tape 1 made of synthetic resin or the like in advance, and applying adhesive A to one side of the tape 1. It has a structure in which chip parts 2 are successively connected and pasted. Each of the chip parts 2 is in the shape of a rectangular flat plate having end electrodes 3 and 4 at both ends, and the end electrodes 3 and 4 are sequentially connected with the direction of the end electrodes 3 and 4 aligned with the width direction of the tape 1.

しかし、この従来のチツプ部品連は、隣接する
チツプ部品1―1の端部電極3―3、4―4が互
いに接触するため、チツプ部品連の形でチツプ部
品1の個々の特性を測定し、基準値内に収まつた
ものだけを選別する特性測定選別作業を行なうこ
とが不可能である。このため、第1図に示すチツ
プ部品連を得る場合には、予め一個づつ特性測定
選別作業を行なつて選別されたチツプ部品を、一
個づつテープ1上に貼着するという作業を経なけ
ればならず、チツプ部品連化する工程が非常に面
倒になつていた。特に、この種のチツプ部品は、
その平面積が例えば3×5m/m程度と非常に小
さく、かつ厚み1mm前後と非常に薄くて取扱い難
いこと、しかも高密度実装化の要請から更に小型
化される傾向にあること等の特有の事情があり、
特性測定選別作業を一個づつ行なうことは非常に
困難である。
However, in this conventional series of chip parts, the end electrodes 3-3 and 4-4 of adjacent chip parts 1-1 come into contact with each other, so it is difficult to measure the individual characteristics of the chip parts 1 in the form of a series of chip parts. , it is impossible to carry out characteristic measurement and selection work that selects only those that fall within the reference value. Therefore, in order to obtain the series of chip parts shown in FIG. However, the process of linking chip parts became extremely troublesome. In particular, this kind of chip parts
Its flat area is very small, for example, about 3 x 5 m/m, and its thickness is around 1 mm, which makes it difficult to handle.Furthermore, there is a trend toward further miniaturization due to the demand for high-density packaging. There are circumstances,
It is extremely difficult to perform characteristic measurement and selection work one by one.

第2図に示すチツプ部品連は、チツプ部品2を
間隔d1を隔てて順次貼着した構造となつており、
チツプ部品2の各々は互いに独立した状態にあ
る。したがつてこのチツプ部品連は、テープ1上
にチツプ部品2を貼着した状態で、チツプ部品2
の特性測定選別作業を行なうことができる。しか
し、チツプ部品2を間隔d1を隔てて貼着しなけれ
ばならないので、テープ1の単位長さ当りのチツ
プ部品数が減少し、テープ1を余分に必要とする
こと、間隔d1の寸法が変動し、自動挿着ミスを生
じ易いこと等の欠点がある。
The series of chip parts shown in Fig. 2 has a structure in which chip parts 2 are successively pasted at intervals of d 1 .
Each of the chip parts 2 is in a mutually independent state. Therefore, in this series of chip parts, the chip part 2 is pasted on the tape 1, and the chip part 2 is pasted on the tape 1.
Characteristic measurement and selection work can be carried out. However, since the chip parts 2 must be attached at a distance d 1 , the number of chip parts per unit length of the tape 1 decreases, an extra tape 1 is required, and the dimension of the distance d 1 decreases. There are disadvantages such as fluctuations in the amount of paper and easy insertion errors.

第3図に示す部品連は、テープ1上に予め一定
間隔d2で粘着剤Aの塗布領域を設けておき、この
粘着剤Aの塗布領域にチツプ部品1を順次貼着し
た構造となつている。このチツプ部品連は、チツ
プ部品2を予め規制された間隔d2で貼着できる利
点はあるが、チツプ部品2の相互間に間隔d2が生
じるので、第2図のチツプ部品連と同様に、テー
プ1の無駄を生じることは避けられない。
The series of parts shown in Fig. 3 has a structure in which adhesive A is applied on the tape 1 in advance at fixed intervals d2 , and chip parts 1 are successively pasted onto the adhesive A applied areas. There is. This series of chip parts has the advantage that the chip parts 2 can be pasted at a pre-regulated interval d 2 , but since there is a gap d 2 between the chip parts 2, it is similar to the series of chip parts shown in FIG. , it is inevitable that the tape 1 will be wasted.

本発明は上述する従来の欠点を除去し、チツプ
部品の特性測定選別作業が非常に容易で、しかも
テープに対するチツプ部品の実装密度が高く、テ
ープの無駄の少ないチツプ部品連を提供すること
を目的とする。
It is an object of the present invention to eliminate the above-mentioned conventional drawbacks, and to provide a series of chip parts in which the characteristic measurement and selection work of chip parts is very easy, the density of chip parts mounted on the tape is high, and there is little wastage of tape. shall be.

上記目的を達成するため、本発明に係るチツプ
部品連は、テープ上に、磁器基板の両端に端部電
極を有しかつ前記両端の隅部に切欠部を有するチ
ツプ部品を、前記両端の方向を前記テープの幅方
向に合わせて、順次連接して貼着したことを特徴
とする。
In order to achieve the above object, the chip component series according to the present invention includes a chip component having end electrodes at both ends of a ceramic substrate and notches at the corners of the both ends, on a tape in the direction of the both ends. It is characterized in that the tapes are successively connected and pasted along the width direction of the tape.

以下実施例たる添付図面を参照し、本発明の内
容を具体的に説明する。第4図は本発明に係るチ
ツプ部品連の一部分の斜視図である。この実施例
では、予め一面側に粘着剤Aを塗布したテープ1
の粘着剤A塗布面側に、チツプ部品2を順次連接
して貼着した構造となつている。チツプ部品2の
各々は、第5図にも示すように、磁器基板2aの
両端に端部電極3,4を被着形成すると共に、両
端の四隅部に角状、円弧状等の切欠部5〜8を設
けた構造となつていて、端部電極3,4のある両
端方向をテープ1の幅方向に合わせて、テープ1
の粘着剤A上に順次連接して貼着してある。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The content of the present invention will be specifically described below with reference to the accompanying drawings, which are examples. FIG. 4 is a perspective view of a portion of a chip assembly according to the present invention. In this example, tape 1 is coated with adhesive A on one side in advance.
It has a structure in which chip parts 2 are sequentially connected and pasted on the adhesive A-coated side. As shown in FIG. 5, each of the chip parts 2 has end electrodes 3 and 4 adhered to both ends of a ceramic substrate 2a, and corner-shaped, arc-shaped, etc. notches 5 at the four corners of both ends. .
are successively connected and pasted on adhesive A.

上述のような構造であると、各チツプ部品2を
互いに連接して貼着したにも拘らず、チツプ部品
2の各々の端部電極3,4が前記切欠部5―7、
6―8によつて互いに隔てられ、各チツプ部品2
が電気的に互いに独立した状態になる。したがつ
て、テープ1上にチツプ部品2を貼着したチツプ
部品連として、各チツプ部品2の特性を連続して
測定することが可能となり、チツプ部品2の特性
測定選別作業が非常に容易になる。
With the above-described structure, even though the chip parts 2 are connected and attached to each other, the end electrodes 3 and 4 of the chip parts 2 are connected to the notches 5-7,
6-8, each chip part 2
become electrically independent from each other. Therefore, it is possible to continuously measure the characteristics of each chip component 2 as a series of chip components 2 pasted on the tape 1, and the task of measuring and sorting the characteristics of the chip components 2 is made very easy. Become.

しかも、各チツプ部品2は互いに連接した状態
でテープ1上に貼着してあるから、テープ1上に
おけるチツプ部品2の配設ピツチが一定になると
共に、実装密度が高くなり、自動挿入機を使用し
て自動挿入する際の挿入トラブルやテープ1の無
駄が解消される。
Moreover, since each chip component 2 is attached to the tape 1 in a connected state, the arrangement pitch of the chip components 2 on the tape 1 is constant, the packaging density is high, and the automatic insertion machine is Insertion troubles and waste of the tape 1 when automatically inserting the tape 1 are eliminated.

なお、チツプ部品2としては、積層形磁器コン
デンサ、内部電極構造の磁器コンデンサ、スルー
ホール形磁器コンデンサ等のチツプ状磁器コンデ
ンサをはじめとして、磁器基板形の抵抗器、サー
ミスタ、バリスタ等、広範囲のセラミツクチツプ
部品を使用することができる。
Chip components 2 include a wide range of ceramics, including chip-shaped ceramic capacitors such as multilayer ceramic capacitors, internal electrode structure ceramic capacitors, and through-hole ceramic capacitors, as well as ceramic substrate-type resistors, thermistors, and varistors. Chip parts can be used.

次に、本発明に係るチツプ部品連の製造方法を
説明する。第6図は本発明に係るチツプ部品連の
製造方法を説明する図である。図において、9は
多数のチツプ部品要素を有するチツプ部品集合形
の磁器基板である。この磁器基板9は、第7図に
示すように、長さ方向に一定の間隔d3で複数の分
割用の溝S1を有し、この溝S1によつて区画された
各領域内に、端部電極3,4および切欠部5〜8
を備えるチツプ部品要素21,22……を有してい
る。すなわち、この磁器基板9は、第4図、第5
図で示したチツプ部品2を、適当な数だけ横に並
べて一体化したチツプ部品集合体としての形態と
なつている。したがつて、この磁器基板9はチツ
プ部品単品の何倍もの大きさを有するから、チツ
プ部品連化する際の取扱い、作業が非常に容易に
なる。
Next, a method for manufacturing a series of chip parts according to the present invention will be explained. FIG. 6 is a diagram illustrating a method of manufacturing a series of chip parts according to the present invention. In the figure, reference numeral 9 denotes a chip component assembly type ceramic board having a large number of chip component elements. As shown in FIG. 7, this ceramic substrate 9 has a plurality of dividing grooves S1 at regular intervals d3 in the length direction, and each area divided by the grooves S1 is , end electrodes 3, 4 and cutouts 5 to 8
It has chip component elements 2 1 , 2 2 . . . That is, this ceramic substrate 9 is shown in FIGS. 4 and 5.
A suitable number of chip parts 2 shown in the figure are arranged side by side and integrated to form a chip part assembly. Therefore, since this ceramic substrate 9 has a size many times larger than that of a single chip component, handling and work when assembling chip components becomes extremely easy.

なお、前記溝S1は凹溝もしくは部分的に貫通す
る貫通溝として設けることができる。また前述の
磁器基板9を得る方法としては、第8図aに示す
ように、適当な大きさの平板状に形成された磁器
基板9上に、分溝用の溝S1,S2を格子状に設け、
この溝S1,S2によつて囲まれた各領域Q1,Q2
Q3……Qo内に、内部電極(図示しない)等を有
するチツプ部品要素を有するチツプ部品集合体を
一担製造し、次にこの集合体を分割用の溝S2に沿
つて分割することにより、第8図bに示すように
集合体を取り出した後、第8図cに示すように、
その幅方向の両端部に端部電極3,4を塗布焼付
などの手段で形成する方法が適当である。
Note that the groove S1 can be provided as a concave groove or a partially penetrating through groove. Further, as a method for obtaining the above-mentioned ceramic substrate 9, as shown in FIG . provided in the form of
Each region Q 1 , Q 2 , surrounded by these grooves S 1 , S 2 ,
Q 3 ... A chip component assembly having chip component elements having internal electrodes (not shown) etc. is manufactured in one step, and then this assembly is divided along the dividing groove S 2 . By this, after taking out the aggregate as shown in FIG. 8b, as shown in FIG. 8c,
A suitable method is to form the end electrodes 3 and 4 at both ends in the width direction by coating and baking.

再び第6図を参照すると、10はロール11,
12,13等に順次連接して矢印イの如く走行す
る無端状のベルト、14はロール15,16,1
7等に案内されて矢印ロ方向に走行する無端状の
ベルトである。ベルト14はロール15―16間
の部分が、ベルト10を案内するロール12の外
側に適当な押圧力で圧接するように張設してあ
る。
Referring again to FIG. 6, 10 is the roll 11,
An endless belt connected to 12, 13, etc. sequentially and running as shown by arrow A, 14 is a roll 15, 16, 1
It is an endless belt that runs in the direction of the arrow B while being guided by the belt. The belt 14 is stretched so that the portion between the rolls 15 and 16 is pressed against the outside of the roll 12 that guides the belt 10 with an appropriate pressing force.

18はテープ巻回体である。このテープ巻回体
18の一面側には予め粘着剤Aを塗布してあり、
この粘着剤Aを塗布した面側を表にしてロール1
1―12のベルト10上に引き出される。
18 is a tape winding body. Adhesive A is applied in advance to one side of this tape roll 18.
Roll 1 with the side coated with adhesive A facing up.
1-12 onto the belt 10.

前記磁器基板9は、ロール11―12間のベル
ト10上に引き出されたテープ18上に、粘着剤
Aの粘着力を利用して貼着する。テープ18上に
貼着された磁器基板9はベルト10によつてテー
プ18と共に矢印イの如く搬送される。そしてベ
ルト10のロール12に達すると、ロール12の
曲率とベルト14から磁器基板9に加わる圧接力
により、磁器基板9は溝S1に沿つて連続して正確
に分割され、磁器基板9を構成するチツプ部品要
素が順次連続的に独立化される。分割の終了した
テープ18は、チツプ部品を貼着したままで巻回
され、これによりチツプ部品連の巻回体が得られ
る。
The ceramic substrate 9 is stuck onto the tape 18 pulled out onto the belt 10 between the rolls 11 and 12 using the adhesive force of the adhesive A. The ceramic substrate 9 stuck on the tape 18 is conveyed along with the tape 18 by the belt 10 as shown by arrow A. When reaching the roll 12 of the belt 10, the curvature of the roll 12 and the pressing force applied from the belt 14 to the ceramic substrate 9 divide the ceramic substrate 9 continuously and accurately along the groove S1 , forming the ceramic substrate 9. The chip component elements that correspond to each other are successively isolated one after another. The tape 18 that has been divided is wound with the chip parts attached thereto, thereby obtaining a wound body of a series of chip parts.

磁器基板9を分割する装置として、磁器基板9
に溝S1の間隔で送りをかけながら、カツタを突き
当てて分割する装置等も提案されているが、この
装置では溝S1に沿つて正確に分割することが困難
で、しばしば溝S1以外の部分でバリやエツジが残
るように切断されることがあつた。このため、バ
リやエツジが障害となり、自動挿入機のマガジン
にスムーズに挿填できなくなるという難点があつ
た。また、チツプ部品連を得る場合、個々に分割
されたチツプ部品を一個づつテープに正確に貼着
する工程が加わり、工程が煩雑で面倒になる欠点
もあつた。
As a device for dividing the ceramic substrate 9, the ceramic substrate 9
A device has been proposed that divides the groove by hitting it with a cutter while feeding it at intervals of groove S 1 , but with this device, it is difficult to accurately divide the groove S 1 , and often the groove S 1 There were cases where the parts were cut so that burrs and edges remained. As a result, burrs and edges become obstacles, making it impossible to smoothly insert the paper into the magazine of an automatic insertion machine. In addition, when a series of chip parts is obtained, a step is added to precisely attach each divided chip part to tape one by one, making the process complicated and troublesome.

これに対し、上述の分割方法においては、ロー
ル12の曲率とベルト14の圧接力とにより磁器
基板9を分割するものであるから、磁器基板9に
過大な加わる余地がなく、磁器基板9を溝S1に沿
つて正確に分割し、バリやエツジのないチツプ部
品を得ることができる。また、多数のチツプ部品
要素を有する磁器基板9をテープ18上に貼着し
たままで連続して分割できるので、チツプ部品連
化する場合、従来のようにチツプ部品を一個づつ
貼着する工程が省け、工程を著しく簡単化、短縮
化し、大幅なコストダウンを達成することができ
る。
On the other hand, in the above-mentioned dividing method, since the ceramic substrate 9 is divided by the curvature of the roll 12 and the pressing force of the belt 14, there is no room for applying excessive force to the ceramic substrate 9, and the ceramic substrate 9 is divided into grooves. It is possible to precisely divide along S 1 and obtain chip parts without burrs or edges. In addition, since the ceramic substrate 9 having a large number of chip component elements can be successively divided while being attached to the tape 18, when assembling chip components, there is no need to attach the chip components one by one as in the conventional process. This greatly simplifies and shortens the process, resulting in significant cost reductions.

以上述べたように、本発明に係るチツプ部品連
は、テープ上に、磁器基板の両端に端部電極を有
しかつ前記両端の隅部に切欠部を有するチツプ部
品を、前記両端の方向を前記テープの幅方向に合
わせて、順次連接して貼着したことを特徴とする
から、テープ上の各チツプ部品が電気的に互いに
独立し、各チツプ部品の特性測定選別作業をチツ
プ部品連の状態で連続的に行なうことができる。
しかもテープに対するチツプ部品の実装密度が高
くテープの無駄が少なく、かつチツプ部品の配設
ピツチが一定で自動挿入の容易なチツプ部品連を
提供することができる。
As described above, in the chip component series according to the present invention, a chip component having end electrodes at both ends of a ceramic substrate and notches at the corners of both ends is placed on a tape in the direction of the both ends. The tape is characterized in that it is attached sequentially in the width direction, so that each chip component on the tape is electrically independent from each other, and the task of measuring and sorting the characteristics of each chip component can be performed by connecting the chip components in series. It can be done continuously.
Furthermore, it is possible to provide a series of chip parts that has a high mounting density of chip parts on the tape, reduces waste of tape, has a constant arrangement pitch of chip parts, and is easy to automatically insert.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第3図は従来のチツプ部品連の斜視
図、第4図は本発明に係るチツプ部品連の斜視
図、第5図はチツプ部品の平面図、第6図は本発
明に係るチツプ部品連の製造方法を説明する図、
第7図はチツプ部品集合体を構成する磁器基板の
平面図、第8図(a),(b),(c)はチツプ部品集合体を
構成する磁器基板を得る方法を説明する図であ
る。 1……テープ、2……チツプ部品、3,4……
端部電極、5〜8……切欠部。
1 to 3 are perspective views of a conventional chip component series, FIG. 4 is a perspective view of a chip component series according to the present invention, FIG. 5 is a plan view of the chip component, and FIG. 6 is a perspective view of a chip component series according to the present invention. A diagram explaining the manufacturing method of a series of chip parts,
Fig. 7 is a plan view of the ceramic substrate constituting the chip parts assembly, and Figs. 8 (a), (b), and (c) are diagrams explaining the method for obtaining the ceramic substrate constituting the chip parts assembly. . 1... Tape, 2... Chip parts, 3, 4...
End electrode, 5 to 8... cutout.

Claims (1)

【特許請求の範囲】[Claims] 1 テープ上に、磁器基板の両端に端部電極を有
しかつ前記両端の隅部に切欠部を有するチツプ部
品を、前記両端の方向を前記テープの幅方向に合
わせて、順次連接して貼着したことを特徴とする
チツプ部品連。
1. On the tape, chip parts having end electrodes at both ends of a ceramic substrate and notches at the corners of the both ends are sequentially connected and pasted with the direction of the both ends aligned with the width direction of the tape. A series of chip parts that are characterized by the fact that they are worn.
JP56010532A 1981-01-26 1981-01-26 Chip part series and method of dividing substrate Granted JPS57124420A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56010532A JPS57124420A (en) 1981-01-26 1981-01-26 Chip part series and method of dividing substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56010532A JPS57124420A (en) 1981-01-26 1981-01-26 Chip part series and method of dividing substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63149419A Division JPH01153415A (en) 1988-06-17 1988-06-17 Manufacture of chip part linkage

Publications (2)

Publication Number Publication Date
JPS57124420A JPS57124420A (en) 1982-08-03
JPH0147891B2 true JPH0147891B2 (en) 1989-10-17

Family

ID=11752864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56010532A Granted JPS57124420A (en) 1981-01-26 1981-01-26 Chip part series and method of dividing substrate

Country Status (1)

Country Link
JP (1) JPS57124420A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62147274U (en) * 1986-03-12 1987-09-17
JPH0746644B2 (en) * 1986-06-03 1995-05-17 ロ−ム株式会社 Chip component board dividing method
WO2005041220A1 (en) * 2003-10-22 2005-05-06 Minowa Koa Inc. Method of manufacturing electronic component

Also Published As

Publication number Publication date
JPS57124420A (en) 1982-08-03

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