JPH0137009B2 - - Google Patents

Info

Publication number
JPH0137009B2
JPH0137009B2 JP57208861A JP20886182A JPH0137009B2 JP H0137009 B2 JPH0137009 B2 JP H0137009B2 JP 57208861 A JP57208861 A JP 57208861A JP 20886182 A JP20886182 A JP 20886182A JP H0137009 B2 JPH0137009 B2 JP H0137009B2
Authority
JP
Japan
Prior art keywords
gate circuit
array
circuit
turned
discharge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57208861A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5999823A (ja
Inventor
Junichi Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP57208861A priority Critical patent/JPS5999823A/ja
Publication of JPS5999823A publication Critical patent/JPS5999823A/ja
Publication of JPH0137009B2 publication Critical patent/JPH0137009B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
JP57208861A 1982-11-29 1982-11-29 ロジツクアレイ Granted JPS5999823A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57208861A JPS5999823A (ja) 1982-11-29 1982-11-29 ロジツクアレイ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57208861A JPS5999823A (ja) 1982-11-29 1982-11-29 ロジツクアレイ

Publications (2)

Publication Number Publication Date
JPS5999823A JPS5999823A (ja) 1984-06-08
JPH0137009B2 true JPH0137009B2 (enExample) 1989-08-03

Family

ID=16563329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57208861A Granted JPS5999823A (ja) 1982-11-29 1982-11-29 ロジツクアレイ

Country Status (1)

Country Link
JP (1) JPS5999823A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211323A (ja) * 1985-07-09 1987-01-20 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP2544027B2 (ja) * 1990-05-24 1996-10-16 株式会社東芝 低消費電力型プログラマブルロジックアレイおよびそれを用いた情報処理装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS596629A (ja) * 1982-07-02 1984-01-13 Matsushita Electric Ind Co Ltd プログラマブルロジツクアレイ

Also Published As

Publication number Publication date
JPS5999823A (ja) 1984-06-08

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