JPH01318320A - D/a converter - Google Patents

Abstract

PURPOSE:To eliminate zero cross distortion in a minute signal by extracting a high-order bit(MSB) data of an input digital data so as to use it is a correction data. CONSTITUTION:An input digital data X is fed to one input terminal of adder circuits 22, 23 and a high-order 8-bit except the MSB is fed to one input terminal 24a of a switch 24 and an inverting circuit 21 and the MSB is fed to a control terminal of the switch 24. The data corresponding to the most significant and least significant level data in the input data X remains unchanged in the data conversion circuit 2, but a nonlinear conversion data Y1 being the result of conversion of a data corresponding to the intermediate level data and a nonlinear conversion data Y2 of a relation being twice the input data X through the addition to the conversion data Y1 are obtained. Then output analog quantities y1, inverse of y2 are added by a differential amplifier 6 to obtain an output analog data. Thus, the data component is added and the noise component is subtracted to improve the S/N.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a D/A converter, and particularly to an A/A converter suitable for use in digital audio equipment.

(Prior Art) D/A converters used in digital audio equipment, etc. require a wide range of 16 bits or more, and are required to have less distortion.
The converter is made using a ladder resistance circuit or the like, and therefore it is most important to improve the accuracy of analog conversion of the most significant bit (MSB).

For digital signals used in audio signals, etc., the lowest level data where all bits are zero corresponds to the negative maximum level of the analog signal, and the highest level data where all bits are 1 corresponds to the positive maximum level of the analog signal. All bits are “θ” or only the MSB is “1”
Offcent binary digital signals, etc., in which center level data corresponds to the zero level of an analog signal, are known.

[Problem that the invention seeks to solve]

Therefore, especially in a minute signal near the zero level of an analog signal, the MSB frequently switches between "0" and "1", resulting in so-called zero-cross distortion.

In other words, all bits are “0” and only the MSB is “1”.
The difference in the case is one bit of the least significant bit (LSB), which is extremely small, but in reality
Conversion error T is added. , normally this D/A conversion error is L
SB Because it is extremely large compared to 1 bit and cannot be ignored,
This produces the zero-crossing distortion T mentioned above. As described above, there is a drawback that the sense of distortion becomes large when the signal level is low.

The present invention aims to improve such drawbacks and eliminate zero-cross distortion in minute signals.

[Means for solving problems]

The D/A converter according to the present invention extracts upper bit data of input digital data as correction data, adds and subtracts the correction data to lower bits of the input digital data, and converts first and second converted digital data. Gain,
The method is characterized in that analog data obtained from the first and second converted digital data is synthesized.

[Effect]

Since the present invention has such a configuration, in the first and second nonlinear conversion data, the data corresponding to the center level data of the input digital data does not become the center level, and the MSB is inverted. It doesn't happen. That is, distortion based on the MSB D/A conversion error occurs at a position corresponding to a level other than the center level of the input digital data. Therefore, by adding these non-linear data together, it is possible to obtain linear data in which zero-cross distortion occurs at a high-level portion other than near the cello level l=J.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of the present invention.

16-bit input digital data X generated from a CD player 1 is applied to a data conversion circuit 2.

The data conversion circuit 2 includes an inversion circuit 21. The adder circuit 22 has a subtracter circuit 23 and a switch 24, and the input digital data is applied to the input terminal 24a of. The output of the inverting circuit 21 is applied to the other input terminal 24b of the switch 24, and the output terminal 24C of the switch 24 is applied to the other input terminal 24b of the switch 24.
is applied to the other input terminals of the addition circuit 22 and the subtraction circuit 23. The MSB of input data X is applied to the control terminal of switch 24. Said addition and subtraction circuits 22 and 23
The converted data Y and Y2 are obtained from .

available. The output of the inverter 3 is applied to a D/A converter 5, and the outputs of the D/A converters 4 and 5 are applied to a differential amplifier 6, which is led out to an output terminal 7.

The operation of the above configuration will be explained below with reference to FIG.

As shown in FIG. 2, the data conversion circuit 2 converts the highest and lowest level data Fs and - of the input digital data X.
The data corresponding to Fs remains as it was, but if you add the data corresponding to the intermediate level data to the non-linearly converted data Y1 and the converted data Y, it becomes twice the input horn digital data X. Non-direct wc conversion data y with the relationship
2.

Therefore, the original linear data can be obtained by performing D/A conversion on each of the converted data Y+ and Yz and adding the two obtained analog data.

In this embodiment, in order to cancel out external noise etc. applied to the D/A converter 4.5, the non-linear data Y2 is completely inverted by the inverter 3 to obtain polarity inverted data, which is D/A converted and then Both analog values y++72 are subtracted by the differential amplifier 6 to obtain analog data corresponding to the human horn data X. Therefore, the data components are added and the noise components are subtracted, so that the S/N ratio is improved.

Next, the data conversion circuit 2 will be explained in more detail.

Now, as shown in Fig. 2, the positive and negative full scale values of the input digital data X are Fs and -Fs, and the center point P
. Let the value of be O. The conversion data Y1 and Y2 to be obtained are
Center point P of input data X.

Now, input data X and correction data D, respectively. The points P1 and P2 obtained by adding and subtracting are obtained, and the full scale F s (111-4) and -Fs (000-0) are obtained.
Then, points P4 and P are equal to input data X, respectively.
Make it so that it becomes 5. Also, in the middle of these, data Y1
For data Y2, point P3+Pl and P4 are connected by a straight line, and for data Y2, point P3. P2 and P4 should be connected by a straight line.

In order to perform such data conversion in data conversion circuit 2, 1
In a range where the MSB of 6-bit input data Then,
8 excluding the MSB of the upper 9 bits of input data
The bit data is added to and subtracted from the lower bits of the input data X as correction data D by an adder 22 and a subtracter 23.

At this result point P3, the input data X is negative full scale -
Since F s (000-0)-, the correction data D becomes zero (00000000) and the converted data Y1 and Y2 become equal to the input data X.

As input data X increases from negative full scale -Fs,
Correction data D for each increment of 128 (-2') digits
increases by 1 digit, and at point P0 the input data X becomes (0
11-1>, so (11111111), which corresponds to 256 days, is added and subtracted as the correction data D, and the converted data Y is obtained.

and Y2 become points P1 and P2, respectively.

Next, in the range where the MSB of input data X is "I", that is, in the range of input data (100-0) to (111-1), the switch 245 selects the input terminal 24b side. Then, the correction data D is applied to the adder 22 and subtracter 23 via the inverting circuit. As a result, point P.

Then, since the input data This corresponds to the data D0, and this is the adder 22 and subtracter 2.
3 is added and subtracted, resulting in points P1 and P2. Every time the input data X increases by 128 digits from the center point P1, this inversion correction data decreases by 1 digit,
Positive full scale F s (111-
In 1), the correction data D is (111-1), so the inverted correction data is (00-O), and as shown at point P4, <
y+ and Y2 match.

Therefore, adding the converted data Y1 and Y2 is equal to twice the input data X, and a correct linear analog output can be obtained with respect to the input signal.

Next, the reason for the reduction in distortion will be explained using FIG. 2. Now, at points P and P6 where the MSB of conversion data Y, Y2 is inverted, analog output is obtained by demodulating these data)'++
A zero-crossing point occurs on Yz, and a constant zero-crossing distortion T as described above is generated. In this case, when zero-crossing distortion occurs for the converted data Y1 at the zero-crossing point P5, the combined distortion rate at the zero-crossing point P2 for the other converted data Y2 also becomes 1/2. In this way, although distortion occurs at two locations, the level at each location is reduced to 1/2, and the distortion power is reduced. Furthermore, since these distortions do not occur near the zero-crossing point P0 of the input data X, the unpleasant zero-crossing distortion described above does not occur when the input signal is small.

Here, the data conversion circuit 2 can also be realized by writing all the values of conversion data Yl and Y2 for input data X in a ROM. Also, convert data Y first.

is obtained as described above, and using this Y, Y2 = X-
The converted data Y2 may be obtained by (y+ -x). The specific arithmetic circuit itself is well known and will therefore be omitted.

As explained above, the distortion caused by the MSB D/A conversion error is separated into upper and lower halves, and this distortion does not occur near the zero-crossing point of the input signal.

The converted data Y, , Y2 are time-divisionally processed to become serial data, and one D/A converter performs analog conversion to convert the analog output y++-y2 into a serial analog data string, which is converted into two samples. It may be converted into parallel analog outputs yl, -y2 using a hold circuit.

Furthermore, various values may be used for the slopes of the conversion data Y+ and Yz with respect to the input data X, as required. Moreover, these conversion data Y1. A large number of sets of Y2 with different slopes may be obtained and D/A converted, and these may be summed to obtain analog data corresponding to 2n times the input data X if the set is 0, for example.

Although the above embodiments have been described with respect to digital data of the offset binary method, the present invention can also be applied to digital data of the 2'S complementary method or the magnitude magnitude method.

For example, since the 2'S complementary is obtained by inverting only the MSB of digital data based on the offset binary described above, it is sufficient to invert this MSB again before the data conversion circuit 2.

〔Effect of the invention〕

As explained above, according to the present invention, the D
The distortion caused by the /A conversion error is divided into at least two parts, and the level of each part is reduced. Furthermore, since these distortions do not occur near the zero-crossing point of the input signal, excellent effects such as being able to lower the S/N ratio when a small input signal is generated can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a diagram explaining its operation.

Claims (1)

[Claims] Extracting upper bit data of the input digital data as correction data, adding and subtracting the correction data to the lower bits of the input digital data to obtain first and second converted digital data, and performing the first and second conversion. A D/A conversion device characterized by synthesizing analog data obtained from digital data.