JPH01312890A - Manufacture of hybrid integrated circuit - Google Patents

Manufacture of hybrid integrated circuit

Info

Publication number
JPH01312890A
JPH01312890A JP14402888A JP14402888A JPH01312890A JP H01312890 A JPH01312890 A JP H01312890A JP 14402888 A JP14402888 A JP 14402888A JP 14402888 A JP14402888 A JP 14402888A JP H01312890 A JPH01312890 A JP H01312890A
Authority
JP
Japan
Prior art keywords
hybrid integrated
press
conductive filler
integrated circuit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14402888A
Other languages
Japanese (ja)
Other versions
JPH0740632B2 (en
Inventor
Akira Kazami
風見 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63144028A priority Critical patent/JPH0740632B2/en
Publication of JPH01312890A publication Critical patent/JPH01312890A/en
Publication of JPH0740632B2 publication Critical patent/JPH0740632B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

PURPOSE:To lengthen the lifetime of a press die by press punching a substrate in an insulation layer area near an insulation resin thin-layer. CONSTITUTION:An insulation layer 4 is formed in a region other where an insulation resin thin layer 3 containing an intense heat conductive filler 2 is printed. A substrate 1 in an insulation layer 4 area in the vicinity of the resin thin layer 3 is press punched by a press die 7 and separated to individual hybrid integrated circuit 8. In this way, the hybrid integrated circuit 8 for low heat resistance is formed without press punching the insulation resin layer 3 containing the intense heat conductive filler 2 by the press die 7. As a result, the press die 7 is not worn, and the lifetime of the press die 7 can be lengthened markedly.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は低熱抵抗回路基板を用いた混成集積回路の製造
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a method of manufacturing a hybrid integrated circuit using a low thermal resistance circuit board.

(ロ)従来の技術 本願出願人はすでに特公昭46−13234号公報に厚
膜混成集積回路の組み込みに適した金属基板を用いた低
熱抵抗回路基板を開発した。断る基板はアルミニウム板
の表面を陽極酸化として酸化アルミニウム被膜で被覆し
たものであり、その表面に約30μの厚さのエポキシ樹
脂で銅箔を接着している構造なので熱抵抗は1cm”の
面積あたり1.3”C/W程度であった。
(b) Prior Art The applicant of the present application has already developed a low thermal resistance circuit board using a metal substrate suitable for incorporating a thick film hybrid integrated circuit in Japanese Patent Publication No. 46-13234. The board is made by anodizing the surface of an aluminum plate and coating it with an aluminum oxide film, and the copper foil is bonded to the surface with an epoxy resin approximately 30μ thick, so the thermal resistance is per 1cm" area. It was about 1.3"C/W.

最近集積化の要請より、更に大出力回部をも組み込みで
きる低熱抵抗基板が提案された。この基板はアルミニウ
ム等の良熱伝導性金属基板の一生面に多量のアルミナ(
A!、On)を含有したエポキシ樹脂層を薄く付着した
構造を有し、樹脂層の厚さが60μと2倍になったにも
かかわらず、熱抵抗は0.8℃/Wと改善されている。
Recently, due to the demand for integration, low thermal resistance substrates that can incorporate even higher output circuits have been proposed. This board has a large amount of alumina (
A! , On) has a structure in which a thin epoxy resin layer is attached, and even though the thickness of the resin layer has doubled to 60μ, the thermal resistance has been improved to 0.8℃/W. .

(ハ)発明が解決しようとする課題 しかしながら斯上の基板を用いて混成集積回路を生産す
ると大きな問題が生じた。これは−枚の基板に多数個の
混成集積回路を形成した後にプレスで各混成集積回路に
打抜く工程で、プレス金型の寿命が従来の基板が100
万シヨツトであるのに対しこの基板では5000シヨツ
トで摩耗してしまうのである。この原因はアルミナにあ
る。即ちアルミナのモース硬度は9であり、プレス金型
を形成する焼入れ鋼のモース硬度は約6.5でありプレ
ス金型の側面を削る。即ち、プレス金型の寿命を著しく
低下させる大きな問題点があった。
(c) Problems to be Solved by the Invention However, a major problem arose when a hybrid integrated circuit was produced using the above-mentioned substrate. This is a process in which a large number of hybrid integrated circuits are formed on one board and then each hybrid integrated circuit is punched out using a press.
1,000 shots, whereas this board wears out after 5,000 shots. The cause of this is alumina. That is, the Mohs hardness of alumina is 9, and the Mohs hardness of the hardened steel forming the press die is about 6.5, and the side surface of the press die is ground. That is, there was a major problem in that the life of the press mold was significantly reduced.

(ニ)課題を解決するための手段 本発明は上述した問題点に鑑みて為されたものであり、
短冊状の金属基板を準備し、前記基板上の複数の所定領
域に高熱伝導性フィラーが含有された絶縁樹脂薄層をス
クリーン印刷し、前記高熱伝導性フィラーを含有する前
記絶縁樹脂薄層が印刷された以外の前記基板領域上に絶
縁層を形成し、前記高熱伝導性フィラーが含有された絶
縁樹脂薄層上に所望形状の回路導体を形成し、前記回路
導体上に回路素子を固着した後、前記絶縁樹脂薄層近傍
の前記絶縁層領域の前記基板をプレス打抜きし、個々の
混成集積回路に分離して解決する。
(d) Means for solving the problems The present invention has been made in view of the above-mentioned problems,
A strip-shaped metal substrate is prepared, and an insulating resin thin layer containing a highly thermally conductive filler is screen printed on a plurality of predetermined areas on the substrate, and the insulating resin thin layer containing the highly thermally conductive filler is printed. After forming an insulating layer on the substrate area other than the area covered by the substrate, forming a circuit conductor in a desired shape on the thin insulating resin layer containing the high thermal conductivity filler, and fixing a circuit element on the circuit conductor. , the substrate in the insulating layer region near the insulating resin thin layer is press punched and separated into individual hybrid integrated circuits.

(ネ)作用 この様に本発明に依れば、高熱伝導性フィラーが含有さ
れた絶縁wm薄層を直接プレス金型で切断することがな
いので、従来の問題点を大幅に改善した低熱抵抗回路基
板を用いた混成集積回路を提供することができる。
(f) Function As described above, according to the present invention, since the insulating WM thin layer containing a highly thermally conductive filler is not directly cut with a press die, the thermal resistance is low, which greatly improves the problems of the conventional method. A hybrid integrated circuit using a circuit board can be provided.

(へ)実施例 以下に図面を参照して本発明の一実施例を詳述する。(f) Example An embodiment of the present invention will be described in detail below with reference to the drawings.

本発明の第1の工程は第1図Aに示す如く、短冊状の金
属基板(1)を準備することにある。金属基板(1)は
アルミニウムが適しており、アルミニウム板の表面に陽
極酸化により酸化アルミニウム薄層を形成した絶縁金属
板を用いる。斯る金属基板<1)上には所定の間隔で所
定領域、即ち、低熱抵抗回路基板となる領域に高熱伝導
性フィラー(2)が含有された絶縁樹脂薄層(3)をス
クリーン印刷により所定の膜厚で付着する。
The first step of the present invention is to prepare a strip-shaped metal substrate (1), as shown in FIG. 1A. Aluminum is suitable for the metal substrate (1), and an insulating metal plate is used in which a thin layer of aluminum oxide is formed on the surface of the aluminum plate by anodizing. On such a metal substrate <1), a thin insulating resin layer (3) containing a highly thermally conductive filler (2) is formed by screen printing on a predetermined area at a predetermined interval, that is, an area that will become a low thermal resistance circuit board. It adheres to a film thickness of .

絶縁樹脂薄層(3)はエポキシ樹脂、ポリイミド樹脂、
フェノール樹脂、ブラチラール樹脂等の樹脂が用いられ
、その樹脂中にプレス金型よりもモース硬度の大きい八
λ*Os、AρN 、 SiC、ダイヤモンド及びBN
等のフィラー(2)が10%〜80%重量比で混入され
ている。
The thin insulating resin layer (3) is made of epoxy resin, polyimide resin,
Resins such as phenol resin and brachyral resin are used, and the resin contains 8λ*Os, AρN, SiC, diamond, and BN, which have a higher Mohs hardness than that of the press mold.
The filler (2) is mixed in a weight ratio of 10% to 80%.

本発明の第2の工程は第1図Bに示す如く、高熱伝導性
フィラー(2)を含有した絶縁樹脂薄1(3)が印刷さ
れた以外の領域に絶縁層(4)を形成するところにある
As shown in FIG. 1B, the second step of the present invention is to form an insulating layer (4) in an area other than the printed insulating resin thin layer 1 (3) containing a highly thermally conductive filler (2). It is in.

絶縁層(4)は絶縁樹脂薄層(3)と同じ!M詣が用い
られ、スクリーン印刷により絶縁樹脂薄層(3)と同一
膜厚となる様に付着させる。また、絶縁層(4)中に高
熱伝導性フィラーを含有させることも可能であるこの場
合の高熱伝導性フィラーはプレス金型のモース硬度より
小さいものを使用する。
The insulation layer (4) is the same as the insulation resin thin layer (3)! A thin layer of insulating resin (3) is applied using screen printing so that it has the same thickness as the thin insulating resin layer (3). It is also possible to include a highly thermally conductive filler in the insulating layer (4). In this case, the highly thermally conductive filler used has a hardness smaller than the Mohs hardness of the press mold.

本発明の第3の工程は第1図Cに示す如く、絶縁樹脂薄
層(3)上に所望形状の回路導体り5)を形成し、その
回路導体(5)上に複数の回路素子(6)を固着する。
In the third step of the present invention, as shown in FIG. 1C, a circuit conductor 5) having a desired shape is formed on the insulating resin thin layer (3), and a plurality of circuit elements ( 6) Fix.

回路導体(5)は絶縁樹脂薄層(3)及び絶縁層(4)
全面に銅箔を貼着して絶縁樹脂薄層(3)上のみに回路
導体(5)を形成する様にエツチングする。このとき鋼
箔の片面には接着剤があらかじめ付着されており、絶縁
樹脂薄層(3)及び絶縁層(4〉との接着性は十分であ
る。
The circuit conductor (5) includes an insulating resin thin layer (3) and an insulating layer (4)
Copper foil is pasted on the entire surface and etched so that the circuit conductor (5) is formed only on the thin insulating resin layer (3). At this time, adhesive has been applied to one side of the steel foil in advance, and the adhesiveness with the thin insulating resin layer (3) and the insulating layer (4>) is sufficient.

回路導体(5)上にはトランジスタ、集積回路、チップ
部品等の複数の回路素子(6)を固着し、必要とされる
ものは近傍の回路導体(5)とワイヤ等で接続する。
A plurality of circuit elements (6) such as transistors, integrated circuits, chip parts, etc. are fixed on the circuit conductor (5), and the necessary ones are connected to the neighboring circuit conductor (5) by wires or the like.

本発明の第4の工程は第1図りに示す如く、絶縁樹脂薄
層(3)近傍の絶縁層(4)領域の基板(1)をプレス
金型(7)でプレス打抜きを行い第1図Eに示す如く、
個々の混成集積回路(8)に分離するところにある。
The fourth step of the present invention is to press punch the substrate (1) in the insulating layer (4) area near the insulating resin thin layer (3) using a press die (7) as shown in the first diagram. As shown in E,
It is separated into individual hybrid integrated circuits (8).

このときのプレス金型(7)のプレス面は回路素子(6
)と接しない様に凹型に形成されていることが望ましい
At this time, the press surface of the press mold (7) is the circuit element (6).
) is desirably formed in a concave shape so as not to come into contact with the

断る本発明に依れば、高熱伝導性フィラー(2)が含有
された絶縁樹脂薄層(3)をプレス金型り7)でプレス
打抜きすることなく、低熱抵抗用の混成集積回路(8)
を形成することができ、プレス金型(7)が摩耗されず
プレス金型(7)の寿命を著しく延ばすことができる。
According to the present invention, a hybrid integrated circuit (8) for low thermal resistance can be produced without press punching an insulating resin thin layer (3) containing a highly thermally conductive filler (2) using a press die (7).
can be formed, the press die (7) is not worn out, and the life of the press die (7) can be significantly extended.

(ト)発明の効果 以上に詳述した如く、本発明に依れば、高熱伝導性フィ
ラーを含有する絶縁樹脂薄層を直接プレス金型によって
プレス打抜きしないためプレス金型の寿命を著しく延ば
すと同じに低熱抵抗用の混成集積回路を個々に分離する
ことができる。
(G) Effects of the Invention As detailed above, according to the present invention, the life of the press mold can be significantly extended because the thin insulating resin layer containing a highly thermally conductive filler is not directly punched by the press mold. Similarly, hybrid integrated circuits for low thermal resistance can be individually separated.

また本発明ではプレス金型で直接絶縁樹脂薄層をプレス
打抜きしないため、モース硬度の高いフィラーを絶縁樹
脂薄層中に含有させることができることにより、高い熱
伝導率を有する混成集積回路を容易に提供することがで
きる。
In addition, in the present invention, since the thin insulating resin layer is not directly press punched with a press mold, a filler with high Mohs hardness can be contained in the thin insulating resin layer, making it possible to easily produce a hybrid integrated circuit with high thermal conductivity. can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A乃至第1図Eは本発明の詳細な説明する断面工
程図である。 (1)・・・金属基板、 (2)・・・高熱伝導性フィ
ラー、(3)・・・絶縁樹脂薄層、 (4)・・・絶縁
層、 (5)・・・回路導体、 (6)・・・回路素子
、 (7)・・・プレス金型。
FIGS. 1A to 1E are cross-sectional process diagrams illustrating details of the present invention. (1)...Metal substrate, (2)...High thermal conductivity filler, (3)...Insulating resin thin layer, (4)...Insulating layer, (5)...Circuit conductor, ( 6)...Circuit element, (7)...Press mold.

Claims (4)

【特許請求の範囲】[Claims] (1)短冊状の金属基板を準備し、前記基板上の複数の
所定領域に高熱伝導性フィラーが含有された絶縁樹脂薄
層をスクリーン印刷し、前記高熱伝導性フィラーを含有
する前記絶縁樹脂薄層が印刷された以外の前記基板領域
上に絶縁層を形成し、前記高熱伝導性フィラーが含有さ
れた絶縁樹脂薄層上に所望形状の回路導体を形成し、前
記回路導体上に回路素子を固着した後、前記絶縁樹脂薄
層近傍の前記絶縁層領域の前記基板をプレス打抜きし、
個々の混成集積回路に分離することを特徴とする混成集
積回路の製造方法。
(1) Prepare a strip-shaped metal substrate, screen print an insulating resin thin layer containing a highly thermally conductive filler on a plurality of predetermined areas on the substrate, and then screen print the insulating resin thin layer containing the highly thermally conductive filler. An insulating layer is formed on the substrate area other than the printed layer, a circuit conductor having a desired shape is formed on the insulating resin thin layer containing the highly thermally conductive filler, and a circuit element is formed on the circuit conductor. After fixing, press punching the substrate in the insulating layer region near the insulating resin thin layer,
A method for manufacturing a hybrid integrated circuit, characterized by separating it into individual hybrid integrated circuits.
(2)前記高熱伝導性フィラーのモース硬度は前記プレ
ス打抜き用のプレス金型のモース硬度よりも大きいこと
を特徴とする請求項1記載の混成集積回路の製造方法。
(2) The method for manufacturing a hybrid integrated circuit according to claim 1, wherein the Mohs hardness of the highly thermally conductive filler is greater than the Mohs hardness of the press die for press punching.
(3)前記絶縁層中には少なくとも前記プレス金型のモ
ース硬度よりも小さいモース硬度を有する高熱伝導性フ
ィラーが含有されていることを特徴とする請求項1記載
の混成集積回路の製造方法。
(3) The method of manufacturing a hybrid integrated circuit according to claim 1, wherein the insulating layer contains at least a highly thermally conductive filler having a Mohs hardness smaller than the Mohs hardness of the press mold.
(4)前記金属基板は絶縁処理されたアルミニウム基板
を用いたことを特徴とする請求項1記載の混成集積回路
の製造方法。
(4) The method of manufacturing a hybrid integrated circuit according to claim 1, wherein the metal substrate is an aluminum substrate treated with insulation.
JP63144028A 1988-06-10 1988-06-10 Method for manufacturing hybrid integrated circuit Expired - Fee Related JPH0740632B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63144028A JPH0740632B2 (en) 1988-06-10 1988-06-10 Method for manufacturing hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63144028A JPH0740632B2 (en) 1988-06-10 1988-06-10 Method for manufacturing hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPH01312890A true JPH01312890A (en) 1989-12-18
JPH0740632B2 JPH0740632B2 (en) 1995-05-01

Family

ID=15352644

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63144028A Expired - Fee Related JPH0740632B2 (en) 1988-06-10 1988-06-10 Method for manufacturing hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH0740632B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103328379B (en) 2011-04-18 2015-04-08 昭和电工株式会社 Process for producing carbonyl sulfide

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715496A (en) * 1980-07-02 1982-01-26 Sumitomo Bakelite Co Method of producing heat dissipating insulating board
JPS5910080A (en) * 1982-07-07 1984-01-19 Nec Ic Microcomput Syst Ltd Receiver for television sound multiplex broadcast
JPS605589A (en) * 1983-06-23 1985-01-12 松下電器産業株式会社 High thermal conductive metal base printed board
JPS6050991A (en) * 1983-08-31 1985-03-22 昭和電工株式会社 Electrically insulated substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715496A (en) * 1980-07-02 1982-01-26 Sumitomo Bakelite Co Method of producing heat dissipating insulating board
JPS5910080A (en) * 1982-07-07 1984-01-19 Nec Ic Microcomput Syst Ltd Receiver for television sound multiplex broadcast
JPS605589A (en) * 1983-06-23 1985-01-12 松下電器産業株式会社 High thermal conductive metal base printed board
JPS6050991A (en) * 1983-08-31 1985-03-22 昭和電工株式会社 Electrically insulated substrate

Also Published As

Publication number Publication date
JPH0740632B2 (en) 1995-05-01

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