JPH01307090A - Semiconductor memory - Google Patents

Abstract

PURPOSE:To invert the output sequence of data in a simple constitution by selectively output the data from the low order to the high order of a serial address and from the high order to low order of the address based on the address given from an address selector means. CONSTITUTION:When a selecting signal to select the output of an up-counter 1 is produced from a mode switching control circuit 4, an address selector 3 is operated so as to make the output address of the counter 1 pass. Since the output address is given to a selector 7 for the data, the data are serially outputted in the sequence from a low address 0 in a serial data register to the high address from a selector 7. Next, when the selecting signal to select the output of a down-counter 2 is produced from the circuit 4, the selector 3 operates so as to make the output address of the counter 2 pass, and the data are successively outputted in the sequence from the high address 255 of the register 6 to the low address.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor memory, and more particularly to a semiconductor memory having a serial access memory section.

Random access with the same configuration and functions as general memory
Serial access memory section (rSAM, hereinafter referred to as rSAM) that can input and output data using the memory section and serial clock.
memory (dual boat)
(memory), serial access is required to access the SAM section.
There is only an up counter that counts up the clock, selects serial address data in the SAM section from low to high, and outputs the SAM section data. In a memory, the output order of serial data with respect to a serial clock input is only in the forward direction from a low serial address to a high serial address with respect to SAM part data.

Therefore, in such a conventional semiconductor memory, when the output order of the SAM part data of the dual port memory is reversed (normally, the display screen is displayed horizontally inverted, that is, mirror effect). For serial output of dual-port memory, it is necessary to install a special circuit outside the dual-port memory and reverse the memory output order for each horizontal display line, which increases the number of parts, board area, and cost. This will cause problems.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor memory having a function of reversing the output order of data.

In order to achieve the above-mentioned object, the semiconductor memory of the present invention includes an up counter that counts up serial addresses in accordance with the input of a serial clock, a down counter that counts down serial addresses, and a switching signal. address selection means for outputting either the output of the up-counter or the output of the down-counter based on; a serial data register; and an address given by the selection means for the data output of the serial data register; and data selection means for outputting data in the order of outputting data from low to high serial addresses or from high to low serial addresses based on the serial address.

With this configuration, data can be output in reverse order using the memory alone without any external additional circuitry, and the display screen can easily be reversed horizontally, making it a high-level computer screen display system. can be easily configured.

叉”L5 An embodiment shown in the drawings will be described below.

In the figure, (1) is an up counter to which an 8-bit column address is given to the LOAD terminal and a serial clock is given to the terminal (IN), and (2) is the up counter (
The same signal as in 1) is given, but this is a down counter different in that it counts in the down direction. (3) is each 8 of the up counter (1) and down counter (2).
This is an address selector that selectively passes output consisting of bits, and plays a role similar to a switch. (4) is below πττ, ττ.

This is a mode switching control circuit that forms a selection signal using a control signal such as W''T, and switches the address selector (3) according to the content of this selection signal.

In addition, instead of providing such a mode switching control circuit (4), an extra pin is provided externally to the memory, and high level and low level signals are sent to the address selector (3) via this pin. may be given to control switching of the address selector.

However, if the mode switching circuit (4) is provided as shown, there is no need to increase the number of pins, which is preferable for semiconductor memory. In addition, in the figure, the dotted line frame (5)
The inside indicates the configuration introduced in this embodiment.

(6) is a 256-bit serial data register, and its data is sent from the low address φ to the high address 2.
55 through 256 output paths. (7
) is a data selector which serially outputs the output from the serial data register (6) based on the address given from the address selector (3). (8) is an output buffer that receives this output.

Now, from the mode switching control circuit (4) to the up counter (
When the selection signal to select the output of 1) is output, the address selector (3) acts to pass the output address of the up counter (1), and this output address is sent to the data selector (7). Since the serial
The data of the data register (6) from the low address φ to the high address is serially outputted from the data selector (7). If the serial data at this time is displayed as an image, an image drawn from the left side to the right side of the display screen will be obtained.

Next, when a selection signal for selecting the output of the down counter (2) is output from the mode switching control circuit (4), the address selector acts to pass the output address of the down counter (2), In response, the data selector (7) outputs the serial data register (6
) data at lower addresses are output in order from the data at the higher address 255. Therefore, the displayed image in this case is drawn from the right side to the left side of the screen, and an image that is left and right opposite to that when the serial clock from the up counter is passed is obtained.

As described above, in this embodiment, the semiconductor memory is provided with a function for outputting SAM data in reverse order. Note that the mode switching control circuit (4) in the above embodiment has πXτ, ττ, and WT.
These control signals can be controlled based on external operations as is well known.

Since the beginning of the main group As described above, according to the semiconductor memory of the present invention, the display screen can be displayed in reverse horizontally (mirror effect) without any external circuit.
This can be realized simply by controlling control signals, and the function can be easily improved when designing an image display circuit, without increasing the number of parts or cost.

[Brief explanation of the drawing]

The figure is a block circuit diagram of a semiconductor memory embodying the present invention. (1)-11 Atsubu counter. (2)...down counter. (3) ---Address selector. (6)--Serial data register. (7) - Selector for data.

Claims (1)

[Claims] (1) In a semiconductor memory that has a serial access memory section that can input and output data using a serial clock, there is an up counter that counts serial addresses in the upward direction according to the input of the serial clock, and a down counter that counts in the downward direction according to the input of the serial clock. a counter; and address selection means for outputting either the output of the up counter or the output of the down counter based on a switching signal;
Serial data register and the serial data register
A semiconductor memory comprising: data selection means for outputting data from a register in the order of data output from low to high serial addresses or from high to low serial addresses based on the address given from the selection means.