JPH01298793A - Method of mounting chip component - Google Patents
Method of mounting chip componentInfo
- Publication number
- JPH01298793A JPH01298793A JP13000888A JP13000888A JPH01298793A JP H01298793 A JPH01298793 A JP H01298793A JP 13000888 A JP13000888 A JP 13000888A JP 13000888 A JP13000888 A JP 13000888A JP H01298793 A JPH01298793 A JP H01298793A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- adhesion
- chip component
- adhesive
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title description 8
- 230000001070 adhesive effect Effects 0.000 claims abstract description 33
- 239000000853 adhesive Substances 0.000 claims abstract description 30
- 239000000463 material Substances 0.000 claims abstract description 28
- 239000006071 cream Substances 0.000 abstract description 4
- 229910000679 solder Inorganic materials 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 2
- 238000000576 coating method Methods 0.000 abstract 2
- 238000000926 separation method Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、チップ部品を導電回路上の所定箇所に導電
不良を防止して実装し得るチップ部品の実装方法に関す
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting a chip component in which the chip component can be mounted at a predetermined location on a conductive circuit while preventing conduction defects.
電子回路基板上には多数のIC(集積回路)やトランジ
スタやLEDなどのチップ部品が実装される。A large number of ICs (integrated circuits), transistors, LEDs, and other chip components are mounted on the electronic circuit board.
このチップ部品の実装に際しては、第2図に示す如く、
導電性接着剤やクリームハンダなどの導電性接続材料2
を銀や銅などの食型導材からなる電導回路3側にまず盛
り付けていた。なお4はポリエステルやポリイミードな
どからなるフィルムベースである。次いで、この盛り付
は部分にチップ部品6のリード8先端部であるリード接
着端10を配設するようにしている。When mounting this chip component, as shown in Figure 2,
Conductive connection materials such as conductive adhesives and cream solders 2
was first placed on the conductive circuit 3 side made of an edible conductive material such as silver or copper. Note that 4 is a film base made of polyester, polyimide, or the like. Next, in this arrangement, the lead adhesive end 10, which is the tip of the lead 8 of the chip component 6, is arranged in the portion.
しかしこのような実装方法によると、チップ部品6のリ
ード接着端10の位置するであろう箇所を中心にその周
囲まで導電性接続材料2を広く塗布しておく必要があり
、これにより確実なチップ部品6の実装を果さんとして
いた。However, according to such a mounting method, it is necessary to widely apply the conductive connecting material 2 around the area where the lead bonding end 10 of the chip component 6 will be located, which makes it possible to secure the chip. I was trying to mount part 6.
しかし、このようにしても、それでもチップ部品6のリ
ード接着端lOは充分に接着剤上に位置せぬ場合が生じ
、チップ部品6の剥離脱落事故、あるいはまた導電不良
などの事故が生じ製品の信転性が劣るものであった。ま
た、余分にかつ広く導電性接続材料2が盛り付けられる
結果、接着剤の必要箇所以外への食み出しが生じ短絡事
故等の不都合が生じ、細密なパターノへの従来接続技術
の適用が不可能である。更にまた、余分な接着材料の使
用は経済的にも極めて不利であった。However, even with this method, the lead adhesive end lO of the chip component 6 may not be sufficiently positioned on the adhesive, resulting in accidents such as peeling and falling of the chip component 6, or poor conductivity, resulting in damage to the product. Confidence was poor. In addition, as a result of the conductive connecting material 2 being spread over and over a wide area, the adhesive protrudes into areas other than where it is needed, causing short circuits and other inconveniences, making it impossible to apply conventional connection techniques to fine patterns. It is. Furthermore, the use of extra adhesive material was extremely disadvantageous economically.
そこでこの発明の目的は、上述の種々不都合を改善する
にある。Therefore, an object of the present invention is to improve the various disadvantages mentioned above.
この目的を達成するためにこの発明は、チップ部品のリ
ード接着端に導電性接続材料を被着し、その後このチッ
プ部品のリード接着端を導電回路の所定箇所に配設する
ことによりチップ部品の確実な実装を果すことを特徴と
する。In order to achieve this object, the present invention applies a conductive connecting material to the lead bonding end of a chip component, and then arranges the lead bonding end of the chip component at a predetermined location of a conductive circuit. It is characterized by reliable implementation.
以下図面に基づいてこの発明の詳細な説明する。 The present invention will be described in detail below based on the drawings.
第1図において、チップ部品6には接続用端子であるリ
ード8が設けられている。このリード8の夫々の接着端
10、・・・には導電性接着剤やクリームハンダなどの
導電性接続材料2が5〜500μの厚さに被着される。In FIG. 1, a chip component 6 is provided with leads 8 which are connection terminals. A conductive connecting material 2 such as a conductive adhesive or cream solder is applied to each bonded end 10, . . . of the lead 8 to a thickness of 5 to 500 μm.
そしてこの時、リード接着端10に充分に導電性接続材
料2が被着し、その被着が確実になるように、接続材料
2のリード接着端10側への押し付けを充分にすること
が好ましい。被着方法としては、導電性接続材料2を剥
離台上に所定厚さの層状に設けて構成した接着層台上に
チップ部品6のリード接着端lOを一旦接着させ、必要
部分だけ接着剤2を剥離させ、リード8のリード接着端
10下面に転移させて実現するなどにより容易に実現で
きる。この時、接着剤として粘度の低い流動性の高いも
のを使用する等により、前述転移工程により剥離転移し
た導電性接続材料2の欠陥部は、しばらくすれば、周囲
の接続材料2の流れ込みにより、埋設し、再び使用可能
域となるので、このように台紙を構成してもよい。ある
いは、−度限りの使用として順次隣接箇所から使用する
構成としてもよいのは勿論である。At this time, it is preferable to sufficiently press the connecting material 2 against the lead adhesive end 10 side so that the conductive connecting material 2 is sufficiently adhered to the lead adhesive end 10 and the adhesion is ensured. . As for the adhesion method, the lead adhesive end lO of the chip component 6 is once adhered to an adhesive layer stand formed by providing a layer of conductive connection material 2 of a predetermined thickness on a peeling table, and then the adhesive 2 is applied only to the necessary parts. This can be easily realized by peeling off the adhesive and transferring it to the lower surface of the lead adhesive end 10 of the lead 8. At this time, by using an adhesive with low viscosity and high fluidity, etc., the defective part of the conductive connecting material 2 that has been peeled off and transferred in the above-mentioned transfer process will, after a while, be affected by the flow of the surrounding connecting material 2. The mount may be configured in this way because it is buried and becomes a usable area again. Alternatively, it goes without saying that the configuration may be such that the adjacent locations are sequentially used for one-time use.
なお、この発明は次のような現象に着目して完成された
。This invention was completed by focusing on the following phenomenon.
つまり、チップ部品のリード接着端をフィルムベース上
の導電回路に導電性接着剤やクリームハンダなどの導電
性接着材料により電気的かつ物理的に接続するのである
が、導電性接着材料は基板であるフィルムベースの導電
回路側とは高い接着効果を示すが、金属端子であるリー
ド接着端側とはその接着効果が不良であった。In other words, the adhesive end of the lead of the chip component is electrically and physically connected to the conductive circuit on the film base using a conductive adhesive material such as conductive adhesive or cream solder, but the conductive adhesive material is the substrate. Although it showed a high adhesive effect on the conductive circuit side of the film base, the adhesive effect was poor on the lead adhesive end side, which is a metal terminal.
これは、夫々の材料上の特質によるものでもあろう。し
かしまた、リード接着端に充分に接続材料が供給されて
おらず、また両者を確実になじませる工程を欠いていた
とも言えよう。This may be due to the characteristics of each material. However, it can also be said that the connecting material was not sufficiently supplied to the bonded ends of the leads, and that there was a lack of a process to ensure that the two were blended together.
以上説明したようにこの発明は、チップ部品のリード接
着端に先に導電性接続材料を被着しておき、その後、導
電回路の所定箇所に圧着させる構成なので、
■、チップ部品のリード接着端の導電回路への接着が確
実となり、従来生じていたチップ部品の導電回路側のベ
ース基板からの剥離脱落事故、導電不良などの不都合を
極めて高い信頼性により防止し得る。As explained above, in this invention, a conductive connecting material is first applied to the adhesive end of the lead of a chip component, and then it is crimped to a predetermined location of the conductive circuit. The adhesion to the conductive circuit becomes reliable, and inconveniences such as the chip component peeling off from the base substrate on the conductive circuit side and poor conductivity, which conventionally occur, can be prevented with extremely high reliability.
つまり、接着効果の低いリード接着端と導電性接着材料
との接続開始をまず確実に果し得るので、全体として高
い信転性を発揮し得るのである。In other words, since the connection between the lead adhesive end, which has a low adhesive effect, and the conductive adhesive material can be started reliably, high reliability can be exhibited as a whole.
■、チップ部品のリード接着端にのみ、導電性接続材料
が盛りつけられる構成であるので、余分な接着剤の付着
が極力防止され、そのため従来生じていた余分接続材料
の、接着後の食み出しが防止されるので、細密なパター
ンへのチップ部品の導電接着が可能となる。■Since the conductive connecting material is applied only to the bonded ends of the leads of the chip components, adhesion of excess adhesive is prevented as much as possible, and as a result, the excess bonding material that previously occurred protrudes after bonding. Since this prevents chip components from being electrically conductively bonded to a fine pattern.
■、導電性接続材料はリードの接着端面のみでよいので
、必要充分な少量しか使用しないので製造コストが低廉
となり、経済的に極めて有利である。(2) Since the conductive connecting material only needs to be used on the bonded end surfaces of the leads, only a small enough amount is used, resulting in low manufacturing costs, which is extremely advantageous economically.
第1図は、この発明の実施例を示す部分断面側面図であ
る。
第2図は、従来例を示す部分断面側面図である。
図において、2は導電性接続材料、6はチップ部品、8
はリード、10はリード接着端である。
特許出願人 株式会社 アビサレ代理人 弁理士
西 郷 義 美FIG. 1 is a partially sectional side view showing an embodiment of the invention. FIG. 2 is a partially sectional side view showing a conventional example. In the figure, 2 is a conductive connection material, 6 is a chip component, and 8 is a conductive connection material.
is a lead, and 10 is a lead adhesive end. Patent applicant: Abisare Co., Ltd. Agent: Yoshimi Saigo
Claims (1)
し、その後このチップ部品のリード接着端を導電回路の
所定箇所に配設することによりチップ部品の確実な実装
を果すことを特徴とするチップ部品の実装方法。1. The chip component is reliably mounted by applying a conductive connecting material to the adhesive end of the lead of the chip component, and then arranging the adhesive end of the lead of the chip component at a predetermined location of the conductive circuit. How to mount chip components.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13000888A JPH01298793A (en) | 1988-05-27 | 1988-05-27 | Method of mounting chip component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13000888A JPH01298793A (en) | 1988-05-27 | 1988-05-27 | Method of mounting chip component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01298793A true JPH01298793A (en) | 1989-12-01 |
Family
ID=15023866
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13000888A Pending JPH01298793A (en) | 1988-05-27 | 1988-05-27 | Method of mounting chip component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01298793A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04196498A (en) * | 1990-11-28 | 1992-07-16 | Fujitsu Ltd | Method for applying solder to surface-mount type electronic device and its lead terminal |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60152092A (en) * | 1984-01-20 | 1985-08-10 | 株式会社日立製作所 | Semiconductor device |
JPS60201696A (en) * | 1984-03-27 | 1985-10-12 | 松下電器産業株式会社 | Method of soldering flt package |
-
1988
- 1988-05-27 JP JP13000888A patent/JPH01298793A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60152092A (en) * | 1984-01-20 | 1985-08-10 | 株式会社日立製作所 | Semiconductor device |
JPS60201696A (en) * | 1984-03-27 | 1985-10-12 | 松下電器産業株式会社 | Method of soldering flt package |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04196498A (en) * | 1990-11-28 | 1992-07-16 | Fujitsu Ltd | Method for applying solder to surface-mount type electronic device and its lead terminal |
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