JPH0129330B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a line switching control method for a duplex data communication processing system.

Prior art and problems In data exchange, multiple lines are connected to the communication control unit CCE, and the central processing unit CPU handles data sent from the terminal through one of the lines.
Processing such as sending the data to the destination terminal through the other one of the lines is performed. Systems with increased stability so that they can continue operating even if a failure occurs in some circuit elements use multiplexing of CPUs, CCEs, etc., and a conventional example of this is shown in Figure 1. Figure 1 is 0
This is an example of a data communication processing system that is multiplexed into two systems, system and system 1, where CPU0 and CPU1 are the central processing units of each system, CCE0 and CCE1 are the communication control units of each system,
ICU0 and ICU1 are interface control devices for each system (here simply referred to as control devices), LSW is a line switching device, ISW is an ICU information switching device, MD is a modem device, and SWC is a system switching device.

In this system, the control signal from the system switching device SWC that detects the system status (act, standby) switches the ICU information switching device ISW to the ICU0 side if the 0 system is active, and to the ICU1 side if the 1 system is active, and controls the system. Provides information (LSW control information) from device ICU0 or ICU1 to line switching device LSW.
The line switching device LSW switches and connects the communication control device CCE0 or CCE1 to the modem device MD based on the information. For example, if system 0 is active and system 1 is standby, SWC switches ISW to ICU0 side,
LSW according to the command “Connect MD to CCE0” or “Connect MD to CCE1” from ICU0.
connects MD to CCE0 or CCE1. If the 0 system is active, the MD is often connected to CCE0, but if there is a request such as testing a specific line in the standby system, in this case the MD is connected to CCE1. In any case, the switching command comes from the act system.

By the way, the system switching device SWC is a central processing unit.
Acts of each system given from CPU0 and CPU1,
It simply switches the ICU information switching device ISW to the active ICU based on the standby information, and the ICU
Since the information switching device ISW only performs the switching, it would be wasteful to provide these with independent circuit configurations, as this would only make the overall configuration more complicated and expensive. In the conventional system, the line switching device LSW simply performs the switching operation and does not have special judgment ability, so it requires hardware such as SWC and ISW. However, if the line switching device LSW has a judgment function, SWC and ISW can be omitted, which enables cost reduction, miniaturization, etc.

Purpose of the invention The present invention facilitates maintenance work by providing an ICU information switching function in the line switching device LSW.
Reduces continuous cables during on-site construction and also reduces LSW
By using system control bits in the control information, the switching devices SWC and ISW are omitted, and the system configuration is simplified and miniaturized.

Structure of the Invention The present invention provides a line switching device between a duplexed communication control device and a common line device, also duplicates a central processing unit, and transfers switching control information from the duplexed central processing unit. In a line switching control method of a data communication processing system equipped with a control device that sends data to the line switching device, the switching control information includes, in addition to a bit indicating a switching destination, a control bit indicating whether the own system is to control or not. In addition, the switching control information from the control device is directly input to the line switching device, and when the control bit of the other system indicates not to control, it accepts the control bit of the other system, and then When the system indicates that the system is controlled, a circuit is provided for selecting switching control information excluding the control bits of the system, and line switching is performed based on the switching control information selected by the circuit. This will be explained in detail with reference to an example.

Embodiment of the Invention FIG. 2 shows an embodiment of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals. This example differs from FIG. 1 in two ways. One is that the line switching device LSW has a function for switching information from the ICU (selecting whether to take information via ICU0 or via ICU1), thereby omitting the ICU information switching device ISW. be. The ICU information switching device ISW shown in Figure 1 uses a relay as a switching means to enable switching with any signal, so the device is a line switching device.
Although it was installed separately from the LSW, in this case the ICU
ICU information switching device by using information through open collector type transistor contacts, for example.
The ISW has been computerized and miniaturized, and is housed within the line switching device LSW. The second point is the control device
LSW control information (ICU information) from ICU0 and ICU1,
In other words, system control bits are included in switching (line switching) control information, which indicates which system is active (in operation) or standby (waiting), and which system performs similar functions with priority given to the active side. switching device
This eliminates the need for SWC.

Figure 3 is an explanatory diagram of the LSW control information, where the 0th
Bit CTL is LSW control bit (system control bit)
It is. When controlling the line switching device LSW, this control bit CTL is set to "1". The 1st to 3rd bits are related to 0 system ICU0, and the 1st bit is
STB is the second and third strobe bits. The second bit is 1 when switching to CCE0.
(valid), and the third bit is set to 1 when switching to the CCE1 system. However, if both are 0 (invalid) or 1 (valid), both are invalid.
The 4th to 6th bits are related to the 1st system ICU1, and the meaning of each bit is the same as that of the 0th system. This LSW control information is provided for each system, and the control bit CTL
The side that sets it to 1 has control. FIG. 3b is a time chart showing that the switching operation is performed at the rising edge of the strobe bit STB.

Figure 4 is installed in the line switching device LSW.
This is a configuration diagram of the LSW control information switching circuit, where A0 is the switching unit that receives the 0-system LSW control information via the control device ICU0, and A1 is the switching unit that receives the LSW control information of the 0 system via the control device ICU1.
This is a switching unit that receives system LSW control information. Taking switching unit A0 as an example, if control bit CTL is 1, flip-flop FF0 is set, tri-state buffer TS0 is turned on, and STB, CCE are turned on.
0 and CCE1 are output to the control circuit CNT of FIG. 5a. The same applies to the switching unit A1, where FF1 is a flip-flop that enables its own system, and TS1 is a tri-state buffer. However, if the other side is controlled first, control of the own system is prevented, and the outputs of the flip-flops FF0 and FF1 are used as opening/closing control signals for the input gates G1 and G0 of the other side. In other words, if the 0 system controls first, the flip-flop FF0 goes to L (low) level, and even if the 1 system closes the AND gate G1 and tries to control it, its CTL=1 is the same as that of the AND gate G.
1 and does not reach flip-flop FF1,
The FF1 is not set. Therefore, control remains in the 0 system's hands. When the 0 system sets the CTL bit to 0, FF0 is reset, so the 1 system can set FF1 and take control.
Since FF1 becomes L, AND gate G0 is closed, and FF0 cannot be set for the 0 system. Furthermore, R01,
R02, R11, R12 are receivers of LSW control information, D0, D1 are control flip-flops FF
This is a driver for displaying the status of 0 and FF1 (CTL read).

FIG. 5a shows a specific example of the control circuit CNT provided in the line switching device LSW, in which G11 to G14 are AND gates, G15 and G16 are OR gates, and FF.
is a flip-flop for line switching. This flip-flop FF Q output
(shown as a switch in Figure 2) and its H
Line switching is performed at the (high) level and L level.
G22 is an or gate. Since there are generally multiple lines, these are shown as xn in the diagram.
Switching is performed simultaneously for n lines.

The LSW control information shown in Figure 3a has 8 bits,
The 0th bit is the CTL bit, the 1st to 3rd bits are control information from the 0 system, the 4th to 6th bits are control information from the 1 system, and the 7th bit is an allowance. In the case of 0 system control, the 4th to 6th bits for 1 system are idle, and in the case of 1 system control, the 1st to 3rd bits are idle, but these are kept the same content.

Next, the entire operation will be explained with reference to FIG.
LSW control information is provided by the central processing unit CPU0 of each system.
The signal is sent from the CPU 1 and transferred to the switching units A0 and A1 (FIG. 4) of the line switching device LSW via the control devices ICU0 and ICU1. On the other hand, at the time of transmission, line data is sent from central processing units CPU0 and CPU1 to communication control units CCE0 and CCE1, where it is parallel-serial converted and sent to the line through line switching device LSW and modem device MD. At the time of reception, the route is the opposite.

Now (1) Control bits included in LSW control information
When CTL is set to 1, the flip-flop shown in Figure 4
Corresponding sides of FF0 and FF1 are set to form a path to the control circuit CNT shown in FIG. 5a. (2) Next, read the state of the LSW control bit. 0
If so, the other system is being controlled, so take your timing and go to (1) again. If it is 1, control is possible. (3)CCE0,
Program CCE1 and STB as 1/0 according to the time chart in Figure 3b. At this point, a path to the control circuit has already been formed. (4) When the switching control is completed, set the control bit CTL to 0 and disconnect the above path (set the Q output of the relevant flip-flop to 0).

Effects of the Invention As described above, the present invention has advantages such as simplifying and downsizing the configuration of a data communication processing system, facilitating maintenance work, and eliminating connection cables during on-site construction.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a data communication processing system employing a conventional line switching control method, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 is a block diagram of a data communication processing system employing a conventional line switching control method.
An explanatory diagram of the LSW control information, and FIGS. 4 and 5 are diagrams showing the configuration of each part within the line switching device. In the diagram, CPU0 and CPU1 are central processing units, CCE
0, CCE1 are communication control devices, ICU0, ICU1 are control devices, LSW is a line switching device, MD is a modem device (line device), FF0, FF1 are flip-flops for switching control bits, G0, G1 are for double selection prevention. It is a gate circuit.

Claims (1)

[Claims] 1. A line switching device LSW is provided between the duplex communication control device CCE and the common line device MD,
In a line switching control method of a data communication processing system, the central processing unit CPU is also duplicated, and the switching control system includes a control unit ICU that sends switching control information from the duplicated central processing unit to the line switching device. In the information, there is a bit indicating the switch destination.
In addition to CCE0 and CCE1, a control bit CTL indicating whether or not the own system is to be controlled is included, and the switching control device from the control device is directly input to the line switching device, and the line switching device is configured to directly input the switching control device from the control device. When the control bit CTL indicates not to control, the control bit of the system is accepted,
A line switching system characterized by providing circuits A0 and A1 that select switching control information excluding the control bits of the system when the system indicates that the system is to be controlled, and switching the line based on the switching control information selected by the circuit. control method.