JPH01292320A - Picture display panel - Google Patents

Picture display panel

Info

Publication number
JPH01292320A
JPH01292320A JP12175288A JP12175288A JPH01292320A JP H01292320 A JPH01292320 A JP H01292320A JP 12175288 A JP12175288 A JP 12175288A JP 12175288 A JP12175288 A JP 12175288A JP H01292320 A JPH01292320 A JP H01292320A
Authority
JP
Japan
Prior art keywords
pixel
electrode
picture
electrodes
picture element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12175288A
Other languages
Japanese (ja)
Inventor
Nobuaki Kabuto
展明 甲
Kozo Sato
剛三 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12175288A priority Critical patent/JPH01292320A/en
Publication of JPH01292320A publication Critical patent/JPH01292320A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a large size picture having uniform a rate of aperture contg. no useless area by giving no redundancy of a picture element driving section to picture elements adjacent to bonded parts of substrates to each other provided with a picture element electrode, but giving redundancy picture elements other than those in the bonded parts. CONSTITUTION:Substrates 1L, 1R provided with picture element electrodes are bonded at a bonded part 3, and each electrode 4 is arranged with a same shape, same size, and same pitch while regulating a minimum breadth S3 permitting the arrangement of the picture element electrode to the same dimension as the gap S4 of all picture element electrodes 4 at near the bonded part 3. Thereafter, picture elements driving sections 5 for driving the electrodes 4 are arranged to the gaps of each electrode 4 with a same shape, same size, and same pitch on the substrates 1L, 1R, within a range of each substrate. Then, there remains still spatial margin in picture elements other than those adjacent to the bonded part 3 even if a driving section 5 is arranged to the gap between the electrodes 4. A prepn. yield of the substrate 1 is improved by constituting a picture display panel by giving redundancy of picture element driving by arranging a picture element electrode driving section 6 to said marginal zone permitting driving of the electrode 4 by a driving section 6 even if a driving section 5 is not driven normally.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は主に複数枚の表示パネルを接合して大画面表示
を可能にする画像表示パネルの構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention mainly relates to the structure of an image display panel that enables large screen display by joining a plurality of display panels.

〔従来の技術〕[Conventional technology]

複数枚の画素電極付基板を集合させて、大画面表示用パ
ネルを形成する従来技術の一例として、実開昭60−1
91029号公報における記載がある。
As an example of the conventional technology of assembling a plurality of substrates with pixel electrodes to form a large screen display panel,
There is a description in Publication No. 91029.

これは、液晶パネルにおいて、電極付基板の少なくとも
一方を複数枚の基板で構成し、それら基板の側面で接合
して大形の複合基板とする。し、かる後に、該複合基板
と他方の基板との間に液晶を挟持する構造である。これ
まで、製造装置、歩留り等の面から画素型極付の大きな
一枚基板は造りに<<、従って大形の表示パネルを造る
ことは困難であると考えられていたが、本技術により、
電極付−枚基板の4倍程度の面積の大形表示パネルを得
ることも可能となる。
In this liquid crystal panel, at least one of the electrode-attached substrates is composed of a plurality of substrates, and these substrates are joined at the side surfaces to form a large composite substrate. After that, the structure is such that a liquid crystal is sandwiched between the composite substrate and the other substrate. Until now, it was thought that it would be difficult to manufacture large display panels due to manufacturing equipment, yield, etc., and it would be difficult to manufacture large single substrates with pixel-type electrodes, but with this technology,
It is also possible to obtain a large display panel with an area about four times that of the electrode-equipped substrate.

また、表示パネルを大形化するに伴い、パネルの歩留り
をいかに上げるかが問題であるとし、各画素に冗長性を
付与することが、日経エレクトロニクス、曵410 (
1986年12月15日)第193頁から第210頁に
おいて論じられている。
In addition, as display panels become larger, the issue is how to increase the yield of panels, and it is important to provide redundancy to each pixel, according to Nikkei Electronics, 410 (
December 15, 1986), pages 193-210.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記第1の従来技術により、画素電極付基板をそれらの
側面を接合した場合、各該基板の接合面形成精度、各画
素電極への配線必要幅確保等の観点から、接合部lこお
ける画素電極間隔が、他の部分で実現できる画素電極間
隔より広くなってしまう。従って、画素電極の大きさと
画素電極間のピッチを一定に保とうとすると、接合部に
おける画素電極間隔を他の部分にも適用しなければなら
ないため、接合部以外の他の部分では利用していない無
駄な領域が生じてしまう。すなわち、接合部がなければ
高い開口率が得られるが、接合部があることにより、接
合部以外の部分の開口率が、接合部の低い開口率で抑え
られることになる。
When substrates with pixel electrodes are bonded together at their side surfaces using the first conventional technique, from the viewpoint of forming the bonding surface of each substrate and ensuring the required width for wiring to each pixel electrode, the pixel at the bonding portion l The electrode spacing becomes wider than the pixel electrode spacing that can be realized in other parts. Therefore, in order to keep the size of the pixel electrodes and the pitch between the pixel electrodes constant, the pixel electrode spacing at the joint must be applied to other parts, so it is not used in other parts other than the joint. This results in wasted area. That is, a high aperture ratio can be obtained without the joint, but with the joint, the aperture ratio of the portion other than the joint is suppressed by the low aperture ratio of the joint.

また、上記第2の従来技術によれば、比較的大画面の表
示パネルを高歩留りで形成できると推定されるが、まだ
十分ではなく、さらに大きな画面の表示パネルを造る場
合には、第1の従来技術を併用せざるを得ない。
Further, according to the second conventional technique, it is estimated that a display panel with a relatively large screen can be formed at a high yield, but this is still not sufficient, and when manufacturing a display panel with an even larger screen, it is necessary to It is necessary to use these conventional techniques together.

本発明の目的は、開口率が均一でかつ無駄な領域を持た
ない、大形画像表示パネルを得ることにある。
An object of the present invention is to obtain a large-sized image display panel that has a uniform aperture ratio and has no wasted area.

〔課題を解決するための手段〕 上記目的は、画素電極付基板相互の接合部に隣接した画
素には画素駆動部の冗長性を付加せず、接合部以外の画
素には冗長性を付加することにより、達成される。
[Means for solving the problem] The above purpose is not to add redundancy to the pixel drive unit to pixels adjacent to the joint between substrates with pixel electrodes, but to add redundancy to pixels other than the joint. This is achieved by:

〔作用〕[Effect]

接合部の画素には画素駆動部の冗長性を持たせないため
、冗長性を付加した接合部以外の画素に比べて小面積で
1画素を構成することができる。
Since the pixel at the junction part does not have redundancy in the pixel driving section, one pixel can be configured with a smaller area than pixels other than the junction part to which redundancy is added.

それによって生じた接合部画素のすき間を接合に要する
面積部分として用いる。接合部の画素数は、全体の画素
数から見ればごくわずかであり、大多数の画素には冗長
性が付加されているので、高歩留りが期待できる。さら
に、接合部では冗長性を付加していない分、開口率を高
くすることができるので、全体の開口率が接合部の開口
率で低く抑えられる心配がなくなる。
The resulting gap between the junction pixels is used as the area required for the junction. The number of pixels at the junction is very small compared to the total number of pixels, and redundancy is added to most of the pixels, so a high yield can be expected. Furthermore, since redundancy is not added at the joint, the aperture ratio can be increased, so there is no need to worry about the overall aperture ratio being kept low by the aperture ratio of the joint.

〔実施例〕〔Example〕

以下、本発明をアクティブマトリクス方式液晶表示パネ
ルに適用した場合を例にとり説明する。
Hereinafter, the present invention will be explained using an example in which the present invention is applied to an active matrix type liquid crystal display panel.

第1図は、本発明を適用した画像表示パネルの、画素電
極付基板接合部及びその周辺部付近の模式正面図、第2
図は、画像表示素子として液晶素子を用いた本発明の一
実施例化よる画像表示パネルの断面図である。
FIG. 1 is a schematic front view of an image display panel to which the present invention is applied;
The figure is a sectional view of an image display panel according to an embodiment of the present invention using a liquid crystal element as an image display element.

第1図及び第2図において、画素電極付基板1z、IJ
Iは接合部3で接合され、−枚の大形基板を形成してい
る。4は各画素の表示素子(第2図の例では液晶素子)
を駆動する画素電極であり、5は各画素電極4を駆動す
る第1の画素駆動及び配線部であり、6は前記画素駆動
及び配線部5に異常がある場合に画素電極4を駆動する
第2の画素駆動及び配線部、7は対向共通電極、8は上
部基板、9は液晶である。
In FIGS. 1 and 2, the pixel electrode-attached substrate 1z, IJ
I is joined at the joining part 3 to form -2 large-sized substrates. 4 is the display element of each pixel (liquid crystal element in the example in Figure 2)
5 is a first pixel drive and wiring section that drives each pixel electrode 4; 6 is a first pixel drive and wiring section that drives the pixel electrode 4 when there is an abnormality in the pixel drive and wiring section 5; 2 is a pixel drive and wiring section, 7 is a common electrode, 8 is an upper substrate, and 9 is a liquid crystal.

一般に、配線部や画素駆動部5及び6は不透明であるこ
とが多く、表示に寄与する画素駆動電極4とはあまり重
複しない。表示に寄与する各画素駆動電極4は、外観上
から、すべて同一形状、同一サイズ、同一ピッチで配置
し、かつそのすき間がなるべく小さい方が良い。一方、
2枚の画素駆動電極付基板ILとIRの接合部3付近は
、接合による段差や接合位置すれ等を考慮すると、ある
一定の巾83部分には画素駆動電極4や、画素駆動及び
配線部5,6が配置できない。そこで、第1図に示すよ
うに、接合部3付近で、画素電極4が配置できる最小の
巾83をすべての各画素電極4のすき間S4と同一寸法
として、各画素電極4を同一形状、同一サイズ、同一ピ
ッチで配置する。
Generally, the wiring portions and the pixel drive portions 5 and 6 are often opaque, and do not overlap much with the pixel drive electrodes 4 that contribute to display. From the viewpoint of appearance, it is preferable that the pixel drive electrodes 4 that contribute to display are all arranged in the same shape, the same size, and at the same pitch, and that the gaps between them are as small as possible. on the other hand,
In the vicinity of the junction 3 between the two substrates IL and IR with pixel drive electrodes, the pixel drive electrode 4 and the pixel drive and wiring section 5 are located at a certain width 83, taking into account the difference in level caused by joining and the position of the joint. , 6 cannot be placed. Therefore, as shown in FIG. 1, the minimum width 83 in which the pixel electrodes 4 can be arranged near the joint 3 is set to be the same size as the gap S4 between all the pixel electrodes 4, so that each pixel electrode 4 has the same shape and the same size. Arrange with the same size and pitch.

次善こ、各画素電極4を駆動する第1の画素駆動部5(
右下りの斜め線でハツチングを施した部分)を、各画素
電極4のすき間に、各画素電極付基板IL、1月でそれ
ぞれの基板内で同一形状、同一サイズ、同一ピッチで配
置する。すると、接合部3に隣接する画素以外では、各
画素電極4のすき間に第1の画素駆動部5を配置しても
、空間的lこまだ余裕が残る。その余裕領域に、第2の
画素電極駆動部6を配置し、第1の画素駆動部5が正常
動作しない場合でも第2の画素駆動部6により画素駆動
電極4を駆動できるように画素駆動に冗長性を付加して
構成し、画素電極付基板の製造歩留り向上をねらってい
る。接合部3に隣接する画素には第2の画素駆動部を設
けないが、接合部3に隣接する画素数は表示パネル全体
の画素数から見ればわずかであり、この部分の画素駆動
部の欠陥による、表示パネル全体の歩留りへ、の影響は
少ない。
The next best thing is the first pixel driving section 5 (
The portions hatched with diagonal lines downward to the right) are arranged in the gaps between the pixel electrodes 4 in the same shape, the same size, and the same pitch within each pixel electrode-equipped substrate IL. Then, even if the first pixel driving section 5 is disposed in the gap between each pixel electrode 4 in pixels other than the pixels adjacent to the joint section 3, a spatial margin of 1 still remains. A second pixel electrode drive unit 6 is arranged in the margin area, and the pixel drive unit 6 is arranged so that the pixel drive electrode 4 can be driven by the second pixel drive unit 6 even when the first pixel drive unit 5 does not operate normally. By adding redundancy to the structure, the aim is to improve the manufacturing yield of substrates with pixel electrodes. A second pixel drive unit is not provided in the pixel adjacent to the joint part 3, but the number of pixels adjacent to the joint part 3 is small compared to the total number of pixels in the display panel, and a defect in the pixel drive part in this part This has little effect on the overall yield of the display panel.

また、第1図の実施例から、明らかに、画素電極付基板
ILとIRは、画素電極、画素駆動部、配線部等の配置
が接合部3に対し、左右線対称の関係になっている。
Further, from the embodiment shown in FIG. 1, it is clear that the pixel electrodes, pixel drive sections, wiring sections, etc. of the substrates IL and IR with pixel electrodes are arranged in a horizontally symmetrical relationship with respect to the joint section 3. .

このように、第1図の実施例によれば、表示に有効な画
素電極を同一形状、同一サイズ、同一ピッチで配置でき
、しかも画素電極を出来るだけ大きく保つことができる
めで、外観が良く、しかも接合部付近以外の画素駆動部
に冗長性を与えることにより、製造歩留りの向上が期待
できる利点がある。
As described above, according to the embodiment shown in FIG. 1, the pixel electrodes effective for display can be arranged in the same shape, the same size, and at the same pitch, and the pixel electrodes can be kept as large as possible, resulting in a good appearance. Moreover, by providing redundancy to the pixel drive sections other than those near the junction, there is an advantage that an improvement in manufacturing yield can be expected.

第3図は、第1図の実施例の表示パネルとしてアクティ
ブマトリクス方式液晶表示パネルに応用した電気的等価
回路を示した一例である。LCij(1tj=1t2.
3・・・)は液晶セル、TAijは第1の画素駆動トラ
ンジスタ、TBijは第2の画素駆動トランジスタ、D
Ajは第1のドレインバス、DBjは第2のドレインバ
ス、GLi、GRiはゲートバス、7は対向共通電極で
ある。
FIG. 3 shows an example of an electrical equivalent circuit applied to an active matrix type liquid crystal display panel as the display panel of the embodiment shown in FIG. LCij (1tj=1t2.
3...) is a liquid crystal cell, TAij is a first pixel drive transistor, TBij is a second pixel drive transistor, D
Aj is a first drain bus, DBj is a second drain bus, GLi and GRi are gate buses, and 7 is a common electrode.

第3図の実施例の動作を、液晶セルLC12を含む画素
をとりあげて説明する。液晶セルLC12はゲートバス
GLIに加えられる選択信号により、第1の画素トラン
ジスタTA12  と第2の画素トランジスタTB12
 がオンして°いる間に、それぞれ第1のドレインバス
DA2と第2のドレインバスDB2に印加されている信
号で液晶セルLC12を駆動する。ゲートバスGL1 
 に非選択信号が印加されている間、第1の画素トラン
ジスタTA12 と第2の画素トランジスタTB12は
共にオフとなり、第1のドレインバスDA2  及び第
2のドレインバスDB2  に加えられる信号に関係な
く、ゲートバスGL1  が選択されていた間の信号を
保持し、表示することになる。
The operation of the embodiment shown in FIG. 3 will be explained by taking up a pixel including the liquid crystal cell LC12. The liquid crystal cell LC12 is connected to the first pixel transistor TA12 and the second pixel transistor TB12 by a selection signal applied to the gate bus GLI.
While on, the liquid crystal cell LC12 is driven by the signals applied to the first drain bus DA2 and the second drain bus DB2, respectively. Gate bus GL1
While a non-selection signal is applied to , both the first pixel transistor TA12 and the second pixel transistor TB12 are turned off, regardless of the signals applied to the first drain bus DA2 and the second drain bus DB2. The signals while the gate bus GL1 was selected are held and displayed.

この時、例えば、第1のドレインバスDA2  や第1
の画素トランジスタTA 12が断線しても、第2のド
レインバスDB2  と第2の画素トランジスタ’l’
1312を通じて液晶セルLC12に信号を印加するこ
とができる。
At this time, for example, the first drain bus DA2 or the first
Even if the pixel transistor TA12 is disconnected, the second drain bus DB2 and the second pixel transistor 'l'
A signal can be applied to the liquid crystal cell LC12 through 1312.

また、第2のドレインバス1)B4第2の画素トランジ
スタTB12が断線した場合でも、第1のドレインバス
DA2  や第1の画素トランジスタTA12  が正
常であれば液晶セルLC12に信号を印加することがで
きる。すなわち、第1のものと第2のもののどちらかが
正常に動作すれば液晶セルLC12が駆動できる、すな
わち、冗長性を持つため、画素電極付基板の欠陥率が低
下し、歩留り向上が期待できる。
Furthermore, even if the second drain bus 1)B4 and the second pixel transistor TB12 are disconnected, if the first drain bus DA2 and the first pixel transistor TA12 are normal, a signal can be applied to the liquid crystal cell LC12. can. That is, if either the first or second one operates normally, the liquid crystal cell LC12 can be driven.In other words, since there is redundancy, the defect rate of the substrate with pixel electrodes is reduced, and an improvement in yield can be expected. .

第3図の実施例において、接合部3に隣接する画素では
、第2のドレインバスや第2の画素トランジスタを省き
、その部分を接合に要する部分として用いている。この
ように接合部3に隣接する画素は第2の画素駆動部を持
たないため、第2の画素駆動部を持つ他の画素に比べて
欠陥率が大きくなるが、全体の画素数に比べれば第2の
画素駆動部を持たない画素数が少ないので画素電極付基
板の歩留りへの影響は少ない。
In the embodiment shown in FIG. 3, in the pixel adjacent to the junction 3, the second drain bus and the second pixel transistor are omitted, and that part is used as the part required for the junction. Since the pixels adjacent to the junction 3 do not have a second pixel driver, the defect rate is higher than other pixels that have a second pixel driver, but compared to the total number of pixels. Since the number of pixels that do not have a second pixel driving section is small, there is little effect on the yield of the substrate with pixel electrodes.

第4図は、本発明の他の一実施例の画素電極付基板接合
部及びその周辺部付近の模式正面図である。第1図の実
施例と大きく異なる点は、接合部3に隣接する画素電極
41の形状が他の画素電極4とほぼ同じ面積を保ちなが
ら変形している点である。表示パネルとして液晶表示パ
ネルへ応用した場合、明るさの点からパネルの透過率を
高く、すなわち画素電極の大きさを出来るだけ大きくす
る必要がある。しかし、接合部3に隣接した画素では第
2の画素駆動及び配線部を除くだけでは、接合部に要す
る領域に足りない場合があり、どうしても画素電極部を
削る必要が出てくる。このままでは、表示パネルの均一
性から接合部隣接画素以外の画素電極も削らねばならず
、表示が暗くなってしまう。そこで、第4図では接合部
隣接画素電極の形状を他の画素と変えるものの面積を同
一として、外観上への影響を極力少なくし、かつ明るい
表示を得ている。このように、接合部隣接画素で画素形
状を変えて画素電極サイズを太き(することは、例えば
第3図の等価回路において、ケ−トバスG L i +
 G Rr  が接合部3の手前で終端していることか
ら、これらゲートバスの配線領域を接合部隣接画素に限
り画素電極領域として用いることで容易に実現できる。
FIG. 4 is a schematic front view of the pixel electrode-attached substrate junction and its surrounding area in another embodiment of the present invention. A major difference from the embodiment shown in FIG. 1 is that the shape of the pixel electrode 41 adjacent to the joint portion 3 is deformed while maintaining approximately the same area as the other pixel electrodes 4. When applied to a liquid crystal display panel as a display panel, it is necessary to increase the transmittance of the panel from the viewpoint of brightness, that is, to make the size of the pixel electrode as large as possible. However, in the pixel adjacent to the joint part 3, simply removing the second pixel drive and wiring part may not be sufficient for the area required for the joint part, and it becomes necessary to shave the pixel electrode part. If this continues, pixel electrodes other than those adjacent to the junction must be removed in order to ensure uniformity of the display panel, resulting in a dark display. Therefore, in FIG. 4, the shape of the pixel electrode adjacent to the junction is different from that of other pixels, but the area is the same, thereby minimizing the influence on the appearance and obtaining a bright display. In this way, the size of the pixel electrode is increased by changing the pixel shape of the pixel adjacent to the junction (for example, in the equivalent circuit of FIG. 3, the gate bus GL i +
Since G Rr terminates before the junction 3, this can be easily realized by using the wiring regions of these gate buses as pixel electrode regions only in pixels adjacent to the junction.

また、第2の画素!lX動部の大きさによっても、接合
部隣接画素で画素形状を変えて画素電極サイズを他画素
と同一にすることも可能である。
Also, the second pixel! Depending on the size of the lX moving part, it is also possible to change the pixel shape of the pixel adjacent to the junction part and make the pixel electrode size the same as that of other pixels.

第5図は、本発明の他の一実施例による4枚の画素電極
付基板及びその周辺部付近の模式正面図である。各画素
に第1の画素駆動部51以外に3個の第2の画素駆動部
61を設け、4枚の画素電極付基板の角が集まる部分の
4画素では全ての第2の画素駆動部を除き、他の接合部
上隣接する画素では2個の第2の画素駆動部を除くと共
に画素電極形状をそれぞれ変えることにより、第4図の
実施例と同様に、各画素電極面積を一定とした例である
FIG. 5 is a schematic front view of four substrates with pixel electrodes and their surrounding areas according to another embodiment of the present invention. In addition to the first pixel drive unit 51, each pixel is provided with three second pixel drive units 61, and all the second pixel drive units are connected to the four pixels in the portion where the corners of the four substrates with pixel electrodes meet. By removing the two second pixel drive parts and changing the shape of the pixel electrodes in the pixels adjacent to each other on the other junctions, the area of each pixel electrode was kept constant, similar to the embodiment shown in FIG. This is an example.

以上述べてきた実施例は、各画素駆動電極面積を一定に
し、解像度及び明るさの均一性をねらったものである。
In the embodiments described above, the area of each pixel drive electrode is made constant, and the aim is to achieve uniformity in resolution and brightness.

しかし、接合法番こよりては接合部に要する領域がより
必要な場合も考えられる。その場合は、接合部付近の画
素を大きくして接合部の解像度をやや劣化させるものの
、開口率(画素電極部の面積を画素ピッチの面積で割っ
た値)を一定として明るさの均一性を保つ方法を先の実
施例に応用すれば、表示パネル外観への影響を出来るだ
け小さくすることができる。
However, depending on the joining method number, there may be cases where a larger area is required for the joining portion. In that case, the pixels near the junction will be made larger and the resolution of the junction will be slightly degraded, but the aperture ratio (value obtained by dividing the area of the pixel electrode part by the area of the pixel pitch) will be kept constant and the uniformity of brightness will be maintained. By applying the method of maintaining this to the previous embodiment, the influence on the appearance of the display panel can be minimized.

〔発明の効果〕〔Effect of the invention〕

以上のように、本発明によれば、はとんどの画素に冗長
性を持たすことにより表示パネルの歩留りを向上するこ
とができ、かつ接合部隣接画素の冗長性を省くことによ
り接合に要する領域に取られがちな接合部隣接画素の開
口率を他画素の開口率と同一に保ち、表示パネル明るさ
が均一で、かつ明るい画像表示パネルを得ることができ
る効果がある。
As described above, according to the present invention, the yield of display panels can be improved by providing redundancy to most pixels, and the area required for bonding is eliminated by eliminating redundancy in pixels adjacent to the bonding area. This has the effect of keeping the aperture ratio of the pixel adjacent to the junction part, which tends to be taken as a problem, the same as the aperture ratio of other pixels, thereby making it possible to obtain a bright image display panel with uniform display panel brightness.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例としての画像表示パネルの画
素電極付基板接合部及びその周辺部付近の模式正面図、
第2図は本発明の一実施例とじての画像表示パネルの断
面図、第3図は本発明の一実施例としての画像表示パネ
ルの等価回路図、第4図及び第5図は、それぞれ本発明
の他の一実施例としての画像表示パネルの画素電極付基
板接合部及びその周辺部付近の模式正面図、である。 1’!?、lL・・・画素電極付基板 3・・・接合部 4 、41 、42 、43・・・画素電極5.6・・
・画素駆動及び配線部 51 、61・・・画素駆動部  7・・・対向共通電
極8・・・上部基板     9・・・液晶GRi、G
L+  ・・・ゲートバス DAj、DBj  ・・・ドレインバスTAIj、TB
ij・・・画素トランジスタLCij・・・液晶セル IL            IR 篤 3 図 邪斗図 IL                 1+2嶌 5
FIG. 1 is a schematic front view of the pixel electrode-equipped substrate joint part and its surrounding area of an image display panel as an embodiment of the present invention;
FIG. 2 is a sectional view of an image display panel as an embodiment of the present invention, FIG. 3 is an equivalent circuit diagram of an image display panel as an embodiment of the present invention, and FIGS. 4 and 5 are respectively FIG. 7 is a schematic front view of the pixel electrode-equipped substrate joint portion and the vicinity of the peripheral portion of the image display panel as another example of the present invention. 1'! ? , 1L...Substrate with pixel electrode 3...Joint portion 4, 41, 42, 43...Pixel electrode 5.6...
- Pixel drive and wiring section 51, 61... Pixel drive section 7... Opposing common electrode 8... Upper substrate 9... Liquid crystal GRi, G
L+...Gate bus DAj, DBj...Drain bus TAIj, TB
ij...Pixel transistor LCij...Liquid crystal cell IL IR Atsushi 3 Diagram IL 1+2 5
figure

Claims (1)

【特許請求の範囲】 1、画素駆動部付画素電極を規則的に配列することによ
り構成した画素電極付基板の複数枚を、互いの側面で接
合して一枚の基板として構成した画素表示パネルにおい
て、 前記画素電極付基板の側面接合部に隣接して位置する画
素を除く他の画素の画素駆動部に冗長性を持たせたこと
を特徴とする画像表示パネル。
[Claims] 1. A pixel display panel in which a plurality of substrates with pixel electrodes, which are formed by regularly arranging pixel electrodes with pixel drive units, are joined together at their sides to form a single substrate. An image display panel characterized in that redundancy is provided in pixel drive units of pixels other than pixels located adjacent to the side surface joint portion of the substrate with pixel electrodes.
JP12175288A 1988-05-20 1988-05-20 Picture display panel Pending JPH01292320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12175288A JPH01292320A (en) 1988-05-20 1988-05-20 Picture display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12175288A JPH01292320A (en) 1988-05-20 1988-05-20 Picture display panel

Publications (1)

Publication Number Publication Date
JPH01292320A true JPH01292320A (en) 1989-11-24

Family

ID=14819011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12175288A Pending JPH01292320A (en) 1988-05-20 1988-05-20 Picture display panel

Country Status (1)

Country Link
JP (1) JPH01292320A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767936A (en) * 1995-12-14 1998-06-16 Sharp Kabushiki Kaisha Liquid crystal image displaying/reading apparatus having an L shape image reading element in a gap between display pixels
US6014193A (en) * 1997-07-31 2000-01-11 Kabushiki Kaisha Toshiba Liquid crystal display device
JP2007226177A (en) * 2006-02-24 2007-09-06 Genta Kagi Kogyo Kofun Yugenkoshi Thin film transistor array substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767936A (en) * 1995-12-14 1998-06-16 Sharp Kabushiki Kaisha Liquid crystal image displaying/reading apparatus having an L shape image reading element in a gap between display pixels
US6014193A (en) * 1997-07-31 2000-01-11 Kabushiki Kaisha Toshiba Liquid crystal display device
JP2007226177A (en) * 2006-02-24 2007-09-06 Genta Kagi Kogyo Kofun Yugenkoshi Thin film transistor array substrate

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