JPH01289269A - Spare gate device - Google Patents

Abstract

PURPOSE:To expand a function of a spare gate to two or more without consuming the number of pins of an LSI by a method wherein a changeover part is installed and the functions of the spare gate are switched and output. CONSTITUTION:A data is input in advance from a scan input 1 to a latch part 10 specifying a function of a spare gate 12 and, a logical value is written by a scanning operation via a scan path 3. Signals which have been given to a spare gate input A4 and a spare gate input B5 are sent to an AND gate 7 and an OR gate 8, a logical product and a logical sum are produced individually and are sent to a changeover part 9, an output of the AND gate 7 or an output of the OR gate 8 is selected according to a content of the function-specifying latch part 10 and is sent to the inside via a spare gate output Y6. Accordingly, the spare gate 12 is used to correct a prescribed logic as a gate having a function of the logical product and the logical sum. By this setup, it is possible to switch two or more functions without consuming a pin of an LSI.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a spare gate device in which a spare gate is provided in a logic LSI and can modify the logic of the logic LSI.

[Conventional technology]

FIG. 2 is a configuration diagram of a conventional backup gate device. In the figure, l is a scan input, 2 is a scan output, 3 is a scan path, 4 is a backup gate input A, 5 is a backup gate input B, and 6 is a scan output. Spare gate output Y, 7 is spare gate input A4
This is an AND gate that performs the logical product of and the preliminary gate input B5 and sends the output to the preliminary gate output Y.

Here, this AND gate 7 corresponds to a spare gate.

Next, the operation will be explained. A normal scan operation is performed by inputting data from the scan input 1, passing through the scan path 3, and outputting the data to the scan output 2.

On the other hand, the spare gate constructed using the empty pins and empty gates of this logic LSI performs the AND operation of the signals given to the spare gate input A4 and the spare gate input B5 at the ΔNl) gate 7, By sending the output of gate 7 to the outside via preliminary gate output Y6, the function Y=A, and, B is executed. Therefore, input Δ4, input B5
By connecting a signal to the output Y6 from outside the LSI, the Y-bit gate functions as a gate with an AND function.
Used for necessary logic correction.

[Problem to be solved by the invention]

Since the conventional backup gate device is configured as described above, for example, it can only realize a single function of 2 inputs and 1 output by using an empty bin with 2 inputs and 1 output, and cannot flexibly respond to logic modifications. There was a problem.

This invention was made to solve the above-mentioned problems, and has a method of switching multiple functions without consuming LSI bins, and makes effective use of limited empty bins to correct logic. The purpose is to obtain a spare gate device that can flexibly respond to

[Means to solve the problem]

The spare gate device according to the present invention includes a switching section 9 for switching the logical functions of Y-bits to 1 and 12, a latch section 10 for holding data for controlling the switching of the switching section 9, and an input from the scan input l. The present invention is characterized in that it is provided with a writing section 11 that writes data to the latch section 10 via the scan path 3 based on the data.

[Effect]

The switching section 9 in this invention switches the function of the spare gate 12 and outputs it. This switching is controlled by sending input data from scan input 1 to latch unit 1 via scan path 3.
0, and the process is performed based on the data written to this latch section. The writing section 11 writes data to the latch section 10 at this time.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Note that the same components as those in the prior art are given the same numbers and their explanations are omitted.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which 8 is an OR gate, 9 is a switching unit that selects the outputs of AND gate 7 and OR gate 8 and sends the result to preliminary gate output 6; IO is a latch section composed of a shift register that receives only a scan input specifying selection of the switching section 9.

Further, 11 is a writing section that writes data to the latch section IO.

Here, the AND gate 7 and the OR gate 8 are combined to form a spare gate 12.

Next, the operation will be explained. Data is inputted in advance from the scan input 1 to the latch unit 10 that specifies the function of the spare gate, and a logical value "0" or "1" is written through the scan path 3 by a scan operation. The signals applied to the preliminary gate input A4 and the preliminary gate input B5 are sent to an AND gate 7 and an OR gate 8, and a logical product and a logical sum are respectively generated. The output of the AND gate 7 and the output of the OR gate 8 are sent to the switching unit 9, and when the content of the function specifying latch unit 1O is a logic value "0", the output of the AND gate 7 is a logic value "1". Is it 01'? gate 8
The output of is selected and sent to the outside via the preliminary gate output Y6.

Therefore, this spare gate has latch section 1 that specifies the function.
When a logic value "0" is written to 0, the gate functions as a gate with an AND function, and when a logic value "1" is written, it becomes a gate with an OR function, which is used for modifying the owned logic.

At this time, data is written to the latch section 10 by the writing section l.
Do it with l.

Note that in the above embodiment, the latch section IO for specifying the function is 1
Although two types of functions are shown that can be selected by bits, the latch section 10 may have a plurality of bits, and the number of functions that can be selected can be increased more than in the above embodiment.

〔Effect of the invention〕

As described above, according to the present invention, there is provided a switching section that switches the function of the spare gate, a latch section that holds data that controls switching of the switching section, and the scan path based on the data input from the scan input. Since a writing section is provided to write data to the latch section through the LSI, the function of the spare gate can be expanded to multiple without consuming the number of LSI pins, and the limited number of empty bins can be maximized. It has the effect of being able to respond flexibly to logical modifications by using it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional preliminary gate device. In the figure, ■ is the scan input, 2 is the scan output, and 3 is the scan input.
is the scan path, 4 is the spare gate input A, 5 is the spare gate input B, 6 is the spare gate output Y, 7 is the AND gate,
8 is an OR gate, 9 is a switching section, 10 is a latch section, and 11 is a writing section. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa (2 idiots) 22nd

Claims (1)

[Claims] In the spare gate device, which has a scan path that outputs a scan output when a scan input is input into the logic LSI, and a predetermined spare gate, and uses the spare gate when modifying the logic of the logic LSI, the spare gate is A switching section that switches logical functions, a latch section that holds data that controls switching of the switching section, and a writing section that writes data to the latch section via the scan path based on data input from the scan input. A preliminary gate device characterized by being provided with.