JPH01283808A - Uncoated chip type laminated capacitor - Google Patents

Uncoated chip type laminated capacitor

Info

Publication number
JPH01283808A
JPH01283808A JP11427388A JP11427388A JPH01283808A JP H01283808 A JPH01283808 A JP H01283808A JP 11427388 A JP11427388 A JP 11427388A JP 11427388 A JP11427388 A JP 11427388A JP H01283808 A JPH01283808 A JP H01283808A
Authority
JP
Japan
Prior art keywords
protective insulating
laminate
manufacturing time
sheets
sheet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11427388A
Other languages
Japanese (ja)
Inventor
Akio Shikabayashi
鹿林 明男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP11427388A priority Critical patent/JPH01283808A/en
Publication of JPH01283808A publication Critical patent/JPH01283808A/en
Pending legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To make it possible to record information to show its manufacturing time inside of it by having a protective insulating sheet on which numerical or alphabetical characters, or a bar code is printed. CONSTITUTION:Metallized dielectric sheets 3 in each of which an electrode 5 is formed at a dielectric sheet 1 are laminated to form a laminate 4. Further, a protective insulating sheet 7 provided with manufacturing time indication where combination 6 of numerals and alphabet to show manufacturing time is printed on a protective insulating sheet 5 having the same area as that of the dielectric sheet 1 is piled on the upper side of the laminate 4 such that the indicate face looks upward so as to form a laminate 8. Protective insulating sheets 9 having the same areas as those of the sheets 1 and 5 are piled on both upper and lower sides of this laminate 8, and electrode terminals 11 are provided at both ends. Hereby, manufacturing time can be indicated inside a capacitor, which enables users to know it easily by a trouble cause investigation method usually used.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電極を形成した複数の誘電体シートを積層し
、上下両面に保護絶縁シートを重ね合わせ、さらに両端
に電極端子を設ける非外装チップ型の積層コンデンサに
関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is a non-exterior material in which a plurality of dielectric sheets on which electrodes are formed are laminated, protective insulating sheets are overlaid on both the upper and lower surfaces, and electrode terminals are provided on both ends. Regarding chip-type multilayer capacitors.

〔従来の技術〕[Conventional technology]

一般に、樹脂モールドなどの外装をしない非外装のチッ
プ型積層コンデンサは、これまで製造時期等の情報はコ
ンデンサ表面あるいは内部に記録することをせず包装袋
内に入れたラベルあるいは梱包箱に貼付したラベルに表
示していた。
In general, for unpacked chip-type multilayer capacitors that do not have an external packaging such as a resin mold, information such as the manufacturing date was not recorded on the surface or inside the capacitor, but was pasted on a label inside the packaging bag or on the packaging box. It was displayed on the label.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の製造時期等の表示方法はコンデンサを包
装袋、あるいは梱包箱から出してガラスエポキシ製の印
刷配線板やセラミック基板に実装する際1対1に記録し
ない限り、実装されたコンデンサの製造時期が不明にな
るという欠点がある。1対1に記録することは通常数百
〜数千の部品を組み立てるエレクトロニクス製品では非
常に不経済な作業である。
The above-mentioned conventional method of displaying the manufacturing date, etc., is used when the capacitor is taken out of the packaging bag or packaging box and mounted on a glass epoxy printed wiring board or ceramic substrate, unless it is recorded one-to-one. The disadvantage is that the timing is unclear. Recording on a one-to-one basis is a very wasteful task for electronic products that typically consist of hundreds to thousands of parts.

本発明の目的は、内部にその製造時期を示す情報を記録
した非外装チップ型積層コンデンサを提供することにあ
る。
An object of the present invention is to provide a non-exterior chip type multilayer capacitor in which information indicating the manufacturing date is recorded.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の非外装チップ型積層コンデンサは、電極を形成
した複数の誘電体シートを積層し、上下両面に保護絶縁
シートを重ね合わせ、さらに両端に電極端子を設ける積
層コンデンサにおいて、数字、アルファベットまたはバ
ーコードを印刷した保護絶縁シートを有している。
The non-exterior chip type multilayer capacitor of the present invention is a multilayer capacitor in which a plurality of dielectric sheets on which electrodes are formed are laminated, protective insulating sheets are overlaid on both the upper and lower surfaces, and electrode terminals are provided on both ends. It has a protective insulation sheet with a code printed on it.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
(a)〜(g)は本発明の第1の実施例及びその組み立
て方法を説明するための工程別の斜視図である。
Next, the present invention will be explained with reference to the drawings. FIGS. 1(a) to 1(g) are perspective views of each step for explaining the first embodiment of the present invention and its assembly method.

まず第1図(a)のように誘電体シート1に電極2を形
成した金属化誘電体シート3を第1図(b)のように積
層し、積層体4を形成する、次に第1図(c)の如き誘
電体シートと同一面積を有する保護絶縁シート5に製造
時期を示す数字とアルファベットの組み合わせ6を例え
ばスクリーン印刷などの方法により印刷した製造時期表
示付きの保護絶縁シート7を第1図(d)に示すように
積層体4の上側に表示面を上に向けて重ね合わせ積層体
8とする。なお、この場合、印刷機にはX線の透過率が
小さい材料例えば銀ペースト等を用いる。この積層体8
の上下両面に誘電体シート、製造時期表示付きの保護絶
縁シートと同一面積を有する保護絶縁シート9を重ね合
わせ、さらに両端に電極端子11を設けて積層コンデン
サ12を完成させる。
First, as shown in FIG. 1(a), metallized dielectric sheets 3 in which electrodes 2 are formed on dielectric sheets 1 are laminated as shown in FIG. 1(b) to form a laminate 4. A protective insulating sheet 7 with a manufacturing date indication is printed on a protective insulating sheet 5 having the same area as the dielectric sheet as shown in FIG. As shown in FIG. 1(d), the display surface of the laminate 4 is stacked on top of the laminate 4 to form a laminate 8. In this case, a material having low X-ray transmittance, such as silver paste, is used for the printing machine. This laminate 8
A dielectric sheet and a protective insulating sheet 9 having the same area as the protective insulating sheet with manufacturing date indication are superimposed on both upper and lower surfaces of the capacitor, and electrode terminals 11 are provided at both ends to complete the multilayer capacitor 12.

第2図(a)〜(c)は本発明の他の実施例に用いる製
造時期記号化した表示付きの保護絶縁シートの斜視図で
ある。すなわち、第1図(a)〜(g)で示した本発明
の実施例に用いた製造時期表示付きの保護絶縁シート7
の替りに途中に数ケ所の間隙のある線を配列して製造時
期を記号化して表わしたもの第2図(a)、巾の異なる
線を意図した間隔に線端とシート端が一致するように配
列することによって製造時期を記号化して表わしたもの
第2図(b)、第2図(b)と同じく巾の異なる線を意
図した間隔に配列するが、線端はシート端より内側で止
めることによって製造時期を記号化して表わしたちの第
2図(e)を用いて積層コンセンアを形成する。第2図
(a)〜(c)に示した如く、製造時期を記号化すれば
ここに揚げた測具外にも無数の製造時期の表示記号を用
いることができることは云うまでもない。
FIGS. 2(a) to 2(c) are perspective views of a protective insulating sheet with a symbol indicating the manufacturing date used in another embodiment of the present invention. That is, the protective insulating sheet 7 with manufacturing date indication used in the embodiment of the present invention shown in FIGS. 1(a) to (g)
Instead, lines with several gaps in the middle are arranged to symbolize the production period. Figure 2 (a) shows that the line ends and sheet ends match the intended intervals for lines of different widths. Fig. 2(b) shows the manufacturing date symbolically by arranging the lines in the same way as in Fig. 2(b). Lines of different widths are arranged at the intended intervals, but the line ends are inside the sheet edge. By stopping, the manufacturing time is symbolized and a laminated concenor is formed using the representation shown in FIG. 2(e). As shown in FIGS. 2(a) to 2(c), it goes without saying that if the production date is symbolized, countless symbols can be used to indicate the production date other than the measuring instruments shown here.

このように製造時期表示付きの保護絶縁シートを内部に
組み込んだ積層コンデンサンの製造時期を読み取る方法
はX線により製造時期表示を読み取る方法(第3図(a
)〜(d)および第4図(a)、(b))積層側面を見
る方法(第5図)、コンデンサを解体して製造時期表示
を見る方法(図示省略)がある。
A method of reading the manufacturing date of a multilayer capacitor that incorporates a protective insulating sheet with a manufacturing date indication is to read the manufacturing date indication using X-rays (see Figure 3 (a).
) to (d) and FIGS. 4(a) and (b)) There are two methods: a method of looking at the laminated side surface (FIG. 5), and a method of disassembling the capacitor and looking at the manufacturing date display (not shown).

第3図(a)〜(d)は積層コンデンサの積層面に垂直
にX線をあてて得た像(実際には電極2や電極端子11
も重複して写るが図示省略しである)である、第4図(
a)、(b)は積層面に平行にX線をあてて得な像(実
際には電極端子11の一部も重複して写るが図示省略し
である)である。第5図は電極端子11の一部を削り取
って表示部分の側面を露出させ積層側面を恩な図である
。以上いずれの方法によっても積層コンデンサン製造時
に保護絶縁シートに表示した製造時期を読み取ることが
できる。
Figures 3(a) to 3(d) are images obtained by applying X-rays perpendicularly to the laminated surface of a multilayer capacitor (in reality, the electrode 2 and electrode terminal 11
Figure 4(
a) and (b) are images obtained by applying X-rays parallel to the laminated surface (actually, a portion of the electrode terminal 11 is also overlapped in the image, but is not shown). FIG. 5 is a perspective view of the laminated side surface in which a part of the electrode terminal 11 is removed to expose the side surface of the display portion. By any of the above methods, it is possible to read the manufacturing date displayed on the protective insulating sheet during the manufacturing of the multilayer capacitor.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は非外装チップ型積層コンデ
ンサの内部に製造時期が表示できるのでガラスエポキシ
製の印刷配線板やセラミック基板に実装後に障害が発生
した場合、通常用いる障害原因調査の方法と同一の方法
(X線撮影、断面観察など)で容易に個々のコンデンサ
の製造時期を明確にできるという効果がある。
As explained above, since the manufacturing date of the present invention can be displayed inside the non-exposed chip type multilayer capacitor, if a failure occurs after mounting on a glass epoxy printed wiring board or ceramic substrate, the present invention can be used as a normally used method for investigating the cause of the failure. This has the effect that the manufacturing date of each capacitor can be easily determined using the same method (X-ray photography, cross-sectional observation, etc.).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(g)は本発明の第1の実施例及びその
組み立て方法を説明するための工程別の斜視図、第2図
(a)、(b)、(c)はそれぞれ本発明の第2.第3
及び第4の実施例に用いる製造時期を記号化した表示付
きの保護絶縁シートの斜視図、第3図(a)〜(d)は
それぞれ本発明の積層コンデンサの第1〜第4の実施例
のX線像(積層面に垂直にX線をあてて得た像)を示す
図、第4図(a)、(b)はそれぞれ本発明の第3及び
第4の実施例のX線像(積層面に平行にX線をあてて得
た像)を示す図、第5図は!極端子の一部を削り取って
見た積層側面図である。 1・・・誘電体シート、2・・・電極、3・・・金属化
誘電体シート、4,8.10・・・m層体、5.9・・
・保護絶縁シート、6,13,14.15・・・製造時
期を示す数字・アルファベットの組み合わせ、バーコー
ド、7・・・製造時期表示付き保護絶縁シート、11・
・・電極端子、12・・・積層コンデンサ。
Figures 1 (a) to (g) are perspective views of each step to explain the first embodiment of the present invention and its assembly method, and Figures 2 (a), (b), and (c) are respectively Second aspect of the present invention. Third
3(a) to 3(d) are perspective views of protective insulating sheets with markings symbolizing manufacturing times used in the fourth embodiment, and FIGS. 3(a) to 3(d) respectively show the first to fourth embodiments of the multilayer capacitor of the present invention. FIGS. 4(a) and 4(b) are X-ray images of the third and fourth embodiments of the present invention, respectively. (An image obtained by applying X-rays parallel to the laminated surface), Figure 5 is! FIG. 3 is a side view of the laminated structure with a portion of the electrode terminal removed. DESCRIPTION OF SYMBOLS 1... Dielectric sheet, 2... Electrode, 3... Metallized dielectric sheet, 4,8.10...m layer body, 5.9...
・Protective insulation sheet, 6, 13, 14. 15... Combination of numbers and alphabets indicating manufacturing date, barcode, 7... Protective insulation sheet with manufacturing date display, 11.
... Electrode terminal, 12... Multilayer capacitor.

Claims (1)

【特許請求の範囲】[Claims] 電極を形成した複数の誘電体シートを積層し、上下両面
に保護絶縁シートを重ね合わせ、さらに両端に電極端子
を設ける積層コンデンサにおいて、数字,アルファベッ
トまたはバーコードを印刷した保護絶縁シートを有する
ことを特徴とする非外装チップ型積層コンデンサ。
A multilayer capacitor in which multiple dielectric sheets with electrodes formed thereon are laminated, protective insulating sheets are overlaid on both the top and bottom surfaces, and electrode terminals are provided at both ends. Characteristics of non-exposed chip type multilayer capacitors.
JP11427388A 1988-05-10 1988-05-10 Uncoated chip type laminated capacitor Pending JPH01283808A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11427388A JPH01283808A (en) 1988-05-10 1988-05-10 Uncoated chip type laminated capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11427388A JPH01283808A (en) 1988-05-10 1988-05-10 Uncoated chip type laminated capacitor

Publications (1)

Publication Number Publication Date
JPH01283808A true JPH01283808A (en) 1989-11-15

Family

ID=14633691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11427388A Pending JPH01283808A (en) 1988-05-10 1988-05-10 Uncoated chip type laminated capacitor

Country Status (1)

Country Link
JP (1) JPH01283808A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6286814A (en) * 1985-10-14 1987-04-21 株式会社村田製作所 Laminated ceramic capacitor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6286814A (en) * 1985-10-14 1987-04-21 株式会社村田製作所 Laminated ceramic capacitor

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