JPH01283524A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH01283524A
JPH01283524A JP63115208A JP11520888A JPH01283524A JP H01283524 A JPH01283524 A JP H01283524A JP 63115208 A JP63115208 A JP 63115208A JP 11520888 A JP11520888 A JP 11520888A JP H01283524 A JPH01283524 A JP H01283524A
Authority
JP
Japan
Prior art keywords
intermediate layer
electrode
liquid crystal
switching
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63115208A
Other languages
Japanese (ja)
Inventor
Katsumi Suzuki
克己 鈴木
Mitsutaka Nishikawa
西川 光貴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63115208A priority Critical patent/JPH01283524A/en
Publication of JPH01283524A publication Critical patent/JPH01283524A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the fluctuation in the element characteristics within a substrate by providing an intermediate layer to a nonlinear resistance 2-terminal element for switching and forming the intermediate layer of the oxide of an electrode material under the element. CONSTITUTION:The intermediate layer is provided to the nonlinear resistance 2-terminal element for switching. This intermediate layer is formed of the oxide of the electrode material under the element. Ta which is the lower electrode material is first formed on Ba borosilicate glass substrate 1 and the electrode 2 is formed by dry etching using gaseous CF4+O2. The layer 6 is then formed by bias sputtering of Ta2O5 and thereafter, a contact hole is opened in the intermediate layer by dry etching using gaseous CF4+O2. Thermal oxidation is then executed in the atm. to form a thermally oxidized film in the contact hole part 4. Further, Cr is sputtered and the upper electrode 3 is formed by using a Mr. Murakami liquid. The picture element electrode connecting to the upper electrode is then formed of ITO. No differences are thereby admitted in the element characteristics within the same substrate.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は液晶表示装置のスイッチング用非線形抵抗2端
子素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a nonlinear resistance two-terminal element for switching of a liquid crystal display device.

〔従来の技術〕[Conventional technology]

アクティブマトリックス型液晶表示装置におけるスイッ
チング用非線形抵抗2端子素子であるMIM、MSIは
それぞれ2つの電極に挾まれた絶縁層、5elli−1
nsulatorが高電界で電流を流す性質を利用して
おり非線形な電流−電圧特性のメカニズムは5chot
tkyやPoole−Frenke1機構等により説明
されている。従来のMIM素子の断面図を第2図に、上
面図を第3図に、従来のMSI素子の断面図を第4図に
示す、従来のMIMは下部電極(第2図−2)をエツチ
ングにて形成後陽極酸化により絶縁層(第2図−4)を
形成、上部電極で画素電極との導通をとっていた。また
、従来のMSIは画素電極をエッチパターニング後スパ
ッタやCV D fseni−1nsulatorを形
成、その上に走査電極を形成していた。これらの構造、
製造方法により理解される様に下部素子電極(第2図−
2、第4図−5)にはエツチング端面(図中ET)が必
然的に生じてしまい、かつ従来ではこれらのエツチング
端面を素子駆動部として利用していた。
MIM and MSI, which are nonlinear resistance two-terminal elements for switching in active matrix liquid crystal display devices, each have an insulating layer, 5elli-1, sandwiched between two electrodes.
The mechanism of non-linear current-voltage characteristics that utilizes the property of nsulator to flow current in a high electric field is shown in 5 shots.
tky, Poole-Frenke 1 mechanism, etc. A cross-sectional view of a conventional MIM element is shown in Fig. 2, a top view is shown in Fig. 3, and a cross-sectional view of a conventional MSI element is shown in Fig. 4. In the conventional MIM, the lower electrode (Fig. 2-2) is etched. After formation, an insulating layer (Fig. 2-4) was formed by anodic oxidation, and the upper electrode was electrically connected to the pixel electrode. Furthermore, in the conventional MSI, a pixel electrode is etched and patterned, then a sputtering or CVD fseni-1 nsulator is formed, and a scanning electrode is formed thereon. These structures,
As understood from the manufacturing method, the lower element electrode (Fig. 2-
2. In FIGS. 4-5), etched end faces (ET in the figure) are inevitably formed, and conventionally, these etched end faces have been used as element drive parts.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

一般的にドライ・ウェットにかかわらず材料のエツチン
グ端面は多かれ少なかれ変質する。エツチング液やエツ
チングガス中に含まれるイオン等が被エツチング材中に
拡散し合金を生成したつ、また材料原子間に入り込んだ
り置換しなりして構造を著しく変えなりもする。更には
エツチング時生成する副産物がエツチング端面に付着し
容易に除去できない場合もある。
Generally, the etched end face of the material changes in quality to a greater or lesser extent, regardless of whether it is dry or wet. Ions, etc. contained in the etching liquid or etching gas diffuse into the material to be etched to form an alloy, and may also enter or substitute between atoms of the material, significantly changing the structure. Furthermore, by-products generated during etching may adhere to the etched end face and cannot be easily removed.

しかし従来技術では第2図、第3図、第4図に示す様に
これらの変質した電極エツチング端面を素子駆動部に存
在させていたために素子特性のばらつきや素子特性の劣
化をひきおこすという問題点があった。第5図(A)、
(B)に従来技術により作成したMSI及びMIM素子
の同一基板内の電流−電圧特性を示す、電圧10Vで素
子抵抗が基板内素子により約2@異なっており、更に電
流−電圧特性も充分に急峻でないため高品位な表示が不
可能となっている。また上部電極を形成する際下部電極
の段差を吸収しきれず断線をおこしたりそうならなくて
も上部量f2幅が変化し、てそのため素子面積が変化、
素子特性の変動を生じさせ画質の劣化をひきおこしてい
た。
However, in the conventional technology, as shown in FIGS. 2, 3, and 4, these altered electrode etched end surfaces were present in the element drive section, which caused variations in element characteristics and deterioration of element characteristics. was there. Figure 5 (A),
(B) shows the current-voltage characteristics of MSI and MIM devices created using the conventional technology within the same substrate. At a voltage of 10 V, the element resistance differs by about 2@ depending on the elements in the substrate, and the current-voltage characteristics are also sufficient. Since the slope is not steep, high-quality display is impossible. In addition, when forming the upper electrode, the height difference of the lower electrode cannot be fully absorbed, causing wire breakage, and even if this does not occur, the upper amount f2 width changes, and as a result, the element area changes.
This caused fluctuations in element characteristics, leading to deterioration in image quality.

一方、これらの問題点を解決すべ〈従来素子間に中間層
を設ける試みら検討されているが、すなわち第1図に示
す本発明実施例と似て下部電極に中間層を設けることで
下tiのエツチング端面を素子駆動部として使わない、
素子面積を安定して決定でき上′r4極の断線もない様
にする試みであるが本発明実施例と決定的に異なる点は
下部電極の酸化物以外の膜を中間層として利用していた
。このなめ中間層成膜時に又は後工程の熱プロセス時に
下部電極へ拡散が生じ素子特性の異常を引きおこし画質
向上は達成できていなかった。
On the other hand, in order to solve these problems, attempts have been made to provide an intermediate layer between conventional elements, but similar to the embodiment of the present invention shown in FIG. Do not use the etched end face as the element drive part.
This was an attempt to stably determine the element area and avoid disconnection of the four poles, but the decisive difference from the embodiments of the present invention was that a film other than the oxide of the lower electrode was used as the intermediate layer. . Diffusion into the lower electrode occurs during film formation of this slanted intermediate layer or during a post-process thermal process, causing abnormalities in device characteristics, making it impossible to improve image quality.

〔課題を解決するための手段〕[Means to solve the problem]

複数の行電極と対向基板上にこれに交差して配置された
複数の列電極を備え、これら両電極の交差部にマトリッ
クス状に形成された画素部にMTM又はMSIのスイ・
yチング用非線形抵抗2端子素子と液晶を電気的に直列
に接続して配置したアクティブマトリックス型液晶表示
装置において前記スイッチング用非線形抵抗2端子素子
に中間層を設け、かつその中間層が素子下電極材料の酸
化物であることを特徴としている。
A plurality of row electrodes and a plurality of column electrodes are arranged on a counter substrate to intersect with each other, and a pixel portion formed in a matrix at the intersection of these two electrodes is provided with an MTM or MSI switch.
In an active matrix liquid crystal display device in which a 2-terminal nonlinear resistance element for switching and a liquid crystal are electrically connected in series, an intermediate layer is provided in the 2-terminal nonlinear resistance element for switching, and the intermediate layer is an electrode under the element. It is characterized by being an oxide of the material.

〔実 施 例−1〕 本発明実施例−1を第1図に示す、Baホウケイ酸ガラ
ス上にまず下部電極材料であるTaを3500Aスパツ
タしCFA 十02ガスを用いたドライエツチングにて
電極形成をする0次にTa。
[Example-1] Example-1 of the present invention is shown in FIG. 1. First, Ta, which is a lower electrode material, was sputtered at 3500A on Ba borosilicate glass, and electrodes were formed by dry etching using CFA 102 gas. 0th order Ta.

0、を2500Aバイアススパツタ(中間層(第1図−
6))を形成後再びCF4 +Otガスを用いたドライ
エツチングにて中間層に5μm口のコンタクトホールを
あける。この際TazOs/Taのエツチングレート比
を大きくとる様にガス組成を調整、Taのエツチングを
極力少なくした。
0, with a 2500A bias sputter (intermediate layer (Fig. 1-
6) After forming 2), a 5 μm contact hole is made in the intermediate layer by dry etching using CF4+Ot gas again. At this time, the gas composition was adjusted to increase the etching rate ratio of TazOs/Ta, and the etching of Ta was minimized.

次に大気中にて500℃XIHrの熱酸化を行ない約5
00A程度の熱酸化膜をコンタクトホール部に形成する
(第1図−4)、更にCrを1500人スパッタし上部
電極を村上氏液を用い形成する(第1図−3)0次に上
部電極に接続して画素電極をITOにて形成した。この
機に形成したMIM素子の電流−電圧特性を第5図−(
c)に示す、傾きが従来より若干急峻になり、かつ同一
基板内の素子特性に差が認められない、また上部電極の
断線も同様に全く無かった。
Next, thermal oxidation was performed at 500℃XIHr in the air for about 5
A thermal oxide film of about 0.0A is formed in the contact hole portion (Fig. 1-4), and an upper electrode is formed by sputtering 1,500 Cr using Murakami's solution (Fig. 1-3). A pixel electrode was formed using ITO. Figure 5-(
As shown in c), the slope was slightly steeper than before, and no difference was observed in the device characteristics within the same substrate, and there was also no disconnection of the upper electrode.

尚、本発明実施例ではMIM素子の下電極材料にTaを
用いたが電気抵抗が低く、その酸化物が2000〜30
00人で透明、かつ絶縁体であれば何でも良い、たとえ
ばAj、Orなどでも良い。
In addition, in the embodiment of the present invention, Ta was used as the lower electrode material of the MIM element, but its electrical resistance is low, and its oxide is 2000 to 30
Any material may be used as long as it is transparent and insulating, such as Aj, Or, etc.

〔実 施 例−2〕 本発明実施例−2を第6図に示す、まず3000人厚の
走査電極をAJlにて形成し、その上部に実施例−1と
同様に中間層を設は孔あけしな、この時中間層はAjの
アルコキシドの塗布焼成膜であり膜厚は2500人、孔
あけはリン酸水溶液を用いて行なった0次にSiNxを
600人スパッタ形成する。5INxのパターニングは
CF、系のガスを用いドライエツチングにて行なった0
次に画素電極ITOをコンタクトホール部を被覆する様
に形成した。この様に形成しなMSI素子の;流−電圧
特性を第5図−(D)に示す、傾きが従来より若干急峻
になり、かつ同一基板内の素子特性に差が認められない
、また上#電#l(画素電極)の断線ら同様に全く無か
った。
[Example 2] Example 2 of the present invention is shown in FIG. 6. First, a scanning electrode with a thickness of 3000 was formed using AJI, and an intermediate layer was formed on top of it in the same manner as in Example 1. At this time, the intermediate layer is a coated and fired film of alkoxide of Aj with a thickness of 2,500 mm, and the holes are formed using a phosphoric acid aqueous solution by sputtering of 0-order SiNx of 600 mm. The patterning of 5INx was done by dry etching using CF gas.
Next, a pixel electrode ITO was formed to cover the contact hole portion. The current-voltage characteristics of the MSI element formed in this way are shown in Figure 5-(D), and the slope is slightly steeper than that of the conventional one, and there is no discernible difference in the element characteristics within the same substrate. Similarly, there was no disconnection of #l (pixel electrode).

尚、本発明実施例ではMSI素子の下電極(走査電極)
材料にAjを用いたが電気抵抗が低く、その酸化物が2
000・〜3000人で透明、かつ絶縁体であれば何で
も良い、たとえばTa、Orなどでも良い。
In the embodiment of the present invention, the lower electrode (scanning electrode) of the MSI element
Aj was used as the material, but its electrical resistance is low, and its oxide is 2
000-3000, any transparent and insulating material may be used, for example, Ta, Or, etc. may be used.

〔発明の効果〕〔Effect of the invention〕

以上述べた様に発明によれば、複数の行電極と対向基板
上にこれに交差して配置された複数の列電極を備え、こ
れら両電極の交差部にマトリックス状に形成された画素
部にMIM又はMSIのスイッチング用非線形抵抗2端
子素子と液晶を電気的に直列に接続して配置したアクテ
ィブマトリックス型液晶表示装置において前記スイッチ
ング用非線形抵抗2端子素子に中間層を設け、かつその
中間層が素子下電極材料の酸化物とすることにより基板
内の素子特性のばらつきを無くすことができ、上部電極
の断線も解消しな。これにより従来液晶パネルを中間調
で階調表示した際に問題になっていたシミ、ムラと呼ば
れる画質劣化が全く無くなるという効果を有する。加え
て5■〜10■で素子抵抗が3ゲタ変化する急峻な電流
−電圧特性も得られたため1/1000デウーテイーで
液晶パネルを駆動してもタロストークを生じさせず高品
位な画質を得ることができた。また最近表示の大画面化
ということで多数の液晶パネルを組み合わせ100イン
チ以上の表示装置が作製されているが各液晶パネル間の
特性のバラツキにより非常に見ずらいものとなっている
。だが本発明を用いれば製造ロット間の特性バラツキら
無くなるなめ視認性の良いものが容易に作れることにな
る。
As described above, according to the invention, a plurality of row electrodes and a plurality of column electrodes are arranged on a counter substrate to intersect therewith, and a pixel portion formed in a matrix at the intersection of these two electrodes is provided. In an active matrix liquid crystal display device in which an MIM or MSI switching nonlinear resistance 2-terminal element and a liquid crystal are electrically connected in series, an intermediate layer is provided in the switching nonlinear resistance 2-terminal element, and the intermediate layer is By using an oxide as the element lower electrode material, variations in element characteristics within the substrate can be eliminated, and disconnection of the upper electrode can also be eliminated. This has the effect of completely eliminating image quality deterioration called spots and unevenness, which have been problems when conventional liquid crystal panels display halftones. In addition, we were able to obtain a steep current-voltage characteristic in which the element resistance changes by 3 steps between 5 and 10 cm, so even when driving a liquid crystal panel at 1/1000 deuti, it is possible to obtain high-quality images without causing tarostalk. did it. In recent years, display devices of 100 inches or more have been manufactured by combining a large number of liquid crystal panels in order to increase the size of the display screen, but these display devices are extremely difficult to view due to variations in the characteristics of each liquid crystal panel. However, by using the present invention, it is possible to easily produce a product with good swivel visibility that eliminates variations in characteristics between manufacturing lots.

更に製造歩留りも向上することは言うまでもない。Needless to say, the manufacturing yield is also improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明実施例−1を示すM I M素子断面図
である。第2図、第3図は従来のMIM素子の断面図と
上面図である。第4図は従来のMSI素子断面図、第5
図は本発明実施例と従来のMIM、MSI素子の特性と
特性のバラツキを示す電流−電圧特性図、第6図は本発
明実施例を示すMSI素子断面図。 ■・・・基板 2・・・下部電極 3・・・上部電極 4・・・絶縁層 5・・・画質電極 6・・・中間層 7 ・−−Sem1−Insulator8・・・走査
電極 ET・・・電極エツチング端面 以上 出願人 セイコーエプソン株式会社 代理人 弁理士 銘木 喜三部 Ca1名)第1図 拓20 第30 系今図
FIG. 1 is a sectional view of an MIM element showing Example-1 of the present invention. FIGS. 2 and 3 are a cross-sectional view and a top view of a conventional MIM element. Figure 4 is a cross-sectional view of a conventional MSI element, Figure 5
The figure is a current-voltage characteristic diagram showing characteristics and characteristic variations of an embodiment of the present invention and conventional MIM and MSI elements, and FIG. 6 is a sectional view of an MSI element showing an embodiment of the present invention. ■...Substrate 2...Lower electrode 3...Upper electrode 4...Insulating layer 5...Image quality electrode 6...Intermediate layer 7 ---Sem1-Insulator8...Scanning electrode ET...・Electrode etching end face and above Applicant Seiko Epson Co., Ltd. Agent Patent attorney Kisanbe Kisanbe Ca1 name) Figure 1 Taku 20 No. 30 System diagram

Claims (1)

【特許請求の範囲】[Claims]  複数の行電極と対向基板上にこれに交差して配置され
た複数の列電極を備え、これら両電極の交差部にマトリ
ックス状に形成された画素部にMIM又はMSIのスイ
ッチング用非線形抵抗2端子素子と液晶を電気的に直列
に接続して配置したアクティブマトリックス型液晶表示
装置において、前記スイッチング用非線形抵抗2端子素
子が中間層を設け、かつその中間層が素子下電極材料の
酸化物であることを特徴とする液晶表示装置。
A plurality of row electrodes and a plurality of column electrodes are arranged on a counter substrate to intersect with each other, and a pixel portion formed in a matrix at the intersection of these two electrodes is provided with two terminals of a nonlinear resistor for MIM or MSI switching. In an active matrix liquid crystal display device in which an element and a liquid crystal are electrically connected in series, the switching nonlinear resistance two-terminal element has an intermediate layer, and the intermediate layer is an oxide of an element lower electrode material. A liquid crystal display device characterized by:
JP63115208A 1988-05-11 1988-05-11 Liquid crystal display device Pending JPH01283524A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63115208A JPH01283524A (en) 1988-05-11 1988-05-11 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63115208A JPH01283524A (en) 1988-05-11 1988-05-11 Liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH01283524A true JPH01283524A (en) 1989-11-15

Family

ID=14657038

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63115208A Pending JPH01283524A (en) 1988-05-11 1988-05-11 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH01283524A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5539549A (en) * 1993-02-01 1996-07-23 Sharp Kabushiki Kaisha Active matrix substrate having island electrodes for making ohmic contacts with MIM electrodes and pixel electrodes
US5859678A (en) * 1995-11-16 1999-01-12 Sharp Kabushiki Kaisha Two-terminal nonlinear element and method for fabricating the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5539549A (en) * 1993-02-01 1996-07-23 Sharp Kabushiki Kaisha Active matrix substrate having island electrodes for making ohmic contacts with MIM electrodes and pixel electrodes
US5859678A (en) * 1995-11-16 1999-01-12 Sharp Kabushiki Kaisha Two-terminal nonlinear element and method for fabricating the same

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