JPH01279463A - Error detection circuit - Google Patents

Abstract

PURPOSE:To detect a missing of signal in a short time by providing an A/D converter, a differentiating circuit, a counter, a latch and a discrimination circuit. CONSTITUTION:An FM conversion wave (a) is changed into a 1-bit digital signal by an A/D converter 3. A differentiating circuit 11 consists of a 1-clock delay circuit 5, an inverter 6 and an AND gate 7 and a differentiating pulse (d) by one clock width is generated as a detection signal at the leading of a digital signal. A counter 8 counts a clock CK and is reset by the signal (d). A latch 9 fetches a count (one period of FM modulation wave a) just before reset. A discrimination circuit 10 generates an error signal (e) when the count of the latch output is at the outside of success. When any missing of signal exists, a generating period of the detection signal (d) is abnormally longer and the successful range is exceeded. Through the constitution above, missing in the FM modulation wave in a short time is detected and no envelope detection capacitor or the like is required and simple constitution is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to laser vision, and more particularly to an error detection circuit used for detecting signal dropouts in FM modulated waves.

"Conventional Technology J: If there is dust or pinholes in the reflective film during the manufacturing process of a laser vision disc, when this is played back, high-frequency signals may be missing or the signal level may drop. This signal loss This is called a dropout. In the case of an audio signal, if there is a dropout, a "buzz" will occur from the playback sound.
A very loud licking noise occurs. Therefore, a dropout compensation method called pre-hold is adopted. This keeps the detected audio signal for a certain period of time, and if a dropout is detected at a certain point, the audio signal that has dropped out is replaced by
This method uses the audio signal immediately before that.

Now, in laser vision and the like, there is a circuit shown in FIG. 3 as an error detection circuit for detecting dropout of an FM modulated signal read from a medium. This error detection circuit consists of an envelope generation circuit 1 and a level detection circuit 2. The envelope generating circuit 1 consists of an AM detector and a time constant circuit including a capacitor. The envelope generating circuit 1 receives the FM modulated wave read from the media, performs AM detection, and generates an envelope signal of the detected signal. Then, in the level detection circuit 2, when the level of this envelope signal falls below a predetermined level, it is determined that a dropout has occurred, and an error signal is output.

"Problems to be Solved by the Invention" By the way, in conventional error detection circuits, the dropout detection sensitivity depends on the time constant circuit in the envelope generation circuit, and when the time constant is large, short-term dropouts occur. There was a problem that it could not be detected. In addition, parts such as capacitors are required to configure the time constant circuit.
There was a problem that the number of parts was large and the cost was high.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide an inexpensive error detection circuit that can detect even short-term dropouts.

"Means for Solving the Problems" The present invention provides an error detection circuit for detecting signal loss of an FM modulated wave, comprising: an A/D converter for converting the PM modulated wave into a one-hit digital signal; A differentiation circuit that detects the rising or falling edge of a digital signal and outputs a detection signal; a counter that is counted by a predetermined clock and reset by the detection signal; and the detection of the count value immediately before the counter is reset. It is characterized by comprising a latch that reads and outputs a signal, and a determination circuit that determines whether the output data of the latch is within a predetermined range and outputs an error signal if it is outside the predetermined range.

Effect J According to the above configuration, the FM modulated wave is converted into a 1-pit digital signal by the A/D converter.

Then, a change in the rise or fall of this digital signal is detected by a differentiating circuit, and a detection signal is output. On the other hand, the counter is always counted by a predetermined clock and is reset by a detection signal from the differentiating circuit.

At the same time, the count value of the counter immediately before reset is taken into the latch. Here, the count value taken into the latch is a value corresponding to one period of the FM modulated wave. The determination circuit then determines the count value taken into the latch, and outputs an error signal if the count value is outside a predetermined range.

"Embodiment" Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an error detection circuit according to an embodiment of the present invention. 3 is an A/D converter, which converts the FM modulated wave a inputted to the input terminal into a 1-bit digital signal. 4.5 is a one-clock delay circuit sampled by a clock CK of a constant frequency. A
The digital signal output from the /D converter 3 is delayed by one clock cycle (signal b) in the delay circuit 4, and is further delayed by one clock cycle in the delay circuit 5. 6 is an inverter, and 7 is an AND gate. Here, l clock delay circuit 5, inverter 6 and AND gate 7 are differentiator circuit 11
Configure. In this differentiation circuit II, a differentiation pulse having a width of one clock cycle is outputted as a detection signal d when the output digital signal of the A/D converter rises. 8
is a counter that counts the clock CK and is reset by the detection signal d from the differentiation circuit II. A latch 9 receives a clock signal 1t at its clock terminal CK, and receives a detection signal d from the differentiating circuit 11 at its load terminal LD. Then, the count value immediately before the counter 8 is reset is taken into the latch 9 and output.

At this time, the count value taken into the latch 9 corresponds to one cycle of the FM modulated wave a. A determination circuit 10 determines the count value output from the latch 9, and outputs an error signal e if the count value is outside the acceptable range.

FIG. 2 shows signal waveforms of each part of the error detection circuit described above. As shown in this figure, if there is a dropout part in the I''M modulated wave, the generation cycle of the detection signal d output from the differentiating circuit 11 becomes abnormally long, and during this period, the count value of the counter 8 changes to the determination circuit 10. It exceeds the passing range set in .

Then, when the detection signal d is generated, this count value is taken into the latch 9, and an error is determined by the determination circuit 10. Then, until the next detection signal d is generated,
An error signal e is generated.

Now, an actual design example of this error detection circuit in laser vision will be explained. The carrier frequency of the audio FM modulated wave is 2.3MHz for the channel.

The R channel is 2.8 MHz. The frequency deviation is 60 and I M I in the case of 100% modulation.
-1z. Therefore, the instantaneous frequency is! , the channel is 2.2-2. =IN4Hz, R channel is 2,7~
2.9 MHz. Here, in Fig. 1, if the frequency of the clock CK is set to 12.7 MHz, one period of a normal FM modulated wave is expressed by the number of clocks of the clock CK, and in the case of the L channel, it is 5.29 to 5. .77 clocks, and 4838 to 4.70 clocks for the R channel. Therefore, in the case of the L channel, the determination circuit 10
6 clocks and 4 to 5 clocks in the case of the R channel are set as the pass range, and if a count value outside the pass range is manually input from the latch 9, the design is such that an error signal is output.

"Effects of the Invention" As explained above, according to the present invention, there is provided an A/D converter that converts an FM modulated wave into a 1-pit digital signal, and an A/D converter that detects the rising or falling edge of the digital signal. a differential circuit that outputs a detection signal; a counter that is counted by a predetermined clock and reset by the detection signal; a latch that reads and outputs a count value immediately before the counter is reset by the detection signal; and the latch. The error detection circuit is equipped with a determination circuit that determines whether the output data is within a predetermined range and outputs an error signal if it is outside the predetermined range. It has the effect of realizing the following.

Further, the error detection circuit according to the present invention is suitable for LSI implementation, and does not require external parts such as an envelope detection capacitor unlike the conventional circuit, so that the entire circuit can be made inexpensive.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an error detection circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram showing the operation of the same embodiment, and FIG. 3 is a configuration diagram of a conventional error detection circuit. 3...A/D converter, 11...differentiation circuit,
8...Counter, 9...Latch, lO.
...Judgment circuit.

Claims (1)

[Claims] An error detection circuit that detects signal loss of an FM modulated wave, which includes an A/D converter that converts the FM modulated wave into a 1-bit digital signal, and a detection signal that detects the rising or falling edge of the digital signal. a counter that is counted by a predetermined clock and reset by the detection signal; a latch that reads and outputs a count value immediately before the counter is reset by the detection signal; and an output of the latch. An error detection circuit comprising: a determination circuit that determines whether data is within a predetermined range and outputs an error signal if the data is outside the predetermined range.