JPH01276787A - Laser diode chip carrier - Google Patents

Laser diode chip carrier

Info

Publication number
JPH01276787A
JPH01276787A JP10670488A JP10670488A JPH01276787A JP H01276787 A JPH01276787 A JP H01276787A JP 10670488 A JP10670488 A JP 10670488A JP 10670488 A JP10670488 A JP 10670488A JP H01276787 A JPH01276787 A JP H01276787A
Authority
JP
Japan
Prior art keywords
laser diode
resistor
chip carrier
diode
heat sink
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10670488A
Other languages
Japanese (ja)
Other versions
JPH069278B2 (en
Inventor
Mitsuo Fukuda
光男 福田
Kazuo Hagimoto
萩本 和男
Norifumi Sato
憲史 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10670488A priority Critical patent/JPH069278B2/en
Publication of JPH01276787A publication Critical patent/JPH01276787A/en
Publication of JPH069278B2 publication Critical patent/JPH069278B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To enable a resistor to be provided in the vicinity of a laser diode by providing on a board a separating groove between the laser diode and the resistor. CONSTITUTION:A substrate 2 is welded to a metal stem 1, and a strip wire 4 and a resistor 6 are provided on a heat sink 2. A laser diode 5 is mounted on part of the strip wire 4, and the upper electrode of the diode 5 is connected to the resistor 6 through a lead wire 7. A separating groove 8 is provided in the substrate 2, positioned between the diode 5 and the resistor 6. By providing the groove 8, generated heat on the resistor 6 conducts to the stem 1 to restrict the influence of heat generation of the resistor 6 on the diode 5. Hereby, the resistor 6 can be disposed in the vicinity of the diode 5 to provide a laser diode chip carrier excellent in high frequency characteristics.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、高速応答が可能で、熱放散の浸れたレーザダ
イオードチップキャリアに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a laser diode chip carrier capable of fast response and soaked in heat dissipation.

〔従来の技術・発明が解決しようとする課題〕通常のレ
ーザダイオードチップキャリアは、第3図(a) 、 
(b)に示すように、熱伝導の良い半導体やセラミック
等の表面をTi/Pt/Au等の金属でメタライズした
もの(以下ヒートシンクと言う)2の上にレーザダイオ
ード5をAu−5n等の金属により融着した構成となっ
ている。ヒートシンク2は、低融点金属等により金属ス
テムlに融着されている。上記構造のようにヒートシン
ク2を用いる理由は、レーザダイオードを金属ステムに
直接融着した場合は熱放散特性は良いものの、ダイオー
ドを形成する半導体と金属の熱膨張係数の差に起因した
歪をダイオードに生じせしめ、ダイオードの安定な動作
を損なわせるからである。一般にヒートシンク材として
用いられるのはダイヤモンド、シリコン等の半導体及び
SiC等のセラミックである。
[Prior art/problems to be solved by the invention] A typical laser diode chip carrier is shown in Fig. 3(a).
As shown in (b), a laser diode 5 is mounted on a material (hereinafter referred to as a heat sink) 2 whose surface is made of a semiconductor or ceramic material with good thermal conductivity and metallized with a metal such as Ti/Pt/Au. It has a metal fused structure. The heat sink 2 is fused to the metal stem l using a low melting point metal or the like. The reason for using the heat sink 2 as in the above structure is that although the heat dissipation characteristics are good when the laser diode is directly fused to the metal stem, the strain caused by the difference in thermal expansion coefficient between the semiconductor and metal that form the diode is This is because the stable operation of the diode is impaired. Semiconductors such as diamond and silicon, and ceramics such as SiC are generally used as heat sink materials.

かかる構成のチップキャリアに高速パルスを重畳する場
合には、インピーダンスマツチング用にある値を有する
抵抗を付ける必要がある。第3図において、6は上記の
インピーダンスマツチング用の抵抗であり、ヒートシン
ク2上に設けられている。この抵抗6はリード線7によ
りレーザダイオード5に接続されている。なお、図中3
は取り出し電極、4はストリップ線である。インビーダ
ンスマッチング用の抵抗を設けるのは、レーザダイオー
ドへの電気的バイアスの程度により、当該ダイオードの
抵抗が無限大から敗Ωにまで変化し、パルス波形が歪む
ことに起因している。このインピーダンスマツチング抵
抗はダイオードに近い方がより効果的であり、同一ヒー
トシンク基板上に設ける場合もある。しかし、この抵抗
における発熱は通常レーザダイオードより大きく、消費
電力で見るとレーザダイオードの数倍となり、抵抗での
発熱がレーザダイオードの特性を劣化せしめるため、抵
抗をレーザダイオードに近づけるのにも限界があった。
When a high-speed pulse is superimposed on a chip carrier having such a configuration, it is necessary to attach a resistor having a certain value for impedance matching. In FIG. 3, 6 is the impedance matching resistor, which is provided on the heat sink 2. In FIG. This resistor 6 is connected to the laser diode 5 by a lead wire 7. In addition, 3 in the figure
is an extraction electrode, and 4 is a strip line. The impedance matching resistor is provided because the resistance of the laser diode changes from infinity to zero Ω depending on the degree of electrical bias applied to the laser diode, distorting the pulse waveform. This impedance matching resistor is more effective if it is closer to the diode, and may be provided on the same heat sink substrate. However, the heat generated by this resistor is usually larger than that of a laser diode, and the power consumption is several times that of a laser diode.The heat generated by the resistor deteriorates the characteristics of the laser diode, so there is a limit to how close the resistor can be to the laser diode. there were.

その結果、レーザダイオードとマツチング用の抵抗間に
、配線による寄生のインダクタンス成分及びキャパシタ
ンス成分が生じ、高周波信号を歪ませ、高速変調を制限
する要因になっていた。
As a result, parasitic inductance and capacitance components are generated between the laser diode and the matching resistor due to the wiring, which distorts the high frequency signal and limits high-speed modulation.

レーザダイオードを高速または高周波で変調し、高出力
を得るには、マツチング用抵抗とレーザダイオードとを
近接し、かつ熱的に分離することが課題であった。
In order to modulate a laser diode at high speed or high frequency and obtain high output, it has been a challenge to bring the matching resistor and the laser diode close to each other and to thermally separate them.

本発明の目的は、抵抗での発熱に起因するレーザダイオ
ードの特性劣化を抑制し、抵抗をレーザダイオードに近
づけ、高周波特性の優れたレーザダイオードチップキャ
リアを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a laser diode chip carrier that suppresses deterioration of the characteristics of a laser diode due to heat generation in the resistor, brings the resistor closer to the laser diode, and has excellent high frequency characteristics.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、レーザダイオードとインピーダンスマツチン
グのための抵抗を同一基板上に有するチップキャリアに
おいて、上記基板に上記レーザダイオードと抵抗との間
に位置させて分離溝を設けたことを特徴とするものであ
る。
The present invention is a chip carrier having a laser diode and a resistor for impedance matching on the same substrate, characterized in that a separation groove is provided in the substrate between the laser diode and the resistor. It is.

〔実施例〕〔Example〕

第1図(a) 、 (b)は本発明一実施例を説明する
図であって、金属ステムl上にヒートシンク2 (基板
)が融着されており、ヒートシンク2上にストリップ線
4と抵抗6が設けられている。これらのストリップ線4
及び抵抗6は蒸着金属の選択及び一般的なフォトワーク
により製作可能である。そして、ストリップ線4の一部
にレーザダイオード5がマウントされ、レーザダイオー
ド5の上面電極はリード線7により抵抗6に接続されて
いる。
FIGS. 1(a) and 1(b) are diagrams explaining one embodiment of the present invention, in which a heat sink 2 (substrate) is fused onto a metal stem l, and a strip wire 4 and a resistor are placed on the heat sink 2. 6 is provided. These strip lines 4
and the resistor 6 can be manufactured by selecting a vapor deposited metal and using general photowork. A laser diode 5 is mounted on a part of the strip line 4, and the upper surface electrode of the laser diode 5 is connected to a resistor 6 by a lead wire 7.

ストリップ線4および抵抗6には取り出し電極3゜3が
接続されている。
A lead-out electrode 3.3 is connected to the strip line 4 and the resistor 6.

上記キャリアの取り出し電極3の一方に正、他方に負(
これらはレーザダイオードのストリップ線4への融着面
の極性で決定され、負である場合はストリップ線4へ負
バイアスが成される。)をバイアスするとレーザダイオ
ードは動作し、レーザ光が放射される。通常パルス変調
を行う場合は直流バイアスをある一定電流値に保ってお
き、取り出し電極3のいずれか一方よりパルス電流が加
えられる。その時、抵抗6により、レーザダイオード5
は、電極回路的に外部パルス回路へマツチングし、波形
歪なしにパルス変調されることになる。しかし、動作点
におけるレーザダイオード5の電気抵抗が5Ω程度であ
るのに対し、抵抗6の値は通常的50Ωであり、平均動
作電流が100mA の場合の消費電力はレーザダイオ
ード5が約50mW、抵抗6が約50011IWとなる
。かかる場合、抵抗6は発熱体として働き、レーザダイ
オード5の動作温度上昇を引き起こし、動作電流値によ
ってはレーザダイオード5とストリップ線4の融着金属
を再溶融することらある。一方、レーザダイオードは温
度に極めて敏感な素子であり、上記条件下では動作特性
の劣化が発生し、レーザ動作の停止に至ることもある。
One side of the extraction electrode 3 of the carrier is positive and the other side is negative (
These are determined by the polarity of the surface of the laser diode fused to the strip line 4, and if it is negative, a negative bias is applied to the strip line 4. ), the laser diode operates and emits laser light. Normally, when performing pulse modulation, the DC bias is kept at a certain constant current value, and a pulse current is applied from either one of the extraction electrodes 3. At that time, the resistor 6 causes the laser diode 5 to
is matched to an external pulse circuit in the form of an electrode circuit, and pulse modulation is performed without waveform distortion. However, while the electrical resistance of the laser diode 5 at the operating point is about 5Ω, the value of the resistor 6 is usually 50Ω, and when the average operating current is 100mA, the power consumption of the laser diode 5 is about 50mW, while the resistance of the resistor 6 is about 50Ω. 6 becomes approximately 50011 IW. In such a case, the resistor 6 acts as a heating element, causing an increase in the operating temperature of the laser diode 5, and depending on the operating current value, the welded metal between the laser diode 5 and the strip line 4 may be remelted. On the other hand, a laser diode is an element that is extremely sensitive to temperature, and under the above conditions, its operating characteristics may deteriorate and the laser operation may stop.

そこで、このキャリアには、上記の不都合を解消するた
めに、ヒートシンク2にレーザダイオード5と抵抗6と
の間に位置させて分[if8を設けである。分M溝8を
レーザダイオード5と抵抗6間に設けることにより、抵
抗6での発熱はステム1へ放散され、レーザダイオード
5に発熱の影響を受けずに動作せしめることが可能であ
る。本実施例によれば、レーザダイオード5と抵抗6と
を500μm以下に近づけてもレーザダイオードの特性
は抵抗6がない場合と同一であった。分離溝は通常の半
導体等の微細加工技術が適用可能であり、溝幅を100
μm以下にすることもできる。
Therefore, in order to eliminate the above-mentioned disadvantage, this carrier is provided with a portion [if8] located between the laser diode 5 and the resistor 6 on the heat sink 2. By providing the M groove 8 between the laser diode 5 and the resistor 6, the heat generated by the resistor 6 is dissipated to the stem 1, allowing the laser diode 5 to operate without being affected by the heat generated. According to this example, even if the laser diode 5 and the resistor 6 were brought closer to each other by 500 μm or less, the characteristics of the laser diode were the same as those without the resistor 6. The separation groove can be formed using ordinary microfabrication technology for semiconductors, etc., and the groove width can be set to 100 mm.
It can also be made smaller than μm.

分H′7t/18は第1図(a) 、 (b)に示す如
く、ヒートシンクを突き抜けても、第2図(a) 、 
(b)に示す如く、ヒートシンクの途中まで堀り込んで
も、あるいはステムまで切り込んでも溝による熱遮断の
効果は得られ、その形状が直線であっても、曲線であっ
ても同様であるし、溝に熱伝導率の悪い物質を充填して
も同様である。
As shown in Fig. 1(a) and (b), even if the minute H'7t/18 passes through the heat sink, Fig. 2(a),
As shown in (b), the effect of heat insulation by grooves can be obtained even if the grooves are cut halfway into the heat sink or even if they are cut all the way to the stem, and the same effect is obtained whether the grooves are straight or curved. The same effect can be obtained even if the groove is filled with a substance having poor thermal conductivity.

また、ヒートシンクあるいはステムの下に温度制御用の
ベルチェ素子等を実装した場合でも溝の効果は同様であ
る。
Further, the effect of the groove is the same even when a temperature control Beltier element or the like is mounted under the heat sink or the stem.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、基板にレーザダイオードと抵抗との間
に位置させて分離溝を設けたから、レーザダイオードに
対する抵抗の発熱の影響を抑えることができ、これによ
って抵抗をレーザダイオードに近づけることができ、高
周波特性に優れたレーザダイオードチップキャリアを提
供することができる。
According to the present invention, since the separation groove is provided on the substrate between the laser diode and the resistor, the influence of heat generated by the resistor on the laser diode can be suppressed, and thereby the resistor can be brought closer to the laser diode. , it is possible to provide a laser diode chip carrier with excellent high frequency characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)は本発明の一実施例として示したレーザダ
イオードチップキャリアの平面図、第1図(b)は同側
面図、第2図(a)は本発明の別の実施例として示した
レーザダイオードチップキャリアの平面図、第2図(b
)は同側面図、第3図(a)は従来のレーザダイオード
チップキャリアの平面図、第3図(b)は同側面図であ
る。 2・・・・・・基板(ヒートシンク)、5・・・・・・
レーザダイオード、6・・・・・・抵抗、8・・・・・
・分離溝。 第1図 (bl 第2図 (G) (b)
FIG. 1(a) is a plan view of a laser diode chip carrier shown as one embodiment of the present invention, FIG. 1(b) is a side view of the same, and FIG. 2(a) is a plan view of a laser diode chip carrier shown as another embodiment of the present invention. A top view of the laser diode chip carrier shown in FIG.
) is a side view of the same, FIG. 3(a) is a plan view of a conventional laser diode chip carrier, and FIG. 3(b) is a side view of the same. 2... Board (heat sink), 5...
Laser diode, 6... Resistor, 8...
・Separation groove. Figure 1 (bl) Figure 2 (G) (b)

Claims (1)

【特許請求の範囲】[Claims]  レーザダイオードとインピーダンスマッチングのため
の抵抗を同一基板上に有するチップキャリアにおいて、
上記基板に上記レーザダイオードと抵抗との間に位置さ
せて分離溝を設けたことを特徴とするレーザダイオード
チップキャリア。
In a chip carrier that has a laser diode and a resistor for impedance matching on the same substrate,
A laser diode chip carrier characterized in that a separation groove is provided in the substrate between the laser diode and the resistor.
JP10670488A 1988-04-28 1988-04-28 Laser diode chip carrier Expired - Fee Related JPH069278B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10670488A JPH069278B2 (en) 1988-04-28 1988-04-28 Laser diode chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10670488A JPH069278B2 (en) 1988-04-28 1988-04-28 Laser diode chip carrier

Publications (2)

Publication Number Publication Date
JPH01276787A true JPH01276787A (en) 1989-11-07
JPH069278B2 JPH069278B2 (en) 1994-02-02

Family

ID=14440382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10670488A Expired - Fee Related JPH069278B2 (en) 1988-04-28 1988-04-28 Laser diode chip carrier

Country Status (1)

Country Link
JP (1) JPH069278B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04337688A (en) * 1991-05-15 1992-11-25 Nec Corp Semiconductor laser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04337688A (en) * 1991-05-15 1992-11-25 Nec Corp Semiconductor laser

Also Published As

Publication number Publication date
JPH069278B2 (en) 1994-02-02

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