JPH01276658A - Package for housing semiconductor element - Google Patents
Package for housing semiconductor elementInfo
- Publication number
- JPH01276658A JPH01276658A JP10498888A JP10498888A JPH01276658A JP H01276658 A JPH01276658 A JP H01276658A JP 10498888 A JP10498888 A JP 10498888A JP 10498888 A JP10498888 A JP 10498888A JP H01276658 A JPH01276658 A JP H01276658A
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- metal layer
- metallized metal
- package
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 30
- 239000002184 metal Substances 0.000 claims abstract description 30
- 239000000463 material Substances 0.000 claims abstract description 21
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052863 mullite Inorganic materials 0.000 claims abstract description 12
- 229910000640 Fe alloy Inorganic materials 0.000 claims abstract description 7
- 238000005219 brazing Methods 0.000 claims description 24
- 239000010949 copper Substances 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052787 antimony Inorganic materials 0.000 claims description 3
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 12
- 229910000679 solder Inorganic materials 0.000 abstract description 8
- 238000005476 soldering Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 20
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000003860 storage Methods 0.000 description 6
- 229910000833 kovar Inorganic materials 0.000 description 5
- 230000035882 stress Effects 0.000 description 5
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000008646 thermal stress Effects 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 238000009864 tensile test Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- KGWWEXORQXHJJQ-UHFFFAOYSA-N [Fe].[Co].[Ni] Chemical compound [Fe].[Co].[Ni] KGWWEXORQXHJJQ-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000011247 coating layer Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 238000005096 rolling process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- ODINCKMPIJJUCX-UHFFFAOYSA-N Calcium oxide Chemical compound [Ca]=O ODINCKMPIJJUCX-UHFFFAOYSA-N 0.000 description 1
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- CWYNVVGOOAEACU-UHFFFAOYSA-N Fe2+ Chemical compound [Fe+2] CWYNVVGOOAEACU-UHFFFAOYSA-N 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000000292 calcium oxide Substances 0.000 description 1
- 235000012255 calcium oxide Nutrition 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010438 granite Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000007779 soft material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体素子を収容するための半導体素子収納用
パッケージの改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.
従来、半導体素子、特に半導体集積回路素子を収容する
ための半導体素子収納用パッケージは、一般にアルミナ
セラミックス等の電気絶縁材料から成り、その上面略中
央部に半導体素子を収容するための空所を有し、かつ上
面にモリブデン(Mo)、タングステン(讐)等の高融
点金属粉末から成るメタライズ金属層を有する絶縁基体
と、半導体素子を外部回路に電気的に接続するために前
記メタライズ金属層に銀ロウ等のロウ材を介し取着され
たコバール(鉄−ニッケルーコバルト)等の鉄合金から
成る外部リード端子と蓋体とから構成されており、絶縁
基体と蓋体とから成る容器内部に半導体素子が収容され
、気密封止されて半導体装置となる。Conventionally, semiconductor element storage packages for accommodating semiconductor elements, particularly semiconductor integrated circuit elements, are generally made of electrically insulating materials such as alumina ceramics, and have a cavity approximately in the center of the upper surface for accommodating the semiconductor element. and an insulating substrate having a metallized metal layer made of high melting point metal powder such as molybdenum (Mo) or tungsten (Mo) on the upper surface, and a metallized metal layer containing silver to electrically connect the semiconductor element to an external circuit. It consists of an external lead terminal made of an iron alloy such as Kovar (iron-nickel-cobalt) attached through a soldering material such as wax and a lid, and a semiconductor is placed inside the container consisting of an insulating base and a lid. The elements are housed and hermetically sealed to form a semiconductor device.
しかし乍ら、近時、半導体素子の大型化、信号の伝播速
度の高速化が急激に進み、該半導体素子を上記従来の半
導体素子収納用パッケージに収容した場合、以下に述べ
る欠点を有したものとなる。However, in recent years, the size of semiconductor devices and the speed of signal propagation have rapidly increased, and when such semiconductor devices are housed in the above-mentioned conventional semiconductor device storage package, the following drawbacks arise: becomes.
即ち、
■半導体素子を構成するシリコンとパッケージの絶縁基
体を構成するアルミナセラミックスの熱膨張係数がそれ
ぞれ3.0〜3.5 Xl0−6/℃、6.0〜7.5
xlO−’/ ’cであり大きく相違することから両
者に半導体素子を作動させた際等に発生する熱が印加さ
れると両者間に大きな熱応力が発生し、該熱応力によっ
て半導体素子が破損したり、絶縁基体より剥離して半導
体装置としての機能を喪失させてしまう■パッケージの
絶縁基体を構成するアルミナセラミックスはその誘電率
が9乃至10(室温IM11z)と高いため絶縁基体に
設けたメタライズ金属層を伝わる信号の伝播速度が遅く
、そのため信号の高速伝播を要求する半導体素子はその
搭載収容が不可となる
等の欠点を有していた。That is, (1) The thermal expansion coefficients of silicon constituting the semiconductor element and alumina ceramics constituting the insulating substrate of the package are 3.0 to 3.5, Xl0-6/℃, and 6.0 to 7.5, respectively.
xlO-'/'c, which is very different, so when the heat generated when the semiconductor element is operated is applied to both, a large thermal stress is generated between the two, and the semiconductor element is damaged due to this thermal stress. Otherwise, it may peel off from the insulating base and lose its function as a semiconductor device. ■The alumina ceramics that make up the insulating base of the package have a high dielectric constant of 9 to 10 (room temperature IM11z), so the metallization provided on the insulating base The propagation speed of signals transmitted through the metal layer is slow, and therefore semiconductor devices that require high-speed signal propagation cannot be mounted or accommodated.
そこで上記欠点を解消するために半導体素子収容用パッ
ケージの絶縁基体をアルミナセラミックスに代えて半導
体素子を構成するシリコンの熱膨張係数(3,0〜3.
5 xlO−’/ ’c)と近似した熱膨張係数4.0
〜4.5 Xl0−7℃を有し、かつ誘電率が6.3と
低いムライト質焼結体を用いることが検討されている。Therefore, in order to eliminate the above-mentioned drawbacks, the insulating base of the package for accommodating the semiconductor element was replaced with alumina ceramics, and the coefficient of thermal expansion of the silicon constituting the semiconductor element was 3.0 to 3.
Thermal expansion coefficient 4.0 approximated as 5xlO-'/'c)
The use of a mullite sintered body having a temperature of ~4.5 Xl0-7°C and a low dielectric constant of 6.3 is being considered.
しかし乍ら、このムライト質焼結体をパフケージの絶縁
基体として使用した場合、絶縁基体に設けたメタライズ
金属層に外部リード端子を銀ロウ(BAg−’8)を介
しロウ付けすると絶縁基体(ムライト質焼結体)と外部
リード端子(コバール等の鉄合金)の熱膨張係数がそれ
ぞれ4.0〜4.5 Xl0−”7℃、11.5〜13
.0Xlo−6/ ’Cで大きく相違すること及び銀ロ
ウのビッカース硬度(Ilv)が82〜90と硬いこと
等からロウ付は部に大きな応力が内在し、その結果、外
部リード端子に小さな外力が印加されても該外力は前記
内在応力と相俟って大きくなり外部リード端子を絶縁基
体より剥離させてしまうという問題を有していた。However, when this mullite sintered body is used as an insulating base of a puff cage, if external lead terminals are brazed to the metallized metal layer provided on the insulating base via silver solder (BAg-'8), the insulating base (mullite) The thermal expansion coefficients of the external lead terminal (ferrous sintered body) and external lead terminal (iron alloy such as Kovar) are 4.0 to 4.5, respectively.
.. 0Xlo-6/'C, and the Vickers hardness (Ilv) of silver solder is 82 to 90, so there is a large stress in the soldering part, and as a result, a small external force is applied to the external lead terminal. Even when applied, the external force becomes large together with the internal stress, resulting in the problem that the external lead terminal is peeled off from the insulating base.
本発明は上記欠点に鑑み案出されたものでその目的は絶
縁基体に設けたメタライズ金属層に外部リード端子を強
固にロウ付けするのを可能とし極めて信穎性の高い半導
体素子収納用パッケージを提供することにある。The present invention has been devised in view of the above-mentioned drawbacks, and its purpose is to provide a highly reliable package for housing semiconductor elements that enables external lead terminals to be firmly brazed to a metallized metal layer provided on an insulating substrate. It is about providing.
本発明はムライト質焼結体から成る絶縁容器にメタライ
ズ金属層を被着形成するとともに該メタライズ金属層に
鉄合金製の外部リード端子をロウ材を介し取着して成る
半導体素子収納用パンケージにおいて、前記ロウ材のビ
ッカース硬度(Hv)をHv≦67としたことを特徴と
するものである。The present invention provides a semiconductor element storage pancage comprising a metallized metal layer deposited on an insulating container made of a mullite sintered body, and external lead terminals made of iron alloy attached to the metallized metal layer via a brazing material. , the brazing material has a Vickers hardness (Hv) of Hv≦67.
次に本発明を添付図面に示す実施例に基づき説明する。 Next, the present invention will be explained based on embodiments shown in the accompanying drawings.
第1図は本発明の半導体素子収納用パッケージの一実施
例を示し、lはムライト質焼結体から成る絶縁基体、2
は蓋体である。この絶縁基体1と蓋体2とで絶縁容器3
が構成される。FIG. 1 shows an embodiment of the semiconductor element storage package of the present invention, in which l is an insulating base made of a mullite sintered body, and 2
is the lid body. An insulating container 3 is made up of this insulating base 1 and lid 2.
is configured.
前記絶縁基体1はその上面中央部に半導体素子を収容す
るための空所を形成する段状の凹部が設けてあり、凹部
底面には半導体素子4が接着材を介し取着される。The insulating substrate 1 has a step-shaped recessed portion forming a cavity for accommodating a semiconductor element in the center of its upper surface, and a semiconductor element 4 is attached to the bottom surface of the recessed portion via an adhesive.
前記絶縁基体1はムライト(3A1z(h・2SiOt
)、シリカ(SiOz)+ マグネシア(MgO)
、カルシア(cao)等の原料粉末に適当な有機溶剤、
溶媒を添加混合して泥漿状となすとともにこれをドクタ
ーブレード法を採用することによってグリーンシート(
生シート)を形成し、しかる後、前記グリーンシートに
適当な打抜き加工を施すとともに複数枚積層し、高温(
1400〜1800℃)で焼成することによって製作さ
れる。The insulating substrate 1 is made of mullite (3A1z(h・2SiOt
), silica (SiOz) + magnesia (MgO)
, an organic solvent suitable for raw material powder such as calcia (cao),
A green sheet (
After that, the green sheet is subjected to an appropriate punching process, multiple sheets are laminated, and the green sheet is heated at a high temperature (
It is manufactured by firing at a temperature of 1,400 to 1,800°C.
前記絶縁基体1には凹部段状上面から容器3の外部に導
出するメタライズ金属N5が形成されており、該メタラ
イズ金属層5の凹部段状上面部には半導体素子4の電極
がワイヤ6を介し電気的に接続され、また容器3の外部
に導出させた部位には外部回路と接続される外部リード
端子7がロウ材8を介し取着されている。A metallized metal N5 is formed on the insulating base 1 and is led out of the container 3 from the stepped upper surface of the recessed portion, and an electrode of the semiconductor element 4 is connected to the stepped upper surface of the recessed portion of the metallized metal layer 5 via a wire 6. An external lead terminal 7 which is electrically connected and connected to an external circuit is attached via a brazing material 8 to a portion led out of the container 3.
尚、前記絶縁基体1はムライト質焼結体より成っている
ことから誘電率が6.3と低く、該絶縁基体1に設けた
メタライズ金属N5を伝わる電気信号の伝播速度を速い
ものと成すことができる。Since the insulating substrate 1 is made of a mullite sintered body, the dielectric constant is as low as 6.3, and the propagation speed of the electric signal through the metallized metal N5 provided on the insulating substrate 1 is high. I can do it.
また前記メタライズ金属層5はタングステン(W)等の
金属粉末から成り、従来周知のスクリーン印刷法等の厚
膜手法を採用することによって絶縁基体1の凹部段状上
面から容器3の外部に導出するよう被着形成される。The metallized metal layer 5 is made of metal powder such as tungsten (W), and is led out of the container 3 from the step-like upper surface of the recessed portion of the insulating substrate 1 by employing a conventionally well-known thick film method such as screen printing. It is deposited and formed like this.
前記メタライズ金属層5にロウ付けされる外部リード端
子7は内部に収容する半導体素子4を外部回路に接続す
る作用を為し、外部リード端子7を外部回路に接続する
ことによって内部に収容される半導体素子4はメタライ
ズ金属N5及び外部リード端子7を介し外部回路に電気
的に接続されることとなる。The external lead terminals 7 that are brazed to the metallized metal layer 5 serve to connect the semiconductor element 4 housed inside to an external circuit, and are housed inside by connecting the external lead terminals 7 to the external circuit. The semiconductor element 4 will be electrically connected to an external circuit via the metallized metal N5 and the external lead terminals 7.
前記外部リード端子7はコバール(鉄−ニッケルーコバ
ルト合金)や42A11oy(鉄−ニッケル合金)等の
鉄合金から成り、コバール等のインゴットを従来周知の
圧延加工法にて任意の厚みを得た後、打抜き加工法等に
よって所定形状に形成される。The external lead terminal 7 is made of an iron alloy such as Kovar (iron-nickel-cobalt alloy) or 42A11oy (iron-nickel alloy), and is made by rolling an ingot of Kovar or the like to a desired thickness by a conventionally known rolling method. It is formed into a predetermined shape by a punching method or the like.
また、前記外部リード端子7を絶縁基体1に設けたメタ
ライズ金属層5に取着するロウ材8は例えば主成分とし
ての銀(Ag)にインジウム(In)を0゜1乃至15
.0重量%、銅(Cu)を2.0重量%以下、ゲルマニ
ウム(Ge)、アンチモン(Sb)の少なくとも1種を
1.0重量%以下含有させたものから成り、そのビッカ
ース硬度(11ν)がIlv≦67のものである。Further, the brazing material 8 for attaching the external lead terminal 7 to the metallized metal layer 5 provided on the insulating base 1 is composed of, for example, silver (Ag) as a main component and indium (In) of 0°1 to 15°C.
.. 0% by weight, 2.0% by weight or less of copper (Cu), and 1.0% by weight or less of at least one of germanium (Ge) and antimony (Sb), and its Vickers hardness (11ν) is Ilv≦67.
前記ロウ材8はそのビッカース硬度(tl v )がI
IV≦67で軟質なものであることから絶縁基体1に設
けたメタライズ層5に外部リード端子7をロウ付は取着
する際、絶縁基体1と外部リード端子7との熱膨張係数
が相違し、両者間に大きな熱応力を発生したとしても該
応力はロウ材8を変形させることによって吸収され、両
者のロウ付は部に大きな応力が内在することは一切ない
。したがってロウ付は後、外部リード端子7に外力が印
加されたとしても該外力がロウ付は部に内在する応力と
相俟って大となり外部リード端子7を剥離させることも
ない。The brazing material 8 has a Vickers hardness (tl v ) of I
Since it is a soft material with IV≦67, when the external lead terminal 7 is brazed or attached to the metallized layer 5 provided on the insulating base 1, the thermal expansion coefficients of the insulating base 1 and the external lead terminal 7 are different. Even if a large thermal stress is generated between the two, the stress is absorbed by deforming the brazing material 8, and no large stress is inherent in the brazing of the two parts. Therefore, even if an external force is applied to the external lead terminal 7 after brazing, the external force becomes large together with the stress inherent in the brazing part, and the external lead terminal 7 does not peel off.
尚、前記メタライズ金属層5にロウ材8を介してロウ付
けされた外部リード端子7にはその外表面に耐蝕性に優
れたニッケル(Ni)や金(Au)等から成る被覆層9
がメツキにより被着されており、該被覆層9によってメ
タライズ金属層5、ろう材8及び外部リード端子7は酸
化腐蝕するのが防止されている。The external lead terminal 7 brazed to the metallized metal layer 5 via the brazing material 8 has a coating layer 9 on its outer surface made of nickel (Ni), gold (Au), etc. with excellent corrosion resistance.
The coating layer 9 prevents the metallized metal layer 5, the brazing material 8, and the external lead terminal 7 from being oxidized and corroded.
かくして前記絶縁基体1の凹部底面に半導体素子4を接
着材を介し取着するとともに、半導体素子4の各電極を
メタライズ金属層5にワイヤ6を介し電気的に接続し、
しかる後、絶縁基体1の上面に蓋体2をガラス、樹脂等
の封止部材で取着し、絶縁容器3を気密に封止すること
によって製品としての半導体装置となる。Thus, the semiconductor element 4 is attached to the bottom surface of the recess of the insulating substrate 1 via the adhesive, and each electrode of the semiconductor element 4 is electrically connected to the metallized metal layer 5 via the wire 6.
Thereafter, the lid 2 is attached to the upper surface of the insulating substrate 1 with a sealing member such as glass or resin, and the insulating container 3 is hermetically sealed, thereby forming a semiconductor device as a product.
次に本発明の作用効果を以下に示す実験例に基づき説明
する。Next, the effects of the present invention will be explained based on the experimental examples shown below.
まず、i艮(Ag)、インジウム(In)、&同(Cu
)、アンチモン(Sb)及びゲルマニウム(Ge)を第
1表に示すように秤量し、これを合金化させてロウ材試
料を得る。First, i(Ag), indium(In), and indium(Cu)
), antimony (Sb), and germanium (Ge) are weighed as shown in Table 1, and alloyed to obtain a brazing material sample.
尚、試料14は本発明品と比較するための比較試料であ
り従来一般に使用されている恨ロウ(IIAg8:銀7
2重量%、銅28重量%)である。Sample 14 is a comparative sample for comparison with the product of the present invention, and is made of a commonly used granite wax (IIAg8: Silver 7).
2% by weight, copper 28% by weight).
次に得られた各ロウ材試料を使用し、ムライト質焼結体
から成る基板の表面に設けた5mm X 2mm (面
積10mn+”)のタングステンメタライズ金属層20
個に幅0.4mm 、長さ20mm、厚さ0.15m5
+のコバールから成る外部リード端子の一端をロウ付け
するとともに外部リード端子の他端(ロウ付けした側の
端部とは反対の端部)にロウ付は面に対し垂直方向の外
力を加えて引っ張りテストを行い外部リード端子がムラ
イト質焼結体から成る基板より剥がれた個数を調らべ、
これを外部リード端子のロウ付は強度とした。Next, using each obtained brazing material sample, a tungsten metallized metal layer 20 of 5 mm x 2 mm (area 10 mm+") was provided on the surface of a substrate made of a mullite sintered body.
Each piece has a width of 0.4mm, a length of 20mm, and a thickness of 0.15m5.
Braze one end of the external lead terminal made of positive Kovar, and apply an external force perpendicular to the surface to the other end of the external lead terminal (the end opposite to the soldered end). A tensile test was performed to determine the number of external lead terminals that were separated from the board made of sintered mullite.
This was taken as the strength for brazing external lead terminals.
尚、前記外部リード端子のロウ付は面積は幅0゜4mm
、長さ2.5mmの1.Omm”とし、タングステン
メタライズ金属層の外表面にはニッケル(Ni)がめっ
きにより被着させである。In addition, the area of the external lead terminal with solder is 0°4 mm in width.
, 1. of length 2.5 mm. The outer surface of the tungsten metallized metal layer is coated with nickel (Ni) by plating.
上記の結果を第1表に示す。The above results are shown in Table 1.
上記実験結果からも判るように従来の恨ロウを使用して
外部リード端子をロウ付けしたものは3Kg引っ張りテ
ストで外部リード端子のすべてが剥がれてしまいロウ付
けの強度が極めて低いものであるのに対し、本発明の硬
度(llv)が■ν≦67であるロウ材を用いたものは
4Kgの引っ張りテストでも外部リード端子の剥がれは
まったくなくロウ付けの強度が極めて高いものである。As can be seen from the above experimental results, when external lead terminals were brazed using conventional wax, all of the external lead terminals peeled off in a 3Kg pull test, and the strength of the brazing was extremely low. On the other hand, in the case of the present invention using a brazing material having a hardness (llv) of ■v≦67, the external lead terminal does not peel off at all even in a 4 kg tensile test, and the brazing strength is extremely high.
特にロウ材の硬度(Hv)がHv≦60であるものを使
用した場合には、5 Kgの引っ張りテストでも外部リ
ード端子の剥がれはほとんどなく、外部リード端子を強
固にロウ付けするにはロウ材の硬度(Hv)Hシ≦60
とすることが好ましい。In particular, when using a brazing material with a hardness (Hv) of Hv≦60, there is almost no peeling of the external lead terminal even in a 5 kg tensile test. Hardness (Hv) H≦60
It is preferable that
以上の通り、本発明の半導体素子収納用パッケージによ
れば、ムライト質焼結体から成る絶縁容器に設けたメタ
ライズ金属層に、ビッカース硬度(Hv)がHv≦67
であるロウ材を介して鉄合金から成る外部リード端子を
ロウ付けしたことからロウ付は時、絶縁容器と外部リー
ド端子との間に発生する熱応力は前記ロウ材を変形させ
ることによって吸収され、その結果、絶縁容器に設けた
メタライズ金属層への外部リード端子のロウ付けを強固
となすことができ極めて高信頼性の半導体素子収納用パ
フケージを提供することが可能となる。As described above, according to the semiconductor device storage package of the present invention, the metallized metal layer provided in the insulating container made of mullite sintered body has a Vickers hardness (Hv) of Hv≦67.
Since the external lead terminal made of iron alloy is brazed through the brazing material, the thermal stress generated between the insulating container and the external lead terminal is absorbed by deforming the brazing material. As a result, the external lead terminals can be firmly brazed to the metallized metal layer provided on the insulating container, making it possible to provide an extremely reliable puff cage for storing semiconductor elements.
第1図は本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
1:絶縁基体 2:M体
3:絶縁容器 5:メタライズ金属層7:外部
リード端子 8:ロウ材
特許出願人 (663)京セラ株式会社+ 7
5FIG. 1 is a cross-sectional view showing an embodiment of the semiconductor element storage package of the present invention. 1: Insulating base 2: M body 3: Insulating container 5: Metallized metal layer 7: External lead terminal 8: Brazing metal patent applicant (663) Kyocera Corporation + 7
5
Claims (2)
金属層を被着形成するとともに該メタライズ金属層に鉄
合金製の外部リード端子をロウ材を介し取着して成る半
導体素子収納用パッケージにおいて、前記ロウ材のビッ
カース硬度(Hv)をHv≦67としたことを特徴とす
る半導体素子収納用パッケージ。(1) In a package for housing a semiconductor element, which is formed by depositing a metallized metal layer on an insulating container made of a mullite sintered body, and attaching external lead terminals made of iron alloy to the metallized metal layer via a brazing material. . A package for housing a semiconductor device, characterized in that the brazing material has a Vickers hardness (Hv) of Hv≦67.
.1乃至15.0重量%、銅を2.0重量%以下、ゲル
マニウム、アンチモンの少なくとも1種を1.0重量%
以下含有させたものから成ることを特徴とする特許請求
の範囲第1項記載の半導体素子収納用パッケージ。(2) The brazing material contains silver as the main component and no indium.
.. 1 to 15.0% by weight, 2.0% by weight or less of copper, and 1.0% by weight of at least one of germanium and antimony.
A package for housing a semiconductor device according to claim 1, characterized in that the package comprises the following:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10498888A JP2601313B2 (en) | 1988-04-27 | 1988-04-27 | Package for storing semiconductor elements |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10498888A JP2601313B2 (en) | 1988-04-27 | 1988-04-27 | Package for storing semiconductor elements |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01276658A true JPH01276658A (en) | 1989-11-07 |
JP2601313B2 JP2601313B2 (en) | 1997-04-16 |
Family
ID=14395475
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10498888A Expired - Fee Related JP2601313B2 (en) | 1988-04-27 | 1988-04-27 | Package for storing semiconductor elements |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2601313B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4605932B2 (en) * | 2001-04-11 | 2011-01-05 | 京セラ株式会社 | Contact heating device |
-
1988
- 1988-04-27 JP JP10498888A patent/JP2601313B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4605932B2 (en) * | 2001-04-11 | 2011-01-05 | 京セラ株式会社 | Contact heating device |
Also Published As
Publication number | Publication date |
---|---|
JP2601313B2 (en) | 1997-04-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2601313B2 (en) | Package for storing semiconductor elements | |
JP2735708B2 (en) | Ceramic wiring board | |
JP2873105B2 (en) | Package for storing semiconductor elements | |
JP2764340B2 (en) | Package for storing semiconductor elements | |
JPH0321046A (en) | Package for storing semiconductor element | |
JP2813074B2 (en) | Package for storing semiconductor elements | |
JP2784095B2 (en) | Package for storing semiconductor elements | |
JP2742625B2 (en) | Electronic components with leads | |
JPH05160284A (en) | Semiconductor device containing package | |
JP2784094B2 (en) | Package for storing semiconductor elements | |
JP2515051Y2 (en) | Package for storing semiconductor devices | |
JP2717727B2 (en) | Package for storing semiconductor elements | |
JP2759297B2 (en) | Electronic components with leads | |
JP2710893B2 (en) | Electronic components with leads | |
JP2813072B2 (en) | Package for storing semiconductor elements | |
JPH06334077A (en) | Package for containing semiconductor element | |
JP2813073B2 (en) | Package for storing semiconductor elements | |
JP2783735B2 (en) | Package for storing semiconductor elements | |
JP2740605B2 (en) | Manufacturing method of semiconductor device storage package | |
JP3181011B2 (en) | Package for storing semiconductor elements | |
JPH0411754A (en) | Semiconductor element accommodation package | |
JP2670208B2 (en) | Package for storing semiconductor elements | |
JPH08125049A (en) | Package for containing semiconductor chip | |
JPS6175548A (en) | Semiconductor device | |
JPH05222472A (en) | Electronic parts with lead |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |