JPH01270416A - Information processor - Google Patents

Abstract

PURPOSE:To simplify the constitution of an information processor for parallel processing of data by selectively connecting one of processing executing means to an encoding/decoding means and energizing a switching means in accordance with-the operation state. CONSTITUTION:Plural processing executing means 101-103 requiring the encoding processing or the decoding processing are so constituted that each processing executing means subjects the whole of a prescribed block to the encoding or decoding processing, and respective processing executing means are selectively connected to an encoding/decoding means 5 through switching means 104 in accordance with operation states of processing executing means 101-103, and the encoding/decoding means 5 is operated in time division. The area of a memory 7 required by processing executing means 101-103 is divided into the number of processing executing means and is used, and thus, the constitution of the information processor is simplified and the information processor is miniaturized and is produced at low cost.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to an information processing device, and in particular, when data encoding or decoding processing is performed in parallel.
The present invention relates to an information processing device that does not require a plurality of encoding/decoding means.

(Prior Art) As is well known, in an information processing apparatus such as a facsimile machine, data encoding processing and/or decoding processing may be performed in parallel.

An example of this parallel processing will be explained below.

In recent years, facsimile machines that have a memory for storing image information have been proposed, but in such facsimile machines, the image information that has been encoded and stored in the memory is stored in the line density and recording paper of the other party's facsimile machine. Some devices are configured so that the image information is converted and transmitted according to the width of the document, and at the same time, the document for the next destination can be read from the reading section, encoded, and stored in the memory.

FIG. 7 is a schematic block diagram of a facsimile machine configured in this manner.

In the figure, CPU1, ROM2, RAM3, modem4
, the encoding means 5A, the decoding means 5B, and the encoding means 5C are connected to a bus 99. The encoding means 5A, the decoding means 5B, and the encoding means 5C each have the same configuration.

The encoding means 5A is an image information RAM? A, and the image information RAM 7A is connected to the reading H9.

The decoding means 5B stores the image information R in the image information RAM 7B.
AM7B inputs the image information converting means 6 and the recording section 8, and the image information converting means 6 inputs the image information R to the image information RAM 7C.
AM7C is connected to the encoding means 5C, respectively.

The image information converting means 6 converts the image information output from the image information RAM 7B according to the density of the facsimile machine of the other party and the width of the recording paper.

In such a facsimile device, when reading image information from the reading section 9, the image information input from the reading section 9 is stored in the image information RAM? Once stored in A, the image information RA
M? The image information stored in A is encoded using the encoding means 5A, and the encoded data is transferred to RAMa.
memorize it internally.

In encoding systems such as MR and MMR, it is necessary to encode an image information line by referring to the data of the line preceding the line to be encoded. The same applies to decoding. For this reason, the encoding or decoding means 5A to 5C include image information RAM? A to 7C are connected.

When transmitting the data (encoded data) stored in the RAMa, the data is first read out from the RAM 3, decoded using the decoding means 5B, and stored in the image information RAM 7B. The image information RAM7B
The data read out from the image information converting means 6 converts the line density, line by line, according to the destination facsimile machine.
and recording paper width, and is stored in the image information RAM 7C. Then, it is encoded again by the encoding means 5C and stored in the RAM 3. This image information stored in the RAM 3 is output to the line via the modem 4.

In this way, when reading image information, storing it in memory, converting the image information according to the line density and recording paper width of the other party's facsimile machine, and transmitting the image information, the encoding/decoding means and the image information are Three information RAMs are required for each.

In addition, when recording the image information transmitted from the other party's facsimile machine and simultaneously reading the image information to be transmitted next, the encoding/decoding means and the image information RA
Two each of M (encoding means 5A, decoding means 5B, and image information RAMs 7A and 7B) are required.

(Problems to be Solved by the Invention) The above-described conventional technology had the following problems.

That is, as mentioned above, in conventional facsimile machines, when performing multiple different processes that require encoding or decoding at the same time, it is necessary to provide multiple encoding/decoding means. Ta.

Therefore, the structure of the facsimile device becomes complicated and large, and its production requires a large amount of cost.

The present invention has been made to solve the above-mentioned problems.

(Means and Effects for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a plurality of processing execution means that require encoding processing or decoding processing, each processing execution means having a predetermined function. The system is configured to perform encoding processing or decoding processing for each block, and each processing execution means is selectively connected to the encoding/decoding means depending on the operating state of each processing execution means. It is characterized by the fact that In other words, the feature is that the encoding/decoding means are operated in a time-division manner.

This can produce the effect that it is not necessary to provide a plurality of encoding/decoding means.

Another feature is that when each of the processing execution means requires a memory device, the memory area is divided and used by the number of processing execution means.

This can produce the effect that it is not necessary to use a plurality of memory devices.

(Example) The present invention will now be described in detail with reference to the drawings.

FIG. 2 is a schematic block diagram of one embodiment of the present invention. In FIG. 2, the same reference numerals as in FIG. 7 represent the same or equivalent parts.

In FIG. 2, the CPUI, ROM2, RAM3, modem 4, and encoding/decoding means 5 each have a bus 9.
9 is connected. The RAM 3 has a FIFO structure. The encoding/decoding means 5 has the same configuration as the encoding means 5A, the decoding means 5B, or the encoding means 5C shown in FIG. or decrypt.

The image information RAM 7 is a dual port RAM for images, and its random ports 71 and 72 are connected to the encoding/decoding means 5 and the image information converting means 6. The serial port 73 of the image information RAM 7 is connected to the recording section 8 and the reading section 9.

The controller 100 includes the encoding/decoding means 5, the image information converting means 6, and the image information RAM? , the recording section 8, and the reading section 9, and manages each of them. Further, this controller 100 is also connected to the CPUI.

A modification of the information processing apparatus shown in FIG. 2 is shown in FIG. In FIG. 3, the same reference numerals as those in FIG. 2 refer to the same or equivalent parts, so a description thereof will be omitted.

In FIG. 3, a CPU interface (hereinafter abbreviated as f/F) 11 connected to a bus 99 is a CPU interface
The operation mode and operation parameters (reduction ratio,
data for setting the activation of the reading section 9, etc.) are processed by the image information converting means 6 and encoding/l! which will be described later. It is written in the No. 2 conversion means 13 and the recording section/reading section 1/F 14. Also, the status of the means 6, 13 and 14 is read.

Each of the means 6.13.14 operates independently according to commands output from the CPUI.

Each of the means 6, 13.14 includes an image information RAM1/F12.
It is connected to the image information RAM 7 via. In this example, the image information RAM 7 is 1, dual port RAM
It doesn't have to be M.

The encoding/decoding means 1/F 13 is connected to the encoding/decoding means 5, and the recording unit/reading unit 1/F 14 is connected to the encoding/decoding unit 5.
It is connected to the recording section 8 and the reading section 9.

The encoding/decoding means I/F 13 sets the timing etc. for the memory access output from the encoding/decoding means 5, and transmits the access signal to the image information RAMI.
Output to /F12.

The image information converting means 6 is an image information RAM? Read the image information and follow the operation mode set by the CPUI.
Convert the image information. Then, the image information is converted into the image information R.
Write to AM7.

The recording section/reading section 1/F14 performs interface control regarding data transmission and reception with the recording section 8 and the reading section 9.

The image information RAM I/F 12 outputs an access signal for accessing the image information RAM 7, and the encoding/decoding means! Image information RA output from /F13, image information conversion means 6, and recording section/reading section 1/F14
Arbitrates the M7 access request signal.

The operation of the embodiment having the above configuration will be explained using FIGS. 4-5.

FIG. 4 is a flowchart outlining the flow of image information when image information encoded in advance and stored in RAMa is transmitted to the other party's facsimile machine;
FIG. 5 is a flowchart showing an outline of the flow of image information when reading image information to be transmitted to the next destination. In the facsimile machine, both processes are executed simultaneously.

In order to increase the data processing speed, only the processing of steps S1 and S6 in FIG. 4 and the processing of step S23 in FIG. 5 are determined by the CPU.
The processing of other steps is basically performed by the controller 100 shown in FIG. 2 or by the CPU/UI shown in FIG.
This is performed in hardware in the file, image information RAMI/F12, encoding/decoding means 1/F13, and recording section/reading section 1/F14. Of course, if a decrease in data processing speed is allowed, the controller 100 or each of the 1/Fils, 12, 13, and 14 can be omitted and all the processes shown in FIG. This may be done in a soft manner.

First, in FIG. 4, in step S1, it is determined whether encoding in step S7, which will be described later, has been completed.

If it has been completed, the image information previously encoded and stored in the RAM 3 is read out and decoded by the encoding/decoding means 5 in step S2. This decoding is performed for one predetermined block (several lines plus a few lines).

In step S3, the decoded information is stored in the 1 blower 01.

Note that the processes in steps S2 and S3 are not actually performed independently, but are performed in relation to each other.

FIG. 6 is a schematic diagram showing an example of the contents of the image information RAM 7. As shown in this figure, the image information RAM 7 has a first area 701, a second area 70, in order of decreasing address.
2, and a third region 703.

Returning to FIG. 4, in step S4, the image information stored in the first area 701 of the image information RAM 7 in step S3 is converted by the image information converting means 6. This conversion is performed according to the line density and recording paper width of the other party's facsimile machine.

In step S5, the converted image information is stored in the second area 702 of the image information RAM 7.

In step S6, it is determined whether the encoding performed in step S24 in FIG. 5 has been completed.

If it has been completed, in step S7, the image information RAM
7 reads out the image information stored in the second area 702,
It is encoded in the encoding/decoding means 5. This encoding is also performed for one block.

In step S8, the encoded image information for one block is stored in the RAM3.

In step S9, the RAM
The image information stored in 3 is sent to modem 4 and modulated.

In step S10, the modulated image information is sent to the line.

In step Sll, it is determined whether there is still image information to be transmitted. If there is, the process returns to step S1; if there is, the process ends.

In this way, the image information stored in RAMa is converted according to the other party's facsimile device and then transmitted.

Next, in step S21 in FIG. 5, the reading section 9 first reads one block of image information.

In step S22, one block of read image information is stored in the third area 703 of the image information RAM 7.

In step S23, it is determined whether one block of image information has been decoded in step S2 in FIG.

If it has been completed, in step S24, the image information RA
The image information stored in the third area 703 of M7 is read out, and the encoding/decoding means 5 encodes the image information for one block.

In step S25, the encoded image information for one block is stored in the RAM3.

In step S26, it is determined whether or not reading has ended. If reading has not ended, the process returns to step S21, and if it has ended, the process ends.

Now, in the above example, the image information RAM 7 is divided into three areas 701, 702, and 703, and is provided with only one, but the present invention is particularly limited to this. Of course, there may be three such devices, as shown in FIG. 7.

Further, the third area 703 is further divided into two parts, first, one block of image information read by the reading section 9 is stored in one of the parts, and then image information is read out from the one area. The image information is stored in the two areas, and the image information is transferred to the encoding/decoding means 5, and one block of image information read by the reading unit 9 is stored in the other area. If the data are read out alternately, the data processing speed of the facsimile machine can be further increased.

Further, in the above embodiment, the image information stored in RAMa is transmitted to the other party, and the image information to be transmitted next is transmitted to the other party.
Although the present invention is configured to be stored in AMa, the present invention is not particularly limited to this.
It may be configured to record the image information transmitted from the other party's facsimile machine and at the same time read the image information to be transmitted next. In this case, decoding of image information performed when recording image information and encoding of image information performed when reading image information to be transmitted next may be performed alternately for each block. Since the configuration in this case can be easily performed by those skilled in the art, the explanation thereof will be omitted.

Furthermore, by using two lines, it is possible to simultaneously transmit image information to the destination facsimile device and receive image information from the destination facsimile device.

Furthermore, the present invention is not limited to information processing apparatuses that perform these processes, but is applicable to all information processing apparatuses that use encoding/decoding means for different processes.

FIG. 1 is a functional block diagram of the present invention.

In FIG. 1, first processing execution means 101, second processing execution means 102, . . . , Nth processing execution means 103
is connected to the encoding/decoding means 5 via the switching means 104. This switching means 104 connects any one of the processing execution means to the encoding/decoding means 5.

Each of the processing execution means sends a signal indicating the processing state (for example, a signal indicating that the processing operation has been completed) to the control means 105.
Send to. The control means 105 energizes the switching means 104 according to the operating state of each processing execution means.

In the embodiment described above, each of the processing execution means is a means for executing at least the processing of steps S2 and S7 in FIG. 4 and step S24 of FIG. 5.

Now, in the above description, the information processing device was applied to a facsimile machine, but the present invention is not limited to this, and may be applied to a filing device such as a workstation. .

(Effects of the Invention) As is clear from the explanation below, according to the present invention, the following effects are achieved.

(1) Since the encoding/decoding means are used in a time-sharing manner, only one encoding/decoding means is required, whereas a plurality of encoding/decoding means were conventionally required. Therefore, the configuration of the information processing device is simplified, and it can be manufactured in a small size and at low cost.

(2) When each processing execution means shares a memory device, the memory device is divided and used by the number of each processing execution means, so instead of using multiple memory devices, there is now only one memory device. It would be good if only one could be established. therefore,
The configuration of the information processing device is further simplified, and the information processing device can be manufactured in a small size and at low cost.

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram of the present invention. FIG. 2 is a schematic block diagram of one embodiment of the present invention. FIG. 3 is a schematic block diagram of a modification of the information processing apparatus shown in FIG. 2. FIG. 4 is a flowchart schematically showing the flow of image information when image information encoded in advance and stored in RAMa is transmitted to the other party's facsimile machine. FIG. 5 is a flowchart showing an outline of the flow of image information when reading image information to be transmitted to the next destination. FIG. 6 is a schematic diagram showing the contents of the image information RAM 7. FIG. 7 is a schematic block diagram of a conventional facsimile machine. l...CPU, 2...ROM, 3...RAM, 5
... encoding/decoding means, 6... image information conversion means,
7... Image information RAM, 8... Recording section, 9... Reading section, 101... First processing execution means, 102...
Second processing execution means, 103...Nth processing execution means, 104...Switching means, 105...Controlling means Patent attorney Michito Hiraki and 1 other person M3 Inline

Claims (3)

[Claims] (1) An encoding/decoding means, a plurality of processing execution means for performing information processing on only a predetermined block using the encoding/decoding means, and selectively converting any one of the processing execution means to the encoding 1. An information processing apparatus comprising: switching means connected to encoding/decoding means; and control means energizing the switching means depending on the operating state of each of the processing execution means. (2) The information processing apparatus according to claim 1, wherein each of the processing execution means shares the same memory device. (3) The information processing apparatus according to claim 2, wherein the memory device is an image information RAM.