JPH01268326A - Power control circuit for lowering generation of electromagnetic noise - Google Patents

Power control circuit for lowering generation of electromagnetic noise

Info

Publication number
JPH01268326A
JPH01268326A JP9732688A JP9732688A JPH01268326A JP H01268326 A JPH01268326 A JP H01268326A JP 9732688 A JP9732688 A JP 9732688A JP 9732688 A JP9732688 A JP 9732688A JP H01268326 A JPH01268326 A JP H01268326A
Authority
JP
Japan
Prior art keywords
load
transistors
electromagnetic noise
circuit
voltages
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9732688A
Other languages
Japanese (ja)
Inventor
Atsuhiko Suzuki
敦彦 鈴木
Masato Miyahara
宮原 真人
Yuusaku Himono
檜物 雄作
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP9732688A priority Critical patent/JPH01268326A/en
Publication of JPH01268326A publication Critical patent/JPH01268326A/en
Pending legal-status Critical Current

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  • Dc-Dc Converters (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To lower the generation of an electromagnetic noise by constituting the title circuit so that an intermediate voltage of voltages of both ends of a load becomes constant. CONSTITUTION:Signals having a PWM waveform which have been generated by a logic circuit A are inputted to bases of an NPN type transistor Q1 and a PNP type transistor Q2, respectively by allowing one of them to pass through an inverter B. The transistors Q1, Q2 constitute an emitter follower circuit, a response waveform of an output against an input waveform is quick enough, and the transistors Q1, Q2 become ON or OFF roughly simultaneously. Resistances R3, R4 use an equal resistance so that when the transistors Q1, Q2 are both OFF, an intermediate voltage of voltages of both ends of a motor M becomes 1/2 of a pull-up voltage Vcc. In such a way, a pulse voltage applied to electric wires D1, D2 which have been connected to both ends of a load is negated and it does not occur that an electromagnetic noise is generated in the periphery.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は自動車あるいはその他の−m的用途に使われる
直流モータ、あるいは電燈など比較的大きな電流を使う
負荷の電力を制御するためのものである。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention is for controlling the power of loads that use relatively large currents, such as DC motors used in automobiles or other industrial applications, or electric lights. be.

〔従来の技術〕[Conventional technology]

自動車あるいはその他の一般的用途に使われる直流モー
タ、あるいは電燈など比較的大きな電流を使う負荷の電
力を制jJする時、パワー半導体が使われる。しかし単
純なパワー半導体のアナログ的制御ではモータ等の負荷
の制御状態によってはパワー半導体の熱損失は非常に大
きくなる。そのため実際の装置では、高価な大電力損失
のパワー半導体やさらには大きな放熱板、ファンモータ
等が必要となりスペース的、重量的にも大きな装置とな
ってしまう、このため従来よりコントロール用パワー半
導体の発熱を少なくして負荷に供給する電力を制御する
方法としてONとOFFの時間の比を細かくして制御す
るPWM制御制御式方式るがこの方法では負荷に急瞬な
電圧が加わるため、周辺の無線機器等に電磁雑音を発生
させることがある。特に自動車内では必ず近くにAM、
FMラジオがあるだけに問題が大きい、従来、この対策
として負荷に電力を伝える電線にシールド線を用いる方
法、パルス波形そのものをなまらせてしまう方法等があ
った。
Power semiconductors are used to control the power of loads that use relatively large currents, such as DC motors used in automobiles or other general applications, or electric lights. However, in simple analog control of power semiconductors, the heat loss of the power semiconductors becomes extremely large depending on the control state of a load such as a motor. Therefore, in actual equipment, expensive power semiconductors with high power loss, large heat sinks, fan motors, etc. are required, resulting in large equipment in terms of space and weight.For this reason, it is more difficult to use power semiconductors for control than before. A method of controlling the power supplied to the load while reducing heat generation is the PWM control method, which finely controls the ratio of ON and OFF times. However, with this method, a sudden voltage is applied to the load, causing damage to the surrounding area. It may generate electromagnetic noise in wireless equipment, etc. Especially when in a car, there is always an AM nearby.
This is a serious problem since FM radio exists, and conventional countermeasures include using shielded wires for the wires that transmit power to the load, and methods that blunt the pulse waveform itself.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながらシールド線を用いる方法はコストが高く、
モータが負荷である時はその極性を反転させることが困
難であり、パルス波形そのものをなまらせてしまう方法
はある程度以上行なうとかえって本来のPWM制御方式
の目的であるパワー半導体の発熱を防ぐ目的からはず゛
れてパワー半導体の発熱量が増えてしまうといった問題
点があった。本発明の目的は負荷のPWM制jn時に発
生する電磁雑音を低下させる電力制御回路を提供するに
ある。
However, the method of using shielded wires is expensive;
When the motor is a load, it is difficult to reverse its polarity, and if the method of dulling the pulse waveform itself is done beyond a certain level, it actually defeats the purpose of preventing power semiconductors from generating heat, which is the original purpose of the PWM control method. There was a problem in that the amount of heat generated by the power semiconductor increased due to the fluctuation. An object of the present invention is to provide a power control circuit that reduces electromagnetic noise generated during PWM control of a load.

〔課題を解決するための手段] 本発明は上記の問題点を解決するためになされたもので
、モータあるいは電球等の負荷に供給する電力をスイッ
チ素子のON、OFFの時間比で電力を制御する回路で
あって、前記負荷の両端の電圧の中間電圧が一定になる
ようにしたことを特徴とするものである。
[Means for Solving the Problems] The present invention has been made to solve the above problems, and it controls the power supplied to a load such as a motor or a light bulb based on the ON/OFF time ratio of a switch element. This circuit is characterized in that the intermediate voltage between the voltages at both ends of the load is constant.

〔作用〕[Effect]

負荷の両端の電圧の中位電圧が一定になるように電力制
御回路を構成したため負荷の両端に接続された電線D1
、D2にかかるパルス電圧が打ち消され周辺に電磁雑音
を発生することがない。
The electric wire D1 connected to both ends of the load is
, D2 are canceled and no electromagnetic noise is generated in the surrounding area.

〔実施例す] 第1回は本発明を応用したPWM制御方弐を用いた電力
制御回路の一実施例である。AはPWM波形を発生させ
る論理回路で、ここで発生されたPWM波形をもつ信号
は、一方はインバータBを通して論理を逆転させ、それ
ぞれ抵抗R1,R2を通りNPN型トランジスタQ1、
PNP型トランジスタQ2のベースに入る0両トランジ
スタQ1、Q2はエミッタホロワ回路を構成しており、
入力波形に対する出力の応答波形は十分早く、両トラン
ジスタQ1、Q2はほぼ同時にONまたはOFFする0
両トランジスタQl、Q2のハースとグランドとの間に
コンデンサClC2を入れ積分回路を構成させたのは前
記両トランジスタQ1、Q2のONまたはOFFの同時
性をさらに向上させるためである。抵抗R3、R4は等
しい抵抗を用い、両トランジスタQI Q2がともにO
FFの時、モータMの両端の電圧の中間電圧がプルアッ
プ電圧Vccの1/2になるようにする。
[Example] The first example is an example of a power control circuit using PWM control method 2 to which the present invention is applied. A is a logic circuit that generates a PWM waveform, and the signal with the PWM waveform generated here is passed through an inverter B, which inverts the logic, and passes through resistors R1 and R2, respectively, to an NPN transistor Q1,
The two transistors Q1 and Q2 that enter the base of the PNP transistor Q2 constitute an emitter follower circuit.
The response waveform of the output to the input waveform is sufficiently fast, and both transistors Q1 and Q2 turn on or off almost simultaneously.
The reason why a capacitor ClC2 is inserted between the hearth of both transistors Ql and Q2 and the ground to form an integrating circuit is to further improve the simultaneity of turning on or off both transistors Q1 and Q2. Resistors R3 and R4 are equal in resistance, and both transistors QI and Q2 are both O
At the time of FF, the intermediate voltage between the voltages at both ends of the motor M is made to be 1/2 of the pull-up voltage Vcc.

このようにすると両トランジスタQ1、Q2がONの時
でもOFFの時でもモータMの両端の電圧の中間電圧は
V c c / 2となる。実際には両トランジスタQ
1、Q2のほんのわずかなスイッチング誤差により、第
4図(a)に示すような負荷の両端の電圧VLV2が合
成されてできる同図Φ)に示す中間電圧(V1+V2)
/2の波形にはひげ状の波形■1があられれるが、その
波形Hの高周波成分の電圧が十分小さければ問題はない
、電線D1、D2はツイストペア線にすることが望まし
いがそれに近い平行線であっても十分効果はある。電線
D1、D2の2本の線はなるべく、等しい位置におくこ
とが大切である0本発明の電力制御回路はエミッタホロ
ワ回路にするだけでなく同時にON、OFFできるよう
なスイッチ回路を用いることによりいろいろな構成例が
考えられる。第2図はスイッチ部分にショットキーダイ
オードで飽和しないようにしたトランジスタを用いて構
成した例である。この外にMOS、FETにより同様な
回路を組むこともできる。第3図はモータMの逆転及び
回転数を同時に制御するものである。NPN型トランジ
スタQl、Q3、PNP型トランジスタQ2、Q4で第
1図と同様なエミッタホロワ回路を構成している。モー
タMを正転する時は、TL流を矢印の方向に流すとすれ
ば、PNP型トランジスタQ2、NPN型トランジスタ
Q3をOFF、NPN型トランジスタQ1、PNP型ト
ランジスタQ4をON、OFFさせてPWM制御するよ
うにマイコン等の論理回路Aで制御する。NPN型トラ
ンジスタQ1、PNP型トランジスタQ4をOFF、、
PNP型トランジスタQ2、NPN型トランジスタQ3
をON、OFFさせてPWM制御するようにマイコン等
の論理回路Aで制御させれば逆転時のPWM制御が可能
である。抵抗R1、R2、R3、R4はトランジスタQ
1、Q2、Q3、Q4がすべてOFFの時であってもモ
ータMの両端の電圧の中間電圧がプルアンプ電圧Vcc
の1/2になるようにするためのものである。第5図は
負荷の両端の電圧の中間電圧を一定に保つための他の実
施例を示している。スイッチ回路は負荷の一端側にしか
接続されておらず、もう一端は中間電圧検出回路P、比
較回路Fより来た負荷の両端の電圧の中間電圧のずれ分
で制御された電流制御回路Eに入力される。この方式は
第1図に示す実施例よりも複雑であるがモータMの微妙
な過渡電圧にもよく応答し、より電磁雑音の発生を低下
させることができる。
In this way, the intermediate voltage between the voltages across the motor M becomes Vcc/2 regardless of whether the transistors Q1 and Q2 are on or off. Actually both transistors Q
1. Due to a slight switching error in Q2, the voltage VLV2 across the load as shown in Fig. 4(a) is synthesized, resulting in the intermediate voltage (V1+V2) shown in Φ) in the same figure.
A whisker-like waveform ■1 appears in the /2 waveform, but there is no problem as long as the voltage of the high frequency component of the waveform H is sufficiently small.It is preferable that the electric wires D1 and D2 be twisted pair wires, but parallel wires close to that. Even so, it is quite effective. It is important to place the two wires D1 and D2 at the same position as much as possible.The power control circuit of the present invention not only uses an emitter follower circuit, but also uses a switch circuit that can be turned on and off at the same time. There are several possible configuration examples. FIG. 2 shows an example in which a Schottky diode is used in the switch portion to prevent saturation of the transistor. In addition to this, a similar circuit can be constructed using MOS and FET. FIG. 3 shows how the reverse rotation and rotational speed of the motor M are controlled simultaneously. NPN transistors Ql and Q3 and PNP transistors Q2 and Q4 constitute an emitter follower circuit similar to that shown in FIG. When the motor M rotates forward, if the TL flow is to flow in the direction of the arrow, PWM control is performed by turning off the PNP transistor Q2 and NPN transistor Q3, and turning on and off the NPN transistor Q1 and PNP transistor Q4. It is controlled by a logic circuit A such as a microcomputer so as to do so. Turn off NPN type transistor Q1 and PNP type transistor Q4,
PNP type transistor Q2, NPN type transistor Q3
If the logic circuit A such as a microcomputer is used to perform PWM control by turning ON and OFF, PWM control during reverse rotation is possible. Resistors R1, R2, R3, and R4 are transistors Q
1. Even when Q2, Q3, and Q4 are all OFF, the intermediate voltage between the voltages across the motor M is the pull amplifier voltage Vcc.
This is to make it 1/2 of that. FIG. 5 shows another embodiment for keeping the intermediate voltage between the voltages across the load constant. The switch circuit is connected only to one end of the load, and the other end is connected to a current control circuit E that is controlled by the difference in the intermediate voltage between the voltages at both ends of the load coming from the intermediate voltage detection circuit P and comparison circuit F. is input. Although this method is more complicated than the embodiment shown in FIG. 1, it responds well to the slight transient voltage of the motor M, and can further reduce the generation of electromagnetic noise.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の電磁雑音の発生を低下させ
る電力制御回路は、負荷の両端の電圧の中間電圧が一定
になるように構成されているので、トランジスタの発熱
も少なくなるため回路自体をコンパクトにすることがで
きるとともに電M1雑音の発生を低下させることが可能
になり、EMI規制の厳しい家庭用や自動車用のPWM
制御方式の電力制御回路に応用できる利点がある。
As explained above, the power control circuit of the present invention that reduces the generation of electromagnetic noise is configured so that the intermediate voltage between the voltages at both ends of the load is constant, so the heat generation of the transistor is reduced, so the circuit itself is It is possible to make it compact and reduce the generation of electric M1 noise, making it suitable for home and automobile PWM with strict EMI regulations.
It has the advantage of being applicable to power control circuits using control methods.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第3図は本発明の実施例を示す回路図、第
4図は負荷の両端の電圧と中間電圧を示す折れ線図、第
5図は負荷の中間電圧を一定にするための他の方法を示
すブロック図である。 A〜論理回路、  B〜インバータ、  CI、C2〜
コンデンサ、  M〜モータ、  R1,R2゜R3,
R4〜抵抗、 Ql、Q3〜NPN型トランジスタ、 
Q2.Q4〜PNP型トランジスタ、DI、02〜電線
Figures 1 to 3 are circuit diagrams showing embodiments of the present invention, Figure 4 is a line diagram showing the voltage at both ends of the load and the intermediate voltage, and Figure 5 is a circuit diagram showing the voltage across the load and the intermediate voltage. FIG. 2 is a block diagram illustrating a method. A~Logic circuit, B~Inverter, CI, C2~
Capacitor, M~motor, R1, R2゜R3,
R4~resistance, Ql, Q3~NPN type transistor,
Q2. Q4~PNP type transistor, DI, 02~Electric wire.

Claims (1)

【特許請求の範囲】[Claims] モータあるいは電球等の負荷に供給する電力をスイッチ
素子のON、OFFの時間比で電力を制御する回路であ
って、前記負荷の両端の電圧の中間電圧が一定になるよ
うにしたことを特徴とする電磁雑音の発生を低下させる
電力制御回路。
A circuit that controls the power supplied to a load such as a motor or a light bulb based on the ON/OFF time ratio of a switch element, characterized in that the intermediate voltage between the voltages at both ends of the load is constant. A power control circuit that reduces the generation of electromagnetic noise.
JP9732688A 1988-04-20 1988-04-20 Power control circuit for lowering generation of electromagnetic noise Pending JPH01268326A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9732688A JPH01268326A (en) 1988-04-20 1988-04-20 Power control circuit for lowering generation of electromagnetic noise

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9732688A JPH01268326A (en) 1988-04-20 1988-04-20 Power control circuit for lowering generation of electromagnetic noise

Publications (1)

Publication Number Publication Date
JPH01268326A true JPH01268326A (en) 1989-10-26

Family

ID=14189363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9732688A Pending JPH01268326A (en) 1988-04-20 1988-04-20 Power control circuit for lowering generation of electromagnetic noise

Country Status (1)

Country Link
JP (1) JPH01268326A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108258900A (en) * 2016-12-28 2018-07-06 上海甄平半导体有限公司 A kind of DC to DC converter and power supply modulator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108258900A (en) * 2016-12-28 2018-07-06 上海甄平半导体有限公司 A kind of DC to DC converter and power supply modulator
CN108258900B (en) * 2016-12-28 2019-12-27 上海甄平半导体有限公司 DC-DC converter and power modulator

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