JPH01264011A - Synchronous oscillation circuit - Google Patents

Abstract

PURPOSE:To keep the peak value constant even when a synchronizing frequency is changed and to make the operation stable by detecting a DC component in an oscillated output, and applying control so that the component is made constant. CONSTITUTION:A low pass filter consists of a resistor 24 and a capacitor 27 and the DC component in the oscillation output at a contact point 12 is extracted via the low pass filter. The DC component obtained in this way is fed to an error amplifier 30, where feedback control is applied so that the DC component is made equal to a reference voltage EREF. If a voltage across the capacitor 25(CF) is going to decrease, the output of the error amplifier 30 is lowered by the synchronizing pulse, a collector current of a transistor(TR) 20 is increased, the charging current of a capacitor 10(Ct) is increased, the slope of the oscillation waveform is made steep and only the frequency is kept higher while the peak value is made nearly constant. Thus, even if the synchronizing frequency is largely changed, the peak value is kept constant.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a sawtooth wave or triangular wave oscillation circuit that utilizes charging and discharging in a circuit consisting of a resistor and a capacitor, and particularly to a synchronous oscillation circuit that operates in synchronization with an external synchronization pulse. Regarding circuits.

rPrior art J Synchronous type 61 used in pulse width modulation (PWM) circuits
An example of an oscillator is shown in FIG.

In FIG. 3, 1 is a comparator, 2, 3.4 is a transistor, 5 to 9 are resistors, and to and ti are capacitors. Here, a synchronization pulse is supplied to transistor 2 via capacitor 11. The collector of the transistor capacitor 2 is connected to a connection point 12 between the pixel elements 6 and 10 in a time constant circuit formed by series connection of a resistor 6 having a resistance value RA and a capacitor 0 having an L-shaped cylinder Ct.

A reference voltage VREF' is applied to this time constant circuit, and a CR oscillation circuit is constituted by this time constant circuit, comparator 1, transistors 3 and 4, and resistors 7 and 8.9.

The capacitor 10 in the time constant circuit is the transistor 2
The charging and discharging of the battery is controlled according to the output from the battery. Therefore, when the synchronizing pulse does not come in, that is, during free running, the oscillation output taken out from the contact point 12 is as shown in Fig. 4 (A
). Here, when the resistance values of resistors 7 and 8 are R3 and R2, the maximum amplitude of the oscillation output is as follows. EDC indicates the magnitude of the direct current component.

On the other hand, during synchronization when a synchronization pulse enters, oscillation is regulated depending on whether the synchronization pulse is on or off, so the amplitude of the oscillation output in this case is smaller than the maximum amplitude, and therefore the DC component E 'DC is also smaller than EDc.

That is, when there is no synchronization pulse, the oscillation frequency is determined by Rt, Ct, R+, and R2, as shown in FIG. If the frequency is considerably higher than the free-running frequency, the peak value of the oscillation waveform will also become small, as shown in FIG. 1(B).

[Problems to be Solved by the Invention] In a PWM circuit, if the oscillation waveform changes significantly, the circuit gain also changes, which is not favorable for operation.

Therefore, conventionally, when the synchronous frequency changes, the resistance value nt and the capacitance value ct have been changed to cope with the change.

In addition, conventional methods have had the problem that they cannot be used when the synchronization frequency changes continuously.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a synchronous oscillation circuit that is appropriately configured and arranged so that the output peak value of the oscillator remains approximately constant even if the synchronous frequency changes significantly.

[Means for Solving the Problem] In order to achieve such an object, the present invention provides an oscillation means and a synchronization means that receives a synchronization pulse and controls the oscillation means to operate in synchronization with the synchronization pulse. It is characterized by comprising: means for detecting the DC component of the oscillation output output from the oscillation means; and means for controlling the oscillation output so as to keep the value of the DC component constant.

[Function] In the present invention, when the peak value of the oscillation waveform becomes smaller, the DC component also becomes smaller. By detecting the DC component and controlling to keep the value constant, synchronization is achieved. To keep the peak value constant even when the frequency changes significantly.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings.

An embodiment of the present invention is shown in FIG.

In FIG. 1, circuit parts similar to those in the conventional example shown in FIG. 3 are given the same reference numerals, and their explanation will be omitted here.

In FIG. 1, the collector of a transistor 20 is connected to a connection point 12. Connect the emitter of this transistor to resistor 2
1 to the vncr line, and its base is connected to the VRI:P line via a resistor 22. The output of an error amplifier 30 is supplied to this base via a resistor 23. The connection point 12 is connected to the positive input terminal of the error amplifier 30 via a resistor 24 having a resistance value R1. This positive side input terminal is connected to a common potential via a capacitor 25 having a capacitance of CP. A reference voltage EREF is applied from the battery 26 to the negative input terminal of the error amplifier 30.

Here, a low-pass filter is configured by the resistor 24 and the capacitor 27, and the DC component of the oscillation output at the connection point 12 is extracted through the low-pass filter.
Therefore, the new circular wave number of this low-pass filter is
It shall be set to a value sufficiently lower than the oscillation frequency.

The DC component thus obtained is supplied to the error amplifier 3o. In this error amplifier, this DC component is the reference voltage ER
Feedback control is performed so that cr is equal to cr.

During free running when no synchronous pulse comes in, the oscillation output at the connection point 12 is the same as the Ct waveform in FIG. 4 (8) as shown in FIG. 2 (8), which is the same as the Ct waveform during free running in the conventional example. . The DC component is 1. Let's call it oco.

On the other hand, when a synchronization pulse comes in, ie, during synchronization, the circuit shown in FIG. 1 operates as follows. That is, when the voltage of the capacitor 25 (Cr) tends to decrease due to the synchronization pulse, the output of the error amplifier 30 decreases. Then, the collector current of the transistor 20 increases, the charging current of the capacitor to(Ct) increases, the slope of the oscillation waveform becomes steeper, and the peak value becomes as shown in FIG. 2 (8). It remains almost the same as (A), only the frequency increases.

In this way, in this embodiment, even if the synchronization frequency changes significantly, the peak value follows it and is kept almost constant. As a result, the DC component EDCI during synchronization becomes approximately equal to the DC component EDCO during free running. That is, 1: It E 1 c'[: D(I"E D CO
It is.

[Effects of the Invention] As is clear from the above, according to the present invention, the DC component in the oscillation output is detected and the value is controlled to be constant, so even if the synchronous frequency changes, the High prices also remain almost constant.

Therefore, when the present invention is applied to a PWM circuit, the circuit gain etc. become constant and stable operation can be realized. In particular, in recent years, the switching power supply circuits of television displays are often synchronized to prevent noise, and the frequency also varies greatly depending on the model of personal computer displays. In such cases, the effects of the present invention are extremely large. That is, the present invention is particularly effective when applied to an oscillator of a pulse width modulation type switching power supply circuit.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 (8)
, (8) is a signal waveform diagram for explaining the operation of the embodiment of the present invention shown in the first figure, FIG. 3 is a circuit diagram showing a conventional example, and FIG. 4 (8), ([1) is a conventional example shown in the third figure. FIG. 2 is a signal waveform diagram for explaining the operation of FIG. 1... Comparator, 2.3.4... Transistor, 5-9... Resistor, 10.11... Capacitor, 12... Connection point, 20... Transistor, 21-24... - Resistor, 25... Capacitor, 26... Base wall voltage battery, 30... Error amplifier.

Claims (1)

[Scope of Claims] 1) Oscillation means; Synchronization means that receives a synchronization pulse and controls the oscillation means to operate in synchronization with the synchronization pulse; and a DC component of the oscillation output output from the oscillation means. A synchronous oscillation circuit comprising: means for detecting the DC component; and means for controlling the oscillation output so as to keep the value of the DC component constant.