JPH01262635A - Method of marking semiconductor chip - Google Patents

Method of marking semiconductor chip

Info

Publication number
JPH01262635A
JPH01262635A JP9255288A JP9255288A JPH01262635A JP H01262635 A JPH01262635 A JP H01262635A JP 9255288 A JP9255288 A JP 9255288A JP 9255288 A JP9255288 A JP 9255288A JP H01262635 A JPH01262635 A JP H01262635A
Authority
JP
Japan
Prior art keywords
semiconductor chip
defective
semiconductor
discharge
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9255288A
Other languages
Japanese (ja)
Inventor
Naotake Tatsumi
尚毅 辰巳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP9255288A priority Critical patent/JPH01262635A/en
Publication of JPH01262635A publication Critical patent/JPH01262635A/en
Pending legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To mark only a semiconductor chip decided to be a defective positively by marking a blackened mark on the surface of the defective semiconductor chip by discharge between a discharge needle and a semiconductor wafer. CONSTITUTION:When semiconductor chips 3 formed to a semiconductor wafer 2 are electrically inspected, the electrode needles 4 of a probing card 1 are abutted against the specified electrode layers of the semiconductor chips 3 and electric characteristics are inspected. When the electric characteristics of the semiconductor chip 3 are normal at that time, the next semiconductor chip 3 is inspected similarly. When the electric characteristics of the semiconductor chip 2 are decided to be defective ones, high voltage is applied in a clearance L between the tip of a discharge needle 5 fitted to the probing card 1 and the defective semiconductor chip 3, the surface of the chip 2 is burnt and scorched by heat generated by discharge, and a blackened mark M is marked. Accordingly, the semiconductor chip decided to be defective can be identified positively.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体ウェハに形成された半導体チップの電
気的特性検査で不良と判断された半導体チップへのマー
キング方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for marking semiconductor chips formed on a semiconductor wafer that are determined to be defective in an electrical property test.

[従来技術] 従来より、電気的特性検査によって不良と判断された半
導体チップにマーキングを施す方法としては、次のよう
な3種類の方法が知られている。
[Prior Art] Conventionally, the following three types of methods have been known as methods for marking semiconductor chips determined to be defective by electrical property testing.

第1の方法は、第2図に示すように、例えば、赤色の液
状インク等のマーキング液100をマーカ101の先端
より吐出し、不良チップ102の表面に赤色のマークを
形成して、正常な半導体チップと区別するものである。
As shown in FIG. 2, the first method is to eject a marking liquid 100, such as red liquid ink, from the tip of a marker 101 to form a red mark on the surface of a defective chip 102, thereby making it normal. This is to distinguish it from a semiconductor chip.

第2の方法は、半導体チップの表面に先端が硬質化加工
された針状のもの(図示せず)で引っ欠き傷を形成し、
正常な半導体チップと区別するものである。
The second method is to form scratches on the surface of the semiconductor chip with a needle-like object (not shown) with a hardened tip.
This distinguishes it from normal semiconductor chips.

第3の方法は、半導体チップ表面にレーザビームを照射
し、その際発生する熱によって該半導体チップの表面の
一部を溶融又は、変色させ、正常な半導体チップと区別
するものである。
The third method is to irradiate the surface of a semiconductor chip with a laser beam, and the heat generated during this process melts or discolors a portion of the surface of the semiconductor chip, thereby distinguishing it from a normal semiconductor chip.

[発明が解決しようとする課題] しかしながら上記第1の赤色のマーキング液を吐出する
方法では、11角以下の小さい半導体チップにマーキン
グを施す場合に、マーカ10117)先端より勢いよく
押し出されたマーキング液100が、不良チップ102
の表面に付着するだけでなく、反動で跳ね返り、場合に
よっては隣接する正常な半導体チップにまで飛び敗って
付着してしまうという問題がある。これでは、正常な半
導体チップが誤って不良と判断されるので問題となって
いる。また、第2の方法のように表面に引っ欠き傷を形
成する場合でも、小さい半導体チップでは、この引っ欠
き傷を確認し難いといった問題があり、不良の半導体チ
ップとの識別が難しくなっている。さらに、第3の方法
のようにレーザビームを照射すると、半導体チップ表面
の溶融時に蒸気が発生し、蒸気の急激な膨張により、溶
融した半導体チップ材料が周囲の正常な半導体チップに
飛び敗り、本来なら良品となるべき半導体チップを不良
品にするといった問題が生じており、しかもその上に、
いずれも不良と判断された半導体チップと、正常な半導
体チップと区別する方法としては満足のいくものでない
[Problems to be Solved by the Invention] However, in the first method of discharging the red marking liquid, when marking a small semiconductor chip of 11 sides or less, the marking liquid is forcefully pushed out from the tip of the marker 10117). 100 is a defective chip 102
There is a problem in that not only do they adhere to the surface of the chip, but they also rebound due to recoil, and in some cases, they even fly off and adhere to adjacent normal semiconductor chips. This poses a problem because a normal semiconductor chip is erroneously determined to be defective. Furthermore, even when forming scratches on the surface as in the second method, there is a problem in that it is difficult to see the scratches on small semiconductor chips, making it difficult to distinguish them from defective semiconductor chips. . Furthermore, when a laser beam is irradiated as in the third method, steam is generated when the surface of the semiconductor chip is melted, and the rapid expansion of the steam causes the melted semiconductor chip material to fly over the surrounding normal semiconductor chips. Problems have arisen in which semiconductor chips, which should normally be good, are turned into defective ones, and on top of that,
None of these methods is satisfactory as a method for distinguishing between a semiconductor chip determined to be defective and a normal semiconductor chip.

し課題を解決するための手段] 上記課題を解決するためになされた本発明は、半導体ウ
ェハに形成された半導体チップの表面に放電針の先端を
近接させ、この放電針と半導体チップとの間に高電圧を
印加して両者間に放電を生じさせることによりマーキン
グを行なうことを特徴とする。
Means for Solving the Problems] The present invention, which has been made to solve the above problems, brings the tip of a discharge needle close to the surface of a semiconductor chip formed on a semiconductor wafer, and creates a gap between the discharge needle and the semiconductor chip. It is characterized in that marking is performed by applying a high voltage to and causing a discharge between the two.

[発明の作用] 上記のように半導体チップ表面に放電針の先端を近接さ
せ、この放電針と半導体ウェハとの間に高電圧を印加し
て両者間に放電を生じさせると、放電によって半導体チ
ップの表面が焼は焦げて黒ずんだマーキングがなされる
ようになる。
[Operation of the invention] As described above, when the tip of the discharge needle is brought close to the surface of the semiconductor chip and a high voltage is applied between the discharge needle and the semiconductor wafer to generate a discharge between them, the semiconductor chip is The surface becomes charred and has dark markings.

[実施例] 以下、図面を参照して本発明の一実施例を説明する。[Example] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例にかかる半導体チップのマー
キング方法に用いられる検査装置を示す概略図である0
図において、1は半導体ウェハ2に形成された半導体チ
ップ3の電気的特性検査を行なうブローフ゛カードであ
り、8亥ブローフ゛カード1に設けらた電極針4を半導
体チップ3の所定の電極層に接触させて電気的特性検査
を行なうものである。
FIG. 1 is a schematic diagram showing an inspection device used in a semiconductor chip marking method according to an embodiment of the present invention.
In the figure, 1 is a blow card for testing the electrical characteristics of a semiconductor chip 3 formed on a semiconductor wafer 2; This is used to test electrical characteristics.

5は上記プローブカード1に取り付けられた放電針であ
り、プローブカード1の電極針4が半導体チップ2の電
極層に当接されたとき、放電針5の先端が半導体チップ
3表面のほぼ中央に位置され、両者間が近接状態となっ
て僅かな間隙りが形成されている0本発明は、上記放電
針5と半導体ウェハ2が支持された支持基板6との間に
外部に設けられた電源7によって高電圧を印加し、不良
と判断された半導体チップ3との間に放電を起こすこと
により半導体チップの表面を焼き焦がせて黒ずんだマー
クMをマーキングするものである。
Reference numeral 5 denotes a discharge needle attached to the probe card 1, and when the electrode needle 4 of the probe card 1 comes into contact with the electrode layer of the semiconductor chip 2, the tip of the discharge needle 5 is located approximately at the center of the surface of the semiconductor chip 3. The present invention provides an external power source between the discharge needle 5 and the support substrate 6 on which the semiconductor wafer 2 is supported. 7, a high voltage is applied and a discharge is caused between the semiconductor chip 3 determined to be defective, thereby burning the surface of the semiconductor chip and marking a dark mark M.

即ち、半導体ウェハ2に形成された半導体チップ3の電
気的特性検査を行なう場合、まずプローブカード1の電
極針4を半導体チップ3の所定の電極層に当接して電気
的特性を検査する。このとき半導体チップ3の電気的特
性が正常であれば、次の半導体チップ3が上記同様に検
査される。
That is, when testing the electrical characteristics of the semiconductor chip 3 formed on the semiconductor wafer 2, first the electrode needles 4 of the probe card 1 are brought into contact with a predetermined electrode layer of the semiconductor chip 3 to test the electrical characteristics. At this time, if the electrical characteristics of the semiconductor chip 3 are normal, the next semiconductor chip 3 is inspected in the same manner as described above.

そして、半導体チップ2の電気的特性が不良と判断され
ると、上記プローブカード1に設けられた放電針5の先
端と該不良半導体チップ3との隙間りに高電圧を印加し
、放電によって発生する熱で該半導体チップ2の表面を
焼き焦がし、黒ずんだマークMをマーキングする。
When the electrical characteristics of the semiconductor chip 2 are determined to be defective, a high voltage is applied to the gap between the tip of the discharge needle 5 provided on the probe card 1 and the defective semiconductor chip 3, and a discharge occurs. The heat generated burns the surface of the semiconductor chip 2 and marks a dark mark M.

このように、順次半導体チップの電気的特性を検査し、
不良と判断するとマークMをマーキングし、次の工程に
おいて正常な半4体チップと区別する。
In this way, we sequentially inspect the electrical characteristics of semiconductor chips,
If it is determined to be defective, it is marked with a mark M to distinguish it from a normal half-quad chip in the next process.

ここで、上記放電針5と不良な半導体チップ2との間に
印加する電圧は、約4kvで数10〜数百ミリセカンド
程度の時間印加でよく、半導体チップ2がIN角以下の
小さいものでも、印加する電圧を調整すればマークMの
大きさの調整が容易に行えるので、最も識別し易い大き
さのマークMを形成できるものである。また、放電によ
って蒸気等が発生して飛散することもなく、さらに放電
針5の先端が検査される半導体チップ3と近接して設け
られるので、隣接する正常な半導体チップ3との間に放
電され、この正常な半導体チップ3がマーキングされる
心配はない。
Here, the voltage applied between the discharge needle 5 and the defective semiconductor chip 2 may be approximately 4 kV for a period of several tens to several hundred milliseconds, and even if the semiconductor chip 2 is small with an angle of less than the IN angle, Since the size of the mark M can be easily adjusted by adjusting the applied voltage, the mark M can be formed in a size that is most easily identified. Further, since the discharge needle 5 does not generate and scatter vapor, etc., and since the tip of the discharge needle 5 is placed close to the semiconductor chip 3 to be inspected, the discharge needle 5 is not disposed between it and the adjacent normal semiconductor chip 3. , there is no fear that this normal semiconductor chip 3 will be marked.

さらに、上記実施例では放電針5の先端をプローブカー
ド3のほぼ中央付近に置いて設けであるが、これに限ら
ずプローブカード3と分離させて別途設け、不良と判断
された半導体チップ2に上記放電針5の先端を近接させ
てから、高電圧を印加し、上記同様にマーキングを行な
ってもよい。
Further, in the above embodiment, the tip of the discharge needle 5 is placed near the center of the probe card 3, but the tip of the discharge needle 5 is not limited to this. Marking may be performed in the same manner as described above by applying a high voltage after bringing the tips of the discharge needles 5 close to each other.

[発明の効果] 以上の説明から明かなように、本発明の半導体チップの
マーキング方法では、放電針と半導体ウェハとの間の放
電によって不良の半導体チップの表面に黒ずんだマーク
がマーキングされるので、正常な半導体チップととの区
別が容易となる。また、放電針の先端と半導体チップと
の間隔が近接しているので、隣接する半導体チップとの
間に放電が起こりこの半導体チップにマーキングされる
という心配はない。従って不良と判断された半導体チッ
プにのみ確実にマーキングできるという効果がある。
[Effects of the Invention] As is clear from the above description, in the semiconductor chip marking method of the present invention, a dark mark is marked on the surface of a defective semiconductor chip by the discharge between the discharge needle and the semiconductor wafer. , it becomes easy to distinguish between normal semiconductor chips and normal semiconductor chips. Furthermore, since the distance between the tip of the discharge needle and the semiconductor chip is close, there is no fear that discharge will occur between adjacent semiconductor chips and the semiconductor chip will be marked. Therefore, it is possible to reliably mark only semiconductor chips determined to be defective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例にかかる半導体チップのマー
キング方法に使用される装置の概略図、第2図は従来の
マーキング方法の一例を示す概略図である。 2・・・半導体ウェハ 3・・・半導体チップ 5・・・放電針。
FIG. 1 is a schematic diagram of an apparatus used in a semiconductor chip marking method according to an embodiment of the present invention, and FIG. 2 is a schematic diagram showing an example of a conventional marking method. 2... Semiconductor wafer 3... Semiconductor chip 5... Discharge needle.

Claims (1)

【特許請求の範囲】[Claims] (1)半導体ウェハに形成された半導体チップの表面に
放電針の先端を近接させ、この放電針と半導体チップと
の間に高電圧を印加して両者間に放電を生じさせること
によりマーキングを行なうことを特徴とする半導体チッ
プのマーキング方法。
(1) Marking is performed by bringing the tip of a discharge needle close to the surface of a semiconductor chip formed on a semiconductor wafer and applying a high voltage between the discharge needle and the semiconductor chip to generate a discharge between them. A semiconductor chip marking method characterized by:
JP9255288A 1988-04-13 1988-04-13 Method of marking semiconductor chip Pending JPH01262635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9255288A JPH01262635A (en) 1988-04-13 1988-04-13 Method of marking semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9255288A JPH01262635A (en) 1988-04-13 1988-04-13 Method of marking semiconductor chip

Publications (1)

Publication Number Publication Date
JPH01262635A true JPH01262635A (en) 1989-10-19

Family

ID=14057565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9255288A Pending JPH01262635A (en) 1988-04-13 1988-04-13 Method of marking semiconductor chip

Country Status (1)

Country Link
JP (1) JPH01262635A (en)

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