JPH01261047A - Ac coupling reception circuit - Google Patents

Abstract

PURPOSE:To obtain a simple and inexpensive AC coupling reception circuit by adopting a diode for a circuit to prevent the charging of a capacitor subjected to AC coupling due to a pulse. CONSTITUTION:A bus +2, a bus -3 being signal transmission lines and a comparator 1 are coupled through capacitors C1, C2 for AC coupling and a diode D having a forward voltage drop Vf from the transmission line bus -3 to the bus +2 is connected between both signals toward the comparator 1 from the capacitors C1, C2. Then the bus -3 and a pullup power supply Vcc are connected via a resistor R1 and the bus +2 and ground are connected via a resistor R2 to prevent charging to the capacitors C1, C2 of the AC coupling. Thus, the circuit is constituted inexpensively with a few number of components.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a receiving circuit in a communication system using a balanced transmission line.

[Conventional technology]

Data communication systems, especially data communication systems in automobiles, require particularly high reliability because human lives may be at stake. Even in bus-type communication systems using balanced transmission lines, even if an abnormal situation occurs where one signal line of the transmission line is fixed at a certain potential due to some kind of failure, the signal on the other signal line A receiving circuit that can receive the signals is required. As such a receiving circuit, a so-called AC coupling system is known in which a transmission line or a circuit connected thereto and a comparator or a circuit connected thereto are coupled via individual signal lines via capacitors. When the AC coupling method is adopted, the DC component of the entire waveform fluctuates depending on the duty (DuLy) ratio of the pulse waveform of the signal, so some kind of countermeasure circuit is required to prevent the DC component from fluctuating before inputting the pulse waveform to the comparator. is necessary. FIG. 7 shows a reported example of an AC coupling receiving circuit that implements this countermeasure. In this circuit, signal voltages from two signal lines output through AC coupling are input to a differential amplifier, and two
The differential component of the signal voltage from the main signal line is output, and the output is biased with a diode through another AC coupling, thereby eliminating the electric charge charged in the capacitor of the AC coupling.

[Problem to be solved by the invention]

However, the conventional circuit described above requires a differential amplifier after passing through the AC coupling, which requires an expensive high speed operational amplifier. Furthermore, the overall number of components increases, resulting in major problems in terms of cost and space.An object of the present invention is to construct the above-described high frequency chain receiving circuit at a lower cost and with a smaller number of components.

[Means to solve the problem]

The present invention has been made in order to solve the above-mentioned problems.The present invention has been made in order to solve the above-mentioned problems. In a receiving circuit in a communication system using a type transmission line, a nonlinear element or nonlinear circuit group such as a diode is connected between both signal lines on the side of the comparator or the circuit connected to it rather than the capacitor for the purpose of generating a constant voltage. It is characterized by this.

Hereinafter, the present invention will be explained in detail based on FIG. 1 and FIG. 6. Figure 1 shows the signal transmission lines bus ■2 and bus e.
3 and comparator 1 are coupled via capacitors C1 and C2 for AC coupling, and capacitor CL
A diode D having a voltage drop Vf in the forward direction from the transmission line bus e3 to the bus e2 is connected between the signals on both sides of the comparator l side than C2, and a diode D is connected between the bus e3 and the pull-up power supply V.
This is an embodiment of a receiving circuit according to the present invention, in which the bus e2 and the ground side are connected to each other via a resistor R2, and the bus e2 is connected to the ground side via a resistor R2. When there is no pulse input to bus Φ and bus e, resistor R1 and diode D are connected to power supply Vcc.
, a current flows through the resistor R2, and a voltage approximately equal to the forward voltage vf of the diode D is generated between the terminals cd. On the other hand, when a pulse waveform (positive pulse waveform on bus Φ and negative pulse waveform on bus e) is applied to the bus, the voltage (Va
+Vb-Vf) appears across diode D as a reverse voltage. When the pulse waveform ends, the diode returns to its original state, ie, the state where the forward voltage Vf is applied to the diode. By the way, when the above pulse waveform is applied to the bus, the diode D is in an OFF state where no current flows.For example, in the bus e, the time constant ClXR2 causes the capacitor to lower the voltage at the cathode of the diode D. The capacitor C1 is charged, but the amount charged here is immediately discharged through the diode D when the pulse waveform ends, so even if the pulse waveform is input continuously, the capacitor C1 is charged.
1. The DC fluctuation of C2 is corrected for each pulse so that no fluctuation occurs. For example, if the comparator 1 is connected directly across the diode D, when the sum of both pulse waveforms exceeds the forward voltage Vf of the diode D, This becomes a receiving circuit in which the output of the comparator is inverted. Figure 12 (a) shows bus e and bus e.
Fig. 2(b) shows a pulse waveform diagram at terminal ab of
shows a pulse waveform diagram at terminal cd, and Fig. 2(C)
shows the pulse waveform diagram of terminal e, that is, the output waveform diagram of comparator l. If the potential of one of the zero-order buses is fixed at a predetermined potential, for example, the pulse waveform of bus e will be fixed at a constant potential. If such an abnormal situation were to occur,
The waveform diagram at terminal ab of bus e and bus e is shown in 3rd (a).
At terminal cd, the waveform diagram will be as shown in Figure 3 (b), and the potentials at both terminals cd will always cross if Va>Vf, so if this is input to comparator l, it will always be output at the pulse waveform. is inverted, and as a result, a desired pulse waveform e as shown in FIG. 3(C) can be output from the comparator l.

FIG. 4 is an example of a receiving circuit using a Zener diode ZD instead of the diode D in FIG. When the Zener diode ZD is not used, the waveform diagram at terminal ab of bus Φ and bus e is rounded as shown in Figure 5(a), and the waveform at terminal cd is as shown in Figure 5(b). The waveform diagram at terminal e is as shown in the same diagram (C), but when a Zener diode ZD is used, the voltage obtained by subtracting the forward voltage Vf of the Zener diode ZD from the sum of the peak values Va and vb of both pulses (Va + Vb - Vf )but,
When the Zener voltage v2 of the Zener diode becomes larger, the waveform at terminal ab shown in FIG. 6(a) is clipped in amplitude at terminal cd, resulting in a waveform as shown in FIG. 6(a). As a result, Zener diode ZD is connected to capacitors CI and C2.
The clipped voltage is charged, and when the pulse waveform ends, it falls in the same way as without the Zener diode ZD, so if the input pulse waveform is rounded as shown in Figure 5 (a), the crossing point is It gets faster. Figure 7 (a) (b) further shows how quickly the crossing point becomes.
(C) This will be explained in more detail in (d). 7(a) shows the potential difference between terminals cd in the case of the embodiment shown in FIG. 1 using a normal diode D, and FIG. 7(b) shows the output at terminal e of the embodiment shown in FIG. voltage i.e. comparator l
shows the output voltage of The output voltage at terminal e is inverted at the point where the potential difference between terminals cd is O.

Figure 7(C) shows the fourth diode using Zener diode ZD.
The potential difference between terminals c and d in the case of the embodiment shown in the figure is shown. I(d) indicates the output voltage at terminal e of the embodiment shown in FIG. 4, that is, the output voltage of comparator 1.

In the rising part of the potential difference between terminals CD, the inversion position of the output voltage of the comparator does not change, but in the falling part, the potential between terminals CD only shifts, and both fall at the same time and with the same waveform. When diode ZD is used, the potential difference between terminals CD is cut to Zener voltage ■2, so naturally the voltage will fall from a lower voltage than when Zener diode ZD is not used, and the reversal position of the comparator output voltage will be earlier. Become. Therefore, the pulse width output from the comparator is smaller than when the Zener diode ZD is not used, as shown in FIG. 6(C), enabling a higher transmission speed.

〔Effect of the invention〕

As explained above, the AC-coupled receiver circuit of the present invention is smaller and simpler than the conventional one because the AC-coupled capacitor has a circuit that basically uses a diode to prevent the capacitor from being charged by pulses. It was possible to create an inexpensive AC coupling receiving circuit. Furthermore, when a Zener diode is used instead of a diode, it has the effect of reducing the delay of a distorted transmission waveform, making it possible to achieve a higher transmission speed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an AC coupling receiving circuit of the present invention,
2 and 3 are explanatory diagrams showing pulse waveforms at each terminal, FIG. 4 is an AC coupling receiving circuit showing another embodiment of the present invention, and FIGS. 5 and 6 are explanatory diagrams showing pulse waveforms at each terminal. An explanatory diagram showing the pulse waveform, FIG. 7 is an explanatory diagram for explaining the reason why the output pulse width of the comparator is narrow,
FIG. 8 is a circuit diagram of a conventional AC coupling receiving circuit. 1 - Comparator, 2 - Bus 6B, 3 - Bus e, D - Diode, R1, R2 - Resistor, C1, C
2 ~ Capacitor, ZD ~ Zener diode. Patent applicant Furukawa Electric Co., Ltd. Figure 2
Figure 3 Figure 4 (Zener diode not used) (Zener diode used) Figure 5 #A6 Figure 7 Figure 8

Claims (1)

[Claims] In a receiving circuit in a communication system using a balanced transmission line, in which a transmission line or a circuit connected to it, and a comparator or a circuit connected to it are coupled by individual signal lines via capacitors,
An AC coupling receiving circuit characterized in that a nonlinear element such as a diode or a group of nonlinear circuits is connected between both signal lines on the side of a comparator or a circuit connected thereto rather than a capacitor.