JPH0126100B2 - - Google Patents

Info

Publication number
JPH0126100B2
JPH0126100B2 JP58126528A JP12652883A JPH0126100B2 JP H0126100 B2 JPH0126100 B2 JP H0126100B2 JP 58126528 A JP58126528 A JP 58126528A JP 12652883 A JP12652883 A JP 12652883A JP H0126100 B2 JPH0126100 B2 JP H0126100B2
Authority
JP
Japan
Prior art keywords
permutation
data
order
input data
memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58126528A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6019254A (ja
Inventor
Yasukazu Nishino
Hiroshi Sasanuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP58126528A priority Critical patent/JPS6019254A/ja
Publication of JPS6019254A publication Critical patent/JPS6019254A/ja
Publication of JPH0126100B2 publication Critical patent/JPH0126100B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Input (AREA)
  • Image Processing (AREA)
  • Memory System (AREA)
JP58126528A 1983-07-12 1983-07-12 デ−タ記憶装置 Granted JPS6019254A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58126528A JPS6019254A (ja) 1983-07-12 1983-07-12 デ−タ記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58126528A JPS6019254A (ja) 1983-07-12 1983-07-12 デ−タ記憶装置

Publications (2)

Publication Number Publication Date
JPS6019254A JPS6019254A (ja) 1985-01-31
JPH0126100B2 true JPH0126100B2 (enrdf_load_stackoverflow) 1989-05-22

Family

ID=14937430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58126528A Granted JPS6019254A (ja) 1983-07-12 1983-07-12 デ−タ記憶装置

Country Status (1)

Country Link
JP (1) JPS6019254A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62145382A (ja) * 1985-12-20 1987-06-29 Fujitsu Ltd イメ−ジデ−タ出力装置
JP2669311B2 (ja) * 1993-12-02 1997-10-27 日本電気株式会社 ビットマップファイルアクセスシステム

Also Published As

Publication number Publication date
JPS6019254A (ja) 1985-01-31

Similar Documents

Publication Publication Date Title
DE68923763T2 (de) Anordnung von Datenzellen und Aufbau von Neuronennetzen, die eine solche Anordnung nutzen.
DE3788032T2 (de) Struktur zum Wiederordnen von Bits auf dem Chip.
DE69433124T2 (de) Befehlsspeicher mit assoziativem Kreuzschienenschalter
EP0333207A3 (en) Mask rom with spare memory cells
DE31840T1 (de) Speichersystem.
JPS61261773A (ja) 換字−転置法によるエンコ−ダ
DE2230103A1 (de) Adressiereinrichtung fuer einen speicher
EP0341897A3 (en) Content addressable memory array architecture
DE2163342A1 (de) Hierarchische binäre Speichervorrichtung
DE3618136C2 (enrdf_load_stackoverflow)
DE2415600C2 (enrdf_load_stackoverflow)
DE68925840T2 (de) Speicherzugriffssteuerungsvorrichtung, die aus einer verringerten Anzahl von LSI-Schaltungen bestehen kann
JPH0126100B2 (enrdf_load_stackoverflow)
EP0342875A3 (en) Partial random access memory
JPH0126101B2 (enrdf_load_stackoverflow)
DE69031947T2 (de) Datenverarbeitungssystem basierend auf einem (N,K)-Symbolkode und mit Symbolfehler-Korrigierbarkeit und mehrfacher Fehlerreparierbarkeit
JPS593790A (ja) ダイナミツクメモリ素子を用いた記憶装置
DE2525287A1 (de) Assoziativspeicher
DE2605066A1 (de) Kanalzuordnungsschaltung zur herstellung einer zeitvielfach-breitbandverbindung
DE2033648C3 (de) Steuerverfahren und Anordnung zur Durchschaltung von PCM-Kanälen
DE2017879B2 (de) Speicheranordnung mit freiem Zugriff
DE3903066A1 (de) Datenverarbeitungssystem mit cache-speicher
DE2511402A1 (de) Einzelwand-magnetdomaenen-speicher
DE69428624T2 (de) Vorrichtung und Verfahren zur Entschachtelung
JPS5654697A (en) Memory device