JPH01260863A - P-n junction diode - Google Patents

Abstract

PURPOSE:To prevent the change in breakdown voltage due to injection of electrons and holes having high energy into an insulating film, by providing a first-conductivity type high concentration impurity diffused layer A and a neighboring low concentration impurity diffused layer B in a second-conductivity type impurity diffused layer C, junctioning A and C in the vicinity of the surface of a semiconductor substrate, and junctioning B and C in the inside. CONSTITUTION:A P-N junction part where a breakdown voltage has the lowest value is a P-N junction in a semiconductor substrate 2 wherein the junction of a first- conductivity type high concentration impurity diffused layer 12 and a second conductivity type impurity diffused layer 16 is formed. A P-N junction in the vicinity of the surface of the semiconductor substrate 2, which is the junction formed with a first- conductivity type low concentration impurity diffused layer 14 and the second- conductivity type impurity diffused layer 16, has a breakdown voltage higher than that of the P-N junction in the semiconductor substrate 2. At the time of breakdown, electrons 6 and holes 8 having high energy are generated at the P-N junction in the semiconductor substrate 2. The energy of the electrons and the holes is lost until they reach the surface of the semiconductor substrate 2. Therefore, the electrons and the holes do not ride over a potential barrier at the surface of the semiconductor substrate 2 and are not injected into an insulating film 10.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PN junction diode formed on a semiconductor substrate mainly as a component of a semiconductor integrated circuit.

[Background of the invention]

PN junction diodes have applications in which they are used in a breakdown state. For example, as shown in FIG. 2, a sufficiently high but unstable internal pressure V is generated inside the semiconductor integrated circuit or introduced from outside the semiconductor integrated circuit. , may be taken out as a constant breakdown voltage Vl through a diode. AC at both ends of a circuit consisting of a diode and a resistor connected in series with it
A voltage V greater than the breakdown voltage between. When this occurs, a breakdown voltage V, which is always a constant voltage, is generated between both ends BC of the diode which is in breakdown even if vo fluctuates. As an example of an application, the constant voltage generated in this way can be used, for example, in MNOS (Metal N1), which requires a highly accurate constant voltage.
tride Oxide 3emiconductor
) type and M ON OS (Melal Oxide N
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It can be used as a voltage for writing and erasing non-volatile memories such as r ) type.

[Conventional technology and its issues]

However, in a conventional PN junction diode in which P-type and N-type impurity diffusion layers are simply formed on a semiconductor substrate, there is a problem in that the breakdown voltage changes during repeated breakdowns. As shown in FIG.
2 and the second conductivity type impurity diffusion layer 16.
The cause is that high-energy electrons 6 and holes 8 generated at the junction 4 cross the potential barrier on the surface of the semiconductor substrate 2 and are injected into the insulating film 10 on the semiconductor substrate. When this injection is repeated and electrons and holes are accumulated, space charges are formed in the insulating film 10. This space charge changes the electric field strength applied to the PN junction. Therefore, by repeating breakdown, the breakdown voltage changes.

For this reason, for example, if a PN junction diode in which only P-type and N-type impurity diffusion layers are formed is used as the voltage for writing and erasing the aforementioned nonvolatile memory, writing and erasing will eventually become impossible. It ends up.

[Object of the present invention]

An object of the present invention is to solve the above-mentioned problem, that is, to prevent changes in breakdown voltage caused by injection by preventing injection of high-energy electrons and holes into an insulating film. Another object of the present invention is to provide a PN junction diode that can maintain a constant breakdown voltage.

[Means to solve the problem]

To achieve the above object, the PN junction diode of the present invention has a first conductivity type high concentration impurity diffusion layer 12 and a first conductivity type low concentration impurity diffusion layer 14 adjacent thereto, as shown in FIG. in the impurity diffusion layer 16 of the second conductivity type, and in the vicinity of the surface of the semiconductor substrate 2, a PN A junction 4 is formed, and the semiconductor substrate 2
Inside, a first conductivity type high concentration impurity diffusion layer 12
It is characterized in that a PN junction 4 is formed by the junction of the impurity diffusion layer 16 of the second conductivity type and the impurity diffusion layer 16 of the second conductivity type.

[Effect]

In such a PN junction diode, the PN junction portion with the lowest breakdown voltage is the semiconductor substrate 2 formed by the junction of the first conductivity type high concentration impurity diffusion layer 12 and the second conductivity type impurity diffusion layer 16. This is an internal PN junction. The PN junction near the surface of the semiconductor substrate 2 formed by the junction of the first conductivity type low concentration impurity/diffusion layer 14 and the second conductivity type impurity diffusion layer 16 has a higher yield than the PN junction inside the semiconductor substrate 2. Has voltage. Therefore, in the PN junction diode of the present invention, breakdown occurs at the PN junction inside the semiconductor substrate 2.

At the time of breakdown, high-energy electrons 6 and holes 8 are generated in the PN junction inside the semiconductor substrate 2, but since these lose energy before reaching the surface of the semiconductor substrate 2, the potential barrier on the surface of the semiconductor substrate 2 It is not implanted into the insulating film 10 in excess of this amount. Therefore, the formation of space charges brought about by injection and the change in electric field strength at the PNN junction do not occur, and a constant breakdown voltage can be maintained.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

First, a manufacturing example of a PN junction diode of the present invention will be described in the fourth section.
The explanation will be based on the process cross-sectional diagram in the figure.

In the step shown in FIG. 4 (al), a photoresist, which is a photosensitive resin, is applied onto an N-type semiconductor substrate 2 with a resistivity of 10 (Ω@cm ), exposed to light, and developed to form a photoresist pattern using so-called photolithography. , using this as a mask, an energy of 100 (KeV
), dose amount 7 x 1015 (atoms/c
+d) phosphorus is injected into the semiconductor substrate 2.

Next, after removing the photoresist pattern in a mixed solution of sulfuric acid and hydrogen peroxide, the temperature was 1140 ("C) and the oxygen concentration was 0.
2 (voJ%) in a mixed gas atmosphere of oxygen and nitrogen.
By performing heat treatment for (hours), phosphorus is diffused. As a result, a second conductivity type impurity diffusion layer 16 made of an N type phosphorus diffusion layer is formed. Also at this time, the semiconductor substrate 2
A silicon oxide film 18 having a thickness of 20 (nm) is formed thereon. This silicon oxide film 18 is used as an underlying film for stress relaxation of a silicon nitride film to be formed in the next step.

Figure 4 (In the step BL, a film with a thickness of 1
A 50 (nm) silicon nitride film is formed. Next, a photoresist pattern is formed, and using this as a mask, the silicon nitride film is etched by an ion etching method using sulfur hexafluoride and trifluoromethane as reaction gases, and then the photoresist is removed. As a result, a silicon nitride film 20 is formed on the element region.

In the step of FIG. 40, a photoresist pattern 22 is formed, and the photoresist pattern 22 and the silicon nitride film 2 are
0 as a mask, energy 25 was applied by ion implantation method.
(KeV), dose amount 2 X IO (atom
Boron is implanted into the semiconductor substrate 2 at s/cr71).

As a result, a first conductivity type low concentration impurity diffusion layer 14 made of a P type boron diffusion layer is formed.

FIG. 4 (In the dl step, after removing the photoresist pattern, the silicon nitride film 20 is used as an oxidation-resistant film at a temperature of 103°C.
By oxidizing the semiconductor substrate for 3 hours in a water vapor atmosphere at 0 (° C.), an element isolation insulating film 24 made of a silicon oxide film with a thickness of 900 (nm) is formed. As a result, the first conductivity type low concentration impurity diffusion layer 14 is formed in the element isolation region under the element isolation insulating film 24.

In the step shown in FIG. 4, a photoresist pattern 22 is formed after removing the silicon nitride film in a hot phosphoric acid solution, and an energy 25 ( Ke
V), dose amount 2.5X1015 (atoms/c
boron is implanted into the semiconductor substrate 2 at step (rl). As a result, a first conductivity type high concentration impurity diffusion layer 12 made of a P type boron diffusion layer is formed in the element region adjacent to the first conductivity type low concentration impurity diffusion layer 14 .

In the process of FIG. 4), after the photoresist pattern is removed, a new 7 photoresist pattern 22 is formed, and an ion implantation method is performed using the photoresist pattern 22 and the element isolation insulating film 24 as a mask at an energy level of 40 (KeV).
), dose amount 4×1015 (atoms/cnl
), arsenic is implanted into the semiconductor substrate 2.

The arsenic diffusion layer 26 thus formed is formed in order to obtain a low-resistance electrical connection between the second conductivity type impurity diffusion layer 16 and an electrode to be formed in a subsequent step.

Figure 4 (In the GL process, after removing the photoresist pattern, a 480 (nm) phosphorus-containing silicon oxide film, that is, a PSG film, is formed over the entire surface by chemical vapor deposition using monosilane, oxygen, and phosphine as reaction gases. Form an intermediate insulating film 28. After this.

The impurities are activated by heat treatment for 30 minutes in a nitrogen atmosphere at lO00 ('C).

In the step of FIG. 4 (hl), a photoresist pattern is formed, and using this as a mask, the intermediate insulating film 28 is etched by an ion etching method using trifluoromethane and hexafluoroethane as reaction gases.
Contact holes for forming electrodes are formed in the high concentration impurity diffusion layer 12 of the conductivity type and the impurity diffusion layer 16 of the second conductivity type.

After removing the photoresist, a film with a thickness of 1 is deposited on the entire surface by sputtering.
(μm) aluminum film is formed. A photoresist pattern is formed on this, and using this as a mask, the aluminum film is etched by an ion etching method using boron trichloride and mono-70-trichloromethane as reaction gases.

As a result, an electrode 30 made of an aluminum film is formed. After removing the photoresist, hydrogen treatment is performed for 30 minutes in a hydrogen atmosphere of 425 ('C) to obtain ohmic contact between the electrode 30 and each impurity diffusion layer.

In the above embodiment, a first conductivity type high concentration impurity diffusion layer 12 is formed in a so-called element region where an element such as a MOS transistor is formed, and the element such as an MOS transistor is electrically isolated. A first conductivity type low concentration impurity diffusion layer 14 is formed under the element isolation insulating film 24, which is a so-called element isolation region, to obtain a PN junction diode of the present invention.

By doing so, it is compatible with the manufacturing process of normal semiconductor integrated circuits composed of other elements such as MOS transistors, and the PN junction diode of the present invention can be easily installed in a semiconductor integrated circuit mixed with other elements. The advantage is that it can be done.

Next, the fact that the breakdown voltage of the PN junction diode of the present invention does not change will be explained in comparison with a conventional PN junction diode. The PN junction diode of the present invention is shown in FIG. 4 (hl) obtained in the manufacturing example described above. Conductive type low concentration impurity diffusion layer 14
This corresponds to the case where no . As shown in Figure 2, a KPN junction diode and a 25 (KΩ) resistor are connected in series, and a reverse voltage of 15 (V) is applied between both ends AB as Vo.
was applied for 10 (ms) to cause the PN junction diode to break down.

The relationship between the number of repetitions of breakdown and breakdown voltage v1 at this time is shown in FIG. In the case of a conventional PN junction diode, the breakdown voltage changes as the breakdown occurs repeatedly, as shown in graph 62. As mentioned above, this is because high-energy electrons and holes generated in the PN junction near the semiconductor substrate surface during breakdown cross the potential barrier on the semiconductor substrate surface and are injected into the insulating film on the semiconductor substrate. be.

On the other hand, in the PN junction diode of the present invention,
As shown in graph 34, even if breakdown is repeated, the breakdown voltage does not change and remains constant. This means that the breakdown is P inside the substrate.
The N junction occurs at the bottom of the first conductivity type high concentration impurity diffusion layer 12 in FIG. This is because it cannot be injected into the insulating film on the semiconductor substrate beyond the potential barrier.

Examples of uses of the PN junction diode of the present invention include M
As mentioned above, there are applications for generating write and erase voltages for NOS type and MONO3 type nonvolatile memories, but other than that, they are also generally used as elements for constant voltage generation, and as voltage limiting elements. In short, it can be applied to all applications in which a PN junction diode is broken down and used. Among these, it is particularly effective when a constant breakdown voltage must be maintained with high precision.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, injection of high-energy electrons and holes generated in the PN junction during breakdown into the insulating film is prevented, and changes in the breakdown voltage caused by this injection are suppressed. It can be prevented. This provides a PN junction diode that can maintain a constant breakdown voltage.

Furthermore, a high concentration impurity diffusion layer of the first conductivity type is arranged in the element region, and a low concentration impurity diffusion layer of the first conductivity type is arranged in the element isolation region under the insulating film for element isolation. This has the advantage that the PN junction diode of the present invention can be easily integrated with other elements in a semiconductor integrated circuit in accordance with the manufacturing process.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the structure of the PN junction diode of the present invention, FIG. 2 is a circuit diagram when the PN junction diode is used in a breakdown state, and FIG. 3 is a sectional view showing the structure of a conventional PN junction diode. FIG. 4 (This is a graph showing all electric voltage relationships. 2...Semiconductor substrate, 4...PN junction, 12...High concentration impurity diffusion of first conductivity type) layer,
14...Low concentration impurity diffusion layer of first conductivity type, 1
6... Second conductivity type impurity diffusion layer, 24...
...Insulating film for element isolation. FIG.
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Claims (2)

[Claims] (1) A second conductivity type in which a first conductivity type high concentration impurity diffusion layer and a first conductivity type low concentration impurity diffusion layer adjacent to the first conductivity type high concentration impurity diffusion layer are provided in a semiconductor substrate. a PN junction is formed in the impurity diffusion layer of the semiconductor substrate near the surface of the semiconductor substrate by a junction between the first conductivity type low concentration impurity diffusion layer and the second conductivity type impurity diffusion layer; A PN junction diode, wherein a PN junction is formed in the semiconductor substrate by a junction between the first conductivity type high concentration impurity diffusion layer and the second conductivity type impurity diffusion layer. (2) A first conductivity type high concentration impurity diffusion layer is installed in the element region, and a first conductivity type low concentration impurity diffusion layer is installed in the element isolation region under the element isolation insulating film. The PN junction diode according to claim 1, characterized in that: