JPH01260847A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To ensure stable operation without effects on a TTL gate and other circuits on a semiconductor integrated circuit even if the potential of a ground is fluctuated, by isolating the ground of the totem pole output part of the TTL gate and the ground for an input part and a phase inverting part. CONSTITUTION:The emitter of a transistor 16 and resistors 13 and 14 are connected to a ground 7. The emitter of a transistor 20 and a resistor 15 arc connected to a ground 8. A grounding pad 22 including the ground 7 and a grounding pad 8a including the ground 8 are isolated. The ground 7 for an input part 1 and a phase inverting part 2 and the ground 8 for a totem pole output part 3 are divided into the ground pad 22 and the ground pad 8a. Therefore, even if a through current flows in the totem pole output 3 and the level of the ground 8 is fluctuated, the ground 7 for the input part 1 and the phase inverting part 2 is not fluctuated. Therefore, the operation of a TTL gate does not become unstable.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device having a TTL gate composed of an input section, a phase inversion section, and a totem pole output section.

[Conventional technology]

In recent output circuits of semiconductor integrated circuit devices, TTL gates are generally used, which are composed of an input section, a phase inversion section, and a totem pole output section.

FIG. 2(a) shows an example of a conventional TTL gate. 1 indicates an input section, 2 indicates a phase inversion section, and 3 indicates a totem pole output section. The input 4 of the TTL gate is connected to the base of the transistor 16 of the input part 1 and to the resistor 13. The emitter of the transistor 16 and one end of the resistor 13 are connected to the ground (lowest potential power supply) 7.
The collector of is connected to the power supply 5 and the base of the transistor 17 of the phase inverter 2 via the resistor 9. The emitter of the transistor 17 is connected to the ground 7 through the resistor 14, and the collector of the transistor 17 is connected to the power supply 5 and the transistor 1 of the totem pole output section 2 through the resistor 10.
Connected to the base of 8. The collector of the transistor 18 is connected to the power supply 5 and the transistor 19 via the resistor 11.
The emitter of the transistor 18 is connected to the gelandor and the transistor 2 via the resistor 15.
0 base. The collector of the transistor 19 is connected to the power supply 5 via the resistor 12, and the emitter of the transistor 19 is connected to the anode of the diode 21. The collector of the transistor 20 is connected to the cathode of the diode 21, and the emitter of the transistor 20 is connected to the ground 7. TTL gate output 6
is drawn from the collector of transistor 20.

A constant voltage (for example, 5V) is supplied to the power supply 5. Second
FIG. 1B shows an external electrode (hereinafter referred to as a ground pad) 22 of a ground 7 provided on a chip of a semiconductor integrated circuit device.

Next, the operation will be explained. When the input 4 is at the H level, the transistor 16 is turned on, and the base of the transistor 17 is at the L level, so that the transistor 17 is turned off. The base of the transistor 18 becomes H level, the transistor 18 is turned on, and current is supplied from the emitter of the transistor 18 to the base of the transistor 20.
0 turns on. Therefore, the output 6 of the TTL gate becomes L level in this case. When input 4 is at L level, transistor 16 is turned off, the base of transistor 17 is at H level, and transistor 17 is turned on. Therefore, the base of the transistor 18 becomes L level, the transistor 18 is turned off, and no current is supplied from the emitter of the transistor 18 to the base of the transistor 20, and the transistor 20 is turned off. Therefore, the output 6 of the TTL gate becomes H level in this case.

Such a TTL gate has the property that a large spike-like through current flows in the totem pole output section 3 when the logic level is inverted. When this through current flows, ground 7
Due to the wiring pattern, the parasitic capacitance and inductance caused by the bonding wires, the potential of the ground connected to the output circuit section changes transiently.

[Problem to be solved by the invention]

However, in conventional semiconductor integrated circuit devices,
Since the input section 19 of the TTL gate is connected to the phase inversion section 2 and the totem pole output section 3 by a common ground wiring, it is connected to the input section 1 and the phase inversion section 2 when the above-mentioned through current flows. There was a problem that the ground 7 fluctuated transiently, making the operation of the TTL gate unstable.

Additionally, semiconductor integrated circuit devices are generally provided with multiple TTL gates, which are connected to a common ground, so if a through current flows through one TTL gate,
The ground of not only that TTL gate but also other TTL gates fluctuates transiently. This ground variation becomes more pronounced as the number of TTL gates that switch simultaneously increases.

In order to solve the above-mentioned problems with the TTL gate of the conventional semiconductor integrated circuit device, the present invention separates the ground of the totem pole output section of the TTL gate from the ground of the input section and phase inversion section. Even if a through current flows through the circuit and its ground potential fluctuates, the TTL gate and other circuits on the semiconductor integrated circuit are not affected, and stable operation can be guaranteed.

[Means to solve the problem]

The present invention provides a semiconductor integrated circuit device having a TTL gate composed of an input section, a phase inverting section, and a totem pole output section, in which the input section and the phase inverting section are connected to a totem pole ground to which the totem pole output section is connected. It is characterized in that it is separated from the ground for the input section and is not connected to at least the vicinity of the external electrode.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1(a) shows a first embodiment of a semiconductor integrated circuit device according to the present invention.
The circuit shown in FIG. 1(a) is the same as the circuit shown in FIG. 2(a), except that the ground 8 is provided separately from the ground 7. It is. In other words, in this embodiment, transistor 1
The emitter of transistor 20 and resistor 13 , 14 are connected to ground 7 , and the emitter of transistor 20 and resistor 15 are connected to ground 8 .

In FIG. 1(b), the ground 2 including the ground 7
2 and the ground pad 8a of the ground 8 are shown separated.

In this embodiment, the ground 7 of the input section 1 and the phase inversion section 2 is
And, the ground 8 of the totem pole output section 3 is as shown in Fig. 1 (b
), since the ground pad 22 and the ground pad 8a are separated, the totem pole output section 3
Even if a through current flows and the level of the ground 8 changes, the ground 7 of the input section 1 and the phase inverting section 2 does not change. Therefore, the operation of the TTL gate does not become unstable.

FIG. 3 shows a ground pad according to a second embodiment of the present invention.

FIG. 3 shows that in the circuit of FIG. 1(a), the separated ground wiring 7 and ground wiring 8 are connected in close proximity to a common ground pad 22. In FIG. The second embodiment of the present invention shown in FIG. 3 requires fewer pads than the first embodiment shown in FIG. 1, which has the advantage of reducing chip size and improving yield. There is.

〔Effect of the invention〕

As described above, in the present invention, by separating the ground pad for the totem pole output section from the ground pads for the input section and phase inversion section, a through current is generated in the totem pole output section, and the ground pad for the totem pole output section is separated. Even if the level fluctuates, the ground levels of the other input sections and the phase inversion section do not fluctuate, resulting in the effect that stable circuit operation can be obtained.

[Brief explanation of the drawing]

FIG. 1(a) is a circuit diagram showing a TTL gate circuit according to the first embodiment of the present invention, and FIG. 1(b) is a ground pad to which grounds 7 and 8 shown in FIG. 1(a) are connected. 2(a) is a plan view showing the TTL of a conventional semiconductor integrated circuit.
Circuit diagram showing the gate circuit, Fig. 2(b) is similar to Fig. 2(a)
FIG. 3 is a plan view showing a ground pad to which the ground 7 shown in FIG. 1... Input section, 2... Phase inversion section, 3... Totem pole output section, 4... TTL gate input, 5...
Power supply, 6... TTL gate output, 7, 8... Ground wiring, 8a, 22... Ground pad, 9-15.
...Resistance, 16-20...Transistor, 21...
diode.

Claims (1)

[Claims] In a semiconductor integrated circuit device having a TTL gate composed of an input section, a phase inversion section, and a totem pole output section, an input section to which the input section and the phase inversion section are connected to a totem pole ground to which the totem pole output section is connected. 1. A semiconductor integrated circuit device characterized in that the semiconductor integrated circuit device is separated from a ground for external use and is not connected to at least the vicinity of an external electrode.