JPH01258034A - Program exceptional processing system - Google Patents

Abstract

PURPOSE:To enable changing an exceptional code or forming a new exceptional code without changing hardware by forming an optional interruption code by a microprogram to execute exceptional processing interruption. CONSTITUTION:Exceptional information detected by exception detecting circuits (3-50)-(3-55) is inputted to an arithmetic circuit 3-88 by a specific microprogram flow and the output of the circuit 3-88 is written in an exceptional code register 3-37. At the same time, an exceptional FF 3-17 is turned on or the exceptional information is inputted to the circuit 3-88 and temporarily stored in a register file. When the circuits 3-88 forms a new exceptional code by the microprogram flow, the output of a writing bus of the circuit 3-88 is written in the register 3-37. At the same time, the FF 3-37 is turned on and exceptional interruption processing is started to report the exceptional code set up in the register 3-37 to software.

Description

[Detailed Description of the Invention] [Summary] Regarding a program exception handling method in a microprogram-controlled information processing device equipped with a pipelined program exception handling circuit, it is possible to change an exception code without changing the hardware. For the purpose of generating a new exception code, means for inputting the output of an exception detection circuit of an information processing device to an arithmetic circuit, and the above-mentioned microprogram, generate an interrupt code in the arithmetic circuit from exception information from the above-mentioned detection circuit. means for writing the result into an exception code register via a write bus of the arithmetic circuit, and means for inhibiting instruction continuation and generating an exception interrupt by the generation of the generated exception. , a microprogram is configured to generate an arbitrary interrupt code and perform an exception handling interrupt.

[Industrial application field]

The present invention relates to a program exception handling method in a microprogram-controlled information processing device equipped with a pipelined program exception handling circuit.

When the central processing unit (CPU) of an information processing device executes an instruction, it checks for various program exception conditions caused by software programming errors or invalid data provided by the user, and if an abnormality is found, a program interrupt is issued. Wake up,
The type of exception must be reported to the software as an interrupt code.

These exceptions include exceptions that do not depend on the instruction such as an error in reading an instruction, exceptions that depend on the type of instruction such as an undefined instruction code or privileged instruction, and exceptions that do not depend on the instruction such as an error in reading an operand or an operation exception. There are exceptions that will become clear later.

Among these exceptions, exceptions that depend on instructions have a common pattern of exception conditions, and can be corrected relatively easily by changing the exception judgment conditions of the microprogram corresponding to the instruction. Exceptions found after execution are difficult to correct because the circuit is constructed using hardware.

For this reason, if you try to add a new command.

If the exception interrupt code has to be changed due to a change in the specifications of an existing instruction, the hardware must be modified.
There was a problem that required a large amount of cost and man-hours. In addition, increasing the number of types of code patterns that can be generated also poses the problem of increasing the amount of hardware, so as data processing becomes more diversified, there are many requests to change the functions of information processing equipment. There is a need for a program exception handling method that can effectively change an exception code or generate a new exception code to generate an exception interrupt at a low cost.

[Prior art and problems to be solved by the invention] FIG. 2 is a diagram explaining a conventional program exception handling method.
(a) shows a block diagram, and (b) shows an operation time chart.

First, in the block diagram of this figure (a), 3-61 to 3
-88 is a part of the circuit for original instruction processing of the information processing device.

The instruction code obtained by reading the instruction is input to the instruction code register 3-61, and the corresponding microprogram is read from the control storage (CS) 3-60 according to the instruction code, and the pipeline tag (flip-flop) is read out. (control bit group consisting of FF) 3-62~3
-66.

These control bits execute instructions by controlling each pipeline stage in turn.

3-81 to 3-88 are circuits of the arithmetic unit, and the operand data of the main memory/buffer read out in the B stage;
or register operand data is the B stage control pin) Under the control of 3-64, selection circuits 3-86, 3-
87 and operand data register 3-
81.3-82.

The values of both operands are the control bits 3-6 of the E stage.
Under the control of 5, the arithmetic circuit 3-88 performs an arithmetic operation, and the result is written into the result register 3-83.

Furthermore, the value of the result register 3-83 is controlled by the control bit 3-66 of the W stage.
85 or main memory/buffer.

In this figure, 3-11 to 3-55 are circuits for exception handling, and 3-11 to 3-17 are flip-flops (FF) for detecting exceptions, which are detected at each stage of the pipeline. The exception event that occurred is the gate circuit 3-2.
It is logically summed by 2 to 3-26.

3-50 to 3-55 are logic circuits that detect and code exceptions in each stage, and the exception codes are stored in the pipeline-connected exception code register 3-31.
Flows through 3-37.

Detected at 3-50 are exceptions related to instruction reads (eg, reading from an invalid address, etc.) and are detected/coded by hardware.

What is detected at 3-52 are undefined instruction exceptions, outside privileges, etc., and the exception detection conditions are given by control bits 3-62 of the A stage and detected/coded by hardware.

3-53. The exception detected in 3-54 is related to main memory operand access, etc., and the exception detected in 3-55 is related to calculation execution (for example, calculation when the divisor is 0°). Yes, both are detected/encoded by hardware.

The selection circuits 3-42 to 3-46 are for giving priority to the exception code detected in the previous stage, and are flip-flops (PP) 3-13 to 3 representing the above-mentioned exception detection.
-17, the priority control is performed.

Also, exception code register 3-37. The feedback loops (1) and (2) of the exception detection flip-flop (PF) 3-17 are circuits for holding the exception events detected at each of the above stages in order to report them to software in the exception interrupt processing.

Next, the operation of the pipeline when an exception occurs will be explained with reference to FIG.

Now, if an exception is detected in the B stage of the third microprogram flow, in order to guarantee the operation of the previous instructions, the exception detection flip-flop (FP) 3-15, which is set to "1" at that time, is The contents flow according to the pipeline from 3-16. Then, when flip-flop (PP) 3-16 becomes °1', the third and subsequent microprogram flows are inhibited, enter the clear pipeline (indicated by RS), and control related to normal instruction processing of the pipeline. Bits 3-62 to 3-66 are all cleared, and then the microprogram flow for exception interrupt processing starts and the above exception code register 3 is cleared.
-37 is reported as the exception interrupt code.

In this way, in conventional program exception handling methods, exception codes for most exception events were created using hardware logic, so when an exception code needs to be changed or a new exception code is required, hardware logic is required. In view of the above-mentioned drawbacks of the conventional technology, the present invention provides a program exception processing method for a microprogram-controlled information processing device equipped with a pipelined program exception processing circuit. The purpose of this is to provide an exception handling method that can be handled by changing the microprogram without changing the hardware when changing the code or creating new exception code.

[Means to solve the problem]

The above problem is solved by a program exception handling method configured as follows.

A microprogram-controlled information processing device equipped with a pipelined program exception handling circuit, comprising means for inputting an output of the exception detection circuit to an arithmetic circuit; means for generating an interrupt code, means for writing the result into an exception code register via a write bus of the arithmetic circuit, and inhibiting instruction continuation by the generated exception,
In addition, a means for generating an exception interrupt is provided so that an arbitrary interrupt code is generated by a microprogram and an exception handling interrupt is performed.

[Effect]

That is, according to the present invention, in a program exception handling method in a microprogram-controlled information processing device equipped with a pipelined program exception handling circuit, when executing a newly established specific instruction or a specific instruction whose function has been changed, In a specific microprogram flow, the exception information detected by the exception detection circuit is input to the arithmetic circuit, and its output is written to the exception code register, and at the same time, an exception flip-flop (FF) is turned on or the corresponding Exception information is input to an arithmetic circuit and stored in a register file, and when a new exception code is generated in the arithmetic circuit in a specific microprogram flow, the output of the write bus of the arithmetic circuit is At the same time as writing to the exception code register, the exception flip-flop (FP) is turned on to enter exception interrupt processing, and the exception code set in the exception code register is reported to the software. This has the advantage that the exception code can be changed or a new exception code can be generated simply by changing the microprogram or creating a new one without modifying the microprogram.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, showing means for inputting the outputs of the exception detection circuits 3-53 to 3-55 to the arithmetic circuit, and the output of the arithmetic circuit 3-88. Means for inputting the write bus to the exception code register 3-37■
and the output of the arithmetic circuit 3-88 is sent to the exception code register 3.
- When writing to 37, the exception flip-flop (FF)
Means (2) for turning on 3-17 is a necessary means to carry out the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

Even if the present invention is implemented, the instruction processing and the exceptional event detection operation itself will not be particularly different from the conventional method, so they will be omitted here. The program exception handling method of the present invention will be explained with a focus on changing the exception code or generating a new exception code.

Now, if a new exception interrupt code is defined, control bits 3-64 inhibit the conventional exception code creation process in the exception detection circuit 3-54 in the B stage of the microprogram flow that detects the exception event. Then, the exception information detected there is input to the arithmetic circuit 3-88 through the route (3) newly established according to the present invention, and is instructed to be written to the working register in the register file 3-85 through the arithmetic circuit 3-88. Continuing specific microprogram flow, conventional arithmetic circuits 3-88
Creates the above-defined exception code using the exception information stored in the above-mentioned work register using the arithmetic function, and instructs it to be written to the exception code register 3-37 using the route (newly established in the present invention). At the same time, in order to force an exception interrupt at the W stage, exception flip-flop (FF) 3-17 is turned on at the root ■.
make it function as such.

Then, in the same manner as a conventional program exception interrupt, the microprogram flow and subsequent microprogram flows are inhibited, and an exception interrupt occurs, and the exception code generated and written in the exception code register 3-37 is generated. can be reported to the software.

In other words, by implementing the present invention, exception codes can be freely created by changing the microprogram or the like.

In the above embodiment, only the exceptional event of the B stage is input to the arithmetic circuit. However, it is of course possible to input exception information detected at other stages to the arithmetic circuit 3-88. Inputting the output of the exception code register 3-34 of the B stage, - inputting the exception information of the E stage of the previous microprogram flow using a bypass circuit well known in boat fishing; It goes without saying that the exception information detected by the exception detection circuit may be converted into a condition code data format and input.

Further, in the above embodiment, the above exception information is once written to the working register in the register file 3-85, and then the exception information is written to a different microprogram flow (specifically, , continued)), the output of the exception detection circuit 3-54 is input to the arithmetic circuit 3-88, the arithmetic operation is performed immediately, and the output is sent to the write bus. It goes without saying that the exception flip-flop (FF) 3-17 may be turned on at the same time as the exception code register 3-37 is written.

As described above, in a program exception handling method, when it is desired to change an exception code or to create a new exception code, the present invention executes a related instruction, inputs the detected exception information to an arithmetic circuit, and executes the relevant instruction. The feature is that a new predefined exception code is created by performing a specific operation in the circuit, and written to the exception code register to force an exception interrupt.

〔Effect of the invention〕

As described above in detail, the program exception handling method of the present invention is a program exception handling method in a microprogram-controlled information processing device equipped with a pipelined program exception handling circuit, and uses newly established specific instructions or When executing a specific instruction whose function has been changed, in a specific microprogram flow, the exception information detected by the exception detection circuit is input to the arithmetic circuit, the output is written to the exception code register, and at the same time the exception flip-flop (
PF) or inputs the exception information to the arithmetic circuit and stores it in the register file, and then generates a new exception code in the arithmetic circuit in a specific microprogram flow. At the same time, the output of the write bus of the arithmetic circuit is written to the exception code register, and the exception flip-flop (FF) is turned on to enter exception interrupt processing, and the exception code set in the exception code register is reported to the software. Because it was designed to
There is an advantage that the exception code can be changed or a new exception code can be generated simply by changing the microprogram or creating a new one without modifying the hardware.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a diagram explaining a conventional program exception handling method. It is. In the drawings, 3-11 to 3-17 are flip-flops (FF) or exception flip-flops (FP) for detecting exceptions. 3-22 to 3-26 are OR circuits. 3-31 to 3-37 are exception code registers. 3-42 to 3-46 are selection circuits. 3-50 to 3-55 are exception detection circuits. 3-81 to 3-88 are arithmetic circuits. ■ to ■ are means or routes for carrying out the present invention. ■ and ■ indicate retention routes, respectively. 1-f convex

Claims (1)

[Claims] In a microprogram-controlled information processing device equipped with a pipelined program exception handling circuit (3), the output of the exception detection circuit (3-50 to 3-55) is transmitted to the arithmetic circuit (3-8). ) and the means ([1]) for inputting to the detection circuit (3-50 to 3-50) using the microprogram.
means for generating an interrupt code in the arithmetic circuit (3-8) from exception information from the arithmetic circuit (3-55); ) ([2]
), the instruction continuation is inhibited by the exception generated above, and
A program exception handling method characterized by further comprising: means ([3]) for generating an exception interrupt, and a microprogram generates an arbitrary interrupt code and performs an exception handling interrupt.