KR20080044652A - Method for debugging by using stack of cpu - Google Patents

Abstract

A debugging method using a stack of a CPU is provided to perform a smooth debugging though a user makes a program excluding a dangerous attempt code and then there occurs a problem. A debugging method comprises the following several steps. A CPU having a set amount of stacks in its inner space determines whether an instruction to a memory or to a register is performed(S201). In case of the instruction to the memory, the CPU receives an entry from plural executing codes records via a core and records the entry at the stacks wherein the entry is composed of changed position of a memory, a value before data is changed and a value after data is changed whenever the data at the memory is changed(S203). In case of the instruction to the register, the CPU records an entry at the stacks wherein the entry is composed of an address of the register, a value before data at the register is changed and a value after data at the register is changed(S205). If there occurs an error, the CPU executes a debugging unit(S207,S209). The debugging unit debugs a value of the memory or the register to a state before data at the memory or the register is changed while reading the latest inputted data by using the entry of the changed value of the memory or the register stored at the stacks just before there occurs the error(S211).

Description

Debugging method using stack in CPU {METHOD FOR DEBUGGING BY USING STACK OF CPU}

1 is a block diagram for performing a debugging method using a stack in a CPU according to the present invention;

2 is a detailed flowchart of a debugging method using a stack in a CPU according to a preferred embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: Memory 1011-0, ..., 1011-n: INS 0, ..., INS n

1013: data portion 103: CPU

1031: Core 1033: Register

1035: stack 1037: debugging unit

The present invention relates to a debugging method using a stack in a central processing unit (CPU), and more particularly, after recording a change in a certain amount of memory value or register value in a CPU, It is about a method that can be debugged by restoring the most recently recorded value in the reverse order in case of an unexpected unexpected situation.

As is well known, the CPU is a device that controls the entire system such as a computer and various electronic products, and controls and adjusts a series of processes that receive data from various input devices and process the results, and then send the result to the output device. do.

The CPU is composed of an arithmetic logic unit that is responsible for comparison, determination, and operation, and a control unit that is responsible for interpreting and executing instructions. An ALU is an adder that performs various additions and results, an accumulator which is a register that temporarily stores the result of arithmetic and logic operations, and a register that is a kind of temporary storage device in a central processing unit. (register) or the like.

In addition, the control device includes a program counter for controlling the execution order of the program, an instruction register for temporarily storing the contents of the currently executing instruction, and a control signal to a device to be executed by decoding the instruction contained in the instruction register. It consists of an instruction decoder that sends. In other words, the CPU is connected to an external memory (for example, RAM, ROM, ...) to read the code of various data stored in the data portion in the memory to execute a machine language instruction (Instruction).

However, when the CPU configured as described above reads the code of data stored in the memory and executes a machine command, an unwanted situation, that is, an error occurs, suddenly stops the execution of the task and reboots the CPU state for the first time. Since it is necessary to proceed from the beginning, it does not remember the change of the memory value and the register value just before the error occurs, and thus has the problem that the debugging is abnormally performed.

Accordingly, the present invention has been made to solve the above problems, the object of which is to write a change of a certain amount of memory value or register value on the stack in the CPU, when an unexpected accident occurs It provides a debugging method using the stack on the CPU that can be debugged while restoring the most recently recorded value in reverse order.

In the present invention to achieve the above object, a debugging method using a stack in a CPU is provided when the instruction is stored in a memory and receives a changed memory entry through a plurality of execution codes whenever there is a change in data stored in the memory. In the case of writing to the register, executing the instruction to the register, writing the changed register entry to the stack whenever there is a change in the register, and if an error occurs in the CPU, the entry immediately before the error stored in the stack occurs. It includes the process of debugging the memory or register value before changing it by reading from the most recent one.

Hereinafter, a plurality of embodiments of the present invention may exist, and a preferred embodiment will be described in detail with reference to the accompanying drawings. Those skilled in the art will appreciate the objects, features and advantages of the present invention through this embodiment.

1 is a schematic block diagram for a debugging method using a stack in a CPU according to the present invention, a plurality of executable code INS 0, ..., INS n (1011-0, ..., 1011-n Memory 101 having a data portion 1013 storing various data, and located between the memory 101 and the stack 1035 so as to record an entry of the memory 101 change value in the stack 1035. A register 1033 which temporarily stores the result of arithmetic and logical operations, and provides an entry of the register 1033 change value to the stack 1035, and is provided through the core 1035. A stack 1035 which records the entry of the change value of the memory 101 or the entry of the change value of the register 1033, and when the space becomes full, the oldest recorded entry is erased to secure a space for writing a new entry; If an undesired situation occurs, such as an error, A debugging unit that performs debugging before changing the value of the memory 101 or the register 1033 by reading from the most recent entry using the entry of the change value of the previous memory 101 or the entry of the change value of the register 1033. And a CPU 103 having 1037.

Next, the debugging process using the stack in the CPU of the present embodiment having the above-described configuration will be described.

2 is a flowchart sequentially illustrating a debugging process using a stack in a CPU according to a preferred embodiment of the present invention.

First, the CPU 103 has a certain amount of stack 1035 therein, and determines whether the instruction is executed to the memory 101 or the register 1033 (S201).

As a result of the determination (S201), in the case of performing a command to the memory 101, whenever there is a change in the data stored in the data unit 1013 in the memory 101, three values of the changed storage location, the value before the change and the value after the change are shown. (E.g., MEM 00xx, 35, 27 stored in the stack of FIG. 1) from the plurality of executable codes INS 0, ..., INS n (1011-0, ..., 1011-n) to the core ( 1031 is received through the stack 1035 and recorded (S203).

As a result of the determination (S201), when the instruction is executed to the register 1011, an entry consisting of three values, that is, the address of the register 101, the value before the change and the value after the change (for example, REG 0x, 2A, stored in the stack of FIG. 9B) is recorded in the stack 1035 (S205).

On the other hand, the CPU 103 causes the debugging unit 1037 to execute when an undesired situation, that is, an error occurs (S207).

Then, the debugging unit 1037 reads the memory 101 using the entry of the change value of the memory 101 or the entry of the change value of the register 1033 immediately before the error stored in the stack 1035 occurs, and the memory 101 is read. Or before the value of the register 1033 is changed (S211).

Therefore, the present invention writes a certain amount of memory value or register value change on the stack in the CPU, and then debugs while restoring the most recently recorded value in the reverse order in case an unwanted accident occurs. You can write code that makes dangerous attempts when you are doing it, and you can debug smoothly if problems occur.

As described above, the present invention records a certain amount of memory value or register value change on the stack in the CPU, and then restores the most recently recorded value in the reverse order in the event of an unexpected accident. By debugging, you can write code that makes dangerous attempts when programming, and you can debug smoothly even if problems occur.

Claims (3)

A debugging method using a stack on a CPU that executes instructions in each of memory and registers. (a) in the case of executing a command to the memory, receiving a changed memory entry through a plurality of execution codes and writing them to the stack whenever there is a change in data stored in the memory; (b) writing a changed register entry on the stack each time there is a change of the register in the case of executing an instruction to the register; (c) when an error occurs in the CPU, debugging the value of the memory or register before changing by reading from the most recent entry using the entry immediately before the error stored in the stack occurs. Debugging method using a stack on the CPU containing a. The method of claim 1, And a memory entry of the step (a) comprises the memory storage location, a value before change and a value after change. The method of claim 1, And the register entry of step (b) comprises the register storage location, a value before change and a value after change.

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