JPH01256175A - Complementary two-dimensional electron gas field-effect transistor - Google Patents

Complementary two-dimensional electron gas field-effect transistor

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Publication number
JPH01256175A
JPH01256175A JP8319688A JP8319688A JPH01256175A JP H01256175 A JPH01256175 A JP H01256175A JP 8319688 A JP8319688 A JP 8319688A JP 8319688 A JP8319688 A JP 8319688A JP H01256175 A JPH01256175 A JP H01256175A
Authority
JP
Japan
Prior art keywords
channel
hemt
layer
complementary
inas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8319688A
Other languages
Japanese (ja)
Inventor
Akio Furukawa
昭雄 古川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8319688A priority Critical patent/JPH01256175A/en
Publication of JPH01256175A publication Critical patent/JPH01256175A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To increase switching rate, by using GaSb having high hall mobility for a P-channel high electron mobility transistor (HEMT) and InAs having high electron mobility for an M-channel HEMT. CONSTITUTION:An N-channel HEMT comprises an electron supply layer of AlxGa1-x and an electron transist layer of InAs, while P-channel HEMT comprises a hall supply layer of AlxGa1-xSb and a hall transit layer of GaSb. Since electrons in the InAs have mobility about four times as high as that of electrons in GaAs, the N-channel HEMT thus produced is operable at high speed. Further, since halls in the GaSb have a mobility three to four times as high as that of halls in GaAs, the P-channel HEMT thus produced is operable at high speed. The complementary HEMT consists of an N-channel HEMT composed of a gate layer 1 and an N-channel layer 2 and a P-channel HEMT composed of a gate layer 4 and a P-channel layer 5. The HEMT thus produced is allowed to have increased switching speed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ヘテロ構造を有する相補型2次元電子ガス電
界効果トランジスタ、特にその材料に関するものである
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a complementary two-dimensional electron gas field effect transistor having a heterostructure, and in particular to materials thereof.

〔従来の技術〕[Conventional technology]

従来の2次元電子ガストランジスタとしては一3t−M
OSFETやAlGaAsとGaAsを用いたHEMT
(高電子移動度トランジスタ)・MESFETなどがあ
る。これらを用い、低消費電力を実現するためには相補
型構造にする必要があり、Siでは0MO3が実現され
ている。しかし、Siでは電子の走行スピードが小さい
ために、トランジスタのスイッチング速度が遅くなって
いた。そこで、より速いスイッチング速度を実現するた
めに、2次元電子ガストランジスタの中で最も速いAl
GaAsとGaAsを用いたHEMTが提案され(三相
:ジャパニーズ・ジャーナル・オン・アプライド・フィ
ジクス、第x9.@ (1980年)P、225)、期
待どうりの高速性が実現された。HEMT材料として従
来考えられていたものには、上記の他にInGaAsと
InGaAsを用いたものもあり、さらに速い電子のス
ピードを利用しようというものである。
As a conventional two-dimensional electron gas transistor, 13t-M
HEMT using OSFET, AlGaAs and GaAs
(high electron mobility transistor), MESFET, etc. In order to realize low power consumption using these, it is necessary to have a complementary structure, and 0MO3 has been realized in Si. However, since the traveling speed of electrons in Si is low, the switching speed of the transistor is slow. Therefore, in order to achieve faster switching speed, we decided to use Al, which is the fastest among the two-dimensional electron gas transistors.
A HEMT using GaAs and GaAs was proposed (three-phase: Japanese Journal on Applied Physics, No. In addition to the above-mentioned HEMT materials, there are also those using InGaAs and InGaAs, which are intended to utilize even faster electron speeds.

HEMTに関しては、その電子の移動度が太きいために
、nチャネルのみを使って高速な集積回路が作られてい
る。第2図に従来のGaAsを用いたnチャネル)IE
MTの構造を示す、このnチャネルHEMTは、GaA
sを用いた基板23と、GaAsを用いたnチャネル層
22と、n−AsGaAsを用いたゲートjW21と、
ソース24と、ゲート25と、ドレイン26とにより構
成されている。
As for HEMTs, high-speed integrated circuits are fabricated using only n-channels because of their high electron mobility. Figure 2 shows a conventional n-channel IE using GaAs.
This n-channel HEMT, which shows the structure of MT, is made of GaA
A substrate 23 using s, an n channel layer 22 using GaAs, a gate jW21 using n-AsGaAs,
It is composed of a source 24, a gate 25, and a drain 26.

しかし集積度が大きくなるに従い、低消費電力型の相補
型が要求されるようになると、T(E M Tのpチャ
ネル(p−HEMT)を実現する必要がある。第3図に
、pチャネルOE M Tの構造の一例を示す、このp
チャネルHEMTは、GaAsを用いた基板33と、G
aAsを用いたpチャネル層32と、p AlGaAs
を用いたゲート層31と、ソース34と、ゲート35と
、ドレイン36とにより構成されている。
However, as the degree of integration increases, and a complementary type with low power consumption is required, it is necessary to realize a p-channel (p-HEMT) of T(EMT). This p shows an example of the structure of OE M T.
The channel HEMT includes a substrate 33 made of GaAs and a substrate 33 made of GaAs.
p channel layer 32 using aAs and p AlGaAs
The gate layer 31 includes a source 34, a gate 35, and a drain 36.

しかしpチャネルHEMTを実現する際に起こる問題点
として、GaAsやI nGaAsではホールの有効質
量が大きく、そのスピードが小さいことである。そのた
めに、p型HEMTのスイッチングスピードは遅く、n
型HEMTの1/10程度となる。このp−)(EMT
を用いて相補型のHEMT (CHEMT)を実現する
と、スイッチングスピードは、遅い方のp−HEMTで
決まるために、GaAs系のCHEMTは、かなり低速
のものとなる。
However, a problem that arises when realizing a p-channel HEMT is that the effective mass of holes in GaAs and InGaAs is large and their speed is low. Therefore, the switching speed of p-type HEMT is slow, and n
It is about 1/10 of type HEMT. This p-)(EMT
When a complementary HEMT (CHEMT) is realized using p-HEMT, the switching speed is determined by the slower p-HEMT, so the GaAs-based CHEMT becomes considerably slow.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来の材料を用いたHEMTで低消費電力回路である相
補型を実現する際に起こる問題点として、スイッチング
スピードがpチャネルのHEMTで制限されるために、
遅いことが挙げられる。
A problem that occurs when implementing a complementary type low power consumption circuit with HEMTs using conventional materials is that the switching speed is limited by p-channel HEMTs.
One of the reasons is that it is slow.

本発明の目的は、このような欠点を除き、より速い、か
つ低消費電力型である相補型2次元電子ガス電界効果ト
ランジスタを提供することにある。
An object of the present invention is to eliminate such drawbacks and provide a complementary two-dimensional electron gas field effect transistor that is faster and consumes less power.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、nチャネルトランジスタとnチャネルトラン
ジスタとを有する相補型2次元電子ガス電界効果トラン
ジスタにおいて、 前記nチャネルトランジスタは、A (l zG a 
r−xsbより成る電子供給層と、InAsより成る電
子走行層とを有し、 前記nチャネルトランジスタは、A I XG’ a 
r−xsbより成るホール供給層と、Garbより成る
ホール走行層とを有することを特徴とする。
The present invention provides a complementary two-dimensional electron gas field effect transistor having an n-channel transistor and an n-channel transistor, wherein the n-channel transistor has A (l zG a
The n-channel transistor has an electron supply layer made of r-xsb and an electron transit layer made of InAs, and the n-channel transistor has A I
It is characterized by having a hole supply layer made of r-xsb and a hole transit layer made of Garb.

〔作 用〕[For production]

相補型2次元電子ガス電界効果トランジスタd材料とし
て、本発明によるものを用いた場合、nチャネルHEM
Tとしては、A ItXG a I−xS bを電子供
給層とし、InAsを電子走行層とする。
When the material according to the present invention is used as a complementary two-dimensional electron gas field effect transistor d material, an n-channel HEM
For T, A ItXG a I-xS b is used as an electron supply layer, and InAs is used as an electron transport layer.

Aj、Ga+−,5bJiJにドナー(Te)をドープ
しておけば(nAsとAI!XGa1−XSbの界面の
InAs側に電子が誘起され、nチャネルが形成される
。InAs中の電子はGaAsに比べ移動度が4倍程度
あるために、高速のnチャネルHEMTが形成される。
If Aj, Ga+-, 5bJiJ is doped with a donor (Te), electrons are induced on the InAs side of the interface between nAs and AI! Since the mobility is about four times that of the conventional one, a high-speed n-channel HEMT can be formed.

pチャネルHEMTとしては、AlxQa、−、Sbを
ホール供給層とし、GaSbをホールの走行層とする。
In the p-channel HEMT, AlxQa,-,Sb is used as a hole supply layer, and GaSb is used as a hole transport layer.

Al、1Ga1−XSb店にアクセプター(Be)をド
ープしておけばGaSbとA I XG a +−*S
 bの界面のQa3b側にホールが誘起され、pチャネ
ルが形成される。GaSb中のホールの移動度はQa、
6.sに比べて3〜4倍程度大きいために、高速のpチ
ャネルHE M Tが形成される。
If acceptor (Be) is doped into Al, 1Ga1-XSb store, GaSb and A I XG a +-*S
Holes are induced on the Qa3b side of the interface b, and a p channel is formed. The mobility of holes in GaSb is Qa,
6. Since it is about 3 to 4 times larger than s, a high-speed p-channel HEMT is formed.

これらのnチャネル及びPチャネルのHEMTを用いて
低消費電力が可能な相補型のHEMTを作製すれば、G
aAs系に比較しても数倍のスピードが期待できる。ま
た、HEMTにとって重要な点は、電子走行層に散乱体
が非常に少ないことであるが、本発明のA 1zG a
 t−xs b、  I n A S 。
If a complementary HEMT with low power consumption is created using these n-channel and P-channel HEMTs, G
It can be expected to be several times faster than the aAs system. In addition, an important point for HEMT is that there are very few scatterers in the electron transport layer, but the A 1zG a of the present invention
t-xs b, I n A S .

GaSbは、格子定数が0.6%程度の違いしかないた
めに、格子欠陥が極めて少ないものが形成できる。従っ
て、トランジスタの各層をGaSb基板またはInA3
基板上にすべて形成することが可能となる。
GaSb has a difference in lattice constant of only about 0.6%, so it can be formed with extremely few lattice defects. Therefore, each layer of the transistor is formed on a GaSb substrate or an InA3 substrate.
It becomes possible to form everything on the substrate.

〔実施例〕〔Example〕

第1図に、本発明による相補型2次元電子ガス電界効果
トランジスタの層構造の一例を示す。その製造方法を述
べながら構成を説明する。
FIG. 1 shows an example of the layer structure of a complementary two-dimensional electron gas field effect transistor according to the present invention. The configuration will be explained while describing its manufacturing method.

基板7としては、GaSbまたはInAsを用いる。そ
の上に絶縁層6としてAn!、Ga、−、Sb(y=1
〜0.3)を3000人程度成長し、その後、pチャネ
ル層5としてGaSbを1000人、ゲート層4として
BeドープA I XG a l−X5 bを200人
As the substrate 7, GaSb or InAs is used. An! , Ga, -, Sb (y=1
~0.3) was grown for about 3,000 layers, and then 1,000 layers of GaSb were grown as the p-channel layer 5, and 200 layers of Be-doped AIXGal-X5b were formed as the gate layer 4.

絶縁層3としてA I!、G a +−ys b O’
 = 1〜0.3)を1000人、nチャネル層2とし
てInAsを1000人、ゲートNlとしてTeドープ
AIXGaI−xSb(x=1〜0.3)を200人、
順に分子線エピタキシャル法などにより成長する。
A I! as the insulating layer 3! , G a +−ys b O'
= 1 to 0.3) for 1000 people, InAs as the n-channel layer 2 for 1000 people, Te-doped AIXGaI-xSb (x = 1 to 0.3) as the gate Nl for 200 people,
The layers are grown sequentially by molecular beam epitaxial method or the like.

次に、pチャネルI(E M Tを作る部分を、エツチ
ングによってゲート層1.nチャネル層2.絶縁N3を
落とすことにより形成する。
Next, a portion for forming a p-channel I (EMT) is formed by removing the gate layer 1, n-channel layer 2, and insulation N3 by etching.

通常のHEMTの製造方法によって、ゲート層1および
nチャネル層2を用いてnチャネルHEMTを作成し、
ゲート層4およびpチャネル層5を用いてpチャネルH
EMTを作成する。なお図中、8はソースを、9はゲー
トを、10はドレインを示している。
An n-channel HEMT is created using a gate layer 1 and an n-channel layer 2 by a normal HEMT manufacturing method,
p channel H using gate layer 4 and p channel layer 5
Create an EMT. In the figure, 8 indicates a source, 9 indicates a gate, and 10 indicates a drain.

最後に、ゲート9を配線で結び、ドレイン10とソース
8間を配線することにより相補型のHEMTが作成でき
る。
Finally, by connecting the gate 9 with wiring and wiring between the drain 10 and source 8, a complementary HEMT can be created.

以上の実施例では、nチャネルHEMTが上側に、pチ
ャネルHEMTが下側に形成しているが・上下を逆にし
てもよいことは勿論である。
In the above embodiments, the n-channel HEMT is formed on the upper side and the p-channel HEMT is formed on the lower side; however, it goes without saying that the top and bottom may be reversed.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明による相補型電界効果トラ
ンジスタでは、pチャネルHEMTに対してはホール移
動度の大きなGaSbを−nnチャネルHEMT対して
は電子移動度の大きなInAsを用いているために、従
来の相補型HEMTに比べ数倍のスイッチング速度が得
られる。
As explained above, in the complementary field effect transistor according to the present invention, GaSb with high hole mobility is used for the p-channel HEMT, and InAs with high electron mobility is used for the -nn channel HEMT. A switching speed several times faster than conventional complementary HEMTs can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の相補型の2次元電子ガス電界効果ト
ランジスタの一実施例の層構造を示す図、第2図は、従
来のGaAsを用いたnチャネルHE M 70層構造
を示す図、 第3図は、従来のGaAsを用いたpチャネルHEMT
O層構造を示す図である。 1 ・ ・ ・ゲー)N (n−A ItxG a l
−X5 b)2・・・nチャネル層(InAS) 3・・・絶縁層(A j! yC; a +−yS b
 )4 ・ ・ ・ゲート層 (p −A lxG a
 +−xs b)5・・・pチャネル層(QaSb) 6・・・絶縁IJ (A j! 、G a +−yS 
b )7・・・基板(GarbまたはInAs)8・・
・ソース 9・・・ゲート 10・・・ドレイン 代理人 弁理士  岩 佐  義 幸 9ケート 第1図
FIG. 1 is a diagram showing a layer structure of an embodiment of a complementary two-dimensional electron gas field effect transistor of the present invention, and FIG. 2 is a diagram showing a conventional n-channel HE M 70 layer structure using GaAs. , Figure 3 shows a conventional p-channel HEMT using GaAs.
It is a figure showing an O layer structure. 1 ・ ・ ・Ge)N (n-A ItxG a l
-X5 b) 2...n channel layer (InAS) 3...insulating layer (A j! yC; a + -yS b)
)4 ・ ・ Gate layer (p −A lxG a
+-xs b) 5...p channel layer (QaSb) 6... insulation IJ (A j!, G a +-yS
b) 7... Substrate (Garb or InAs) 8...
・Source 9...Gate 10...Drain agent Patent attorney Yoshiyuki Iwasa 9 Kate Figure 1

Claims (1)

【特許請求の範囲】[Claims] (1)nチャネルトランジスタとpチャネルトランジス
タとを有する相補型2次元電子ガス電界効果トランジス
タにおいて、 前記nチャネルトランジスタは、Al_xGa_1_−
_xSbより成る電子供給層と、InAsより成る電子
走行層とを有し、 前記pチャネルトランジスタは、Al_xGa_1_−
_xSbより成るホール供給層と、GaSbより成るホ
ール走行層とを有することを特徴とする相補型2次元電
子ガス電界効果トランジスタ。
(1) In a complementary two-dimensional electron gas field effect transistor having an n-channel transistor and a p-channel transistor, the n-channel transistor is Al_xGa_1_-
The p-channel transistor has an electron supply layer made of _xSb and an electron transit layer made of InAs, and the p-channel transistor has an electron supply layer made of _xSb and an electron transit layer made of InAs.
A complementary two-dimensional electron gas field effect transistor characterized by having a hole supply layer made of _xSb and a hole transport layer made of GaSb.
JP8319688A 1988-04-06 1988-04-06 Complementary two-dimensional electron gas field-effect transistor Pending JPH01256175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8319688A JPH01256175A (en) 1988-04-06 1988-04-06 Complementary two-dimensional electron gas field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8319688A JPH01256175A (en) 1988-04-06 1988-04-06 Complementary two-dimensional electron gas field-effect transistor

Publications (1)

Publication Number Publication Date
JPH01256175A true JPH01256175A (en) 1989-10-12

Family

ID=13795573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8319688A Pending JPH01256175A (en) 1988-04-06 1988-04-06 Complementary two-dimensional electron gas field-effect transistor

Country Status (1)

Country Link
JP (1) JPH01256175A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0448981A2 (en) * 1990-03-06 1991-10-02 Fujitsu Limited High electron mobility transistor
US5302840A (en) * 1991-06-20 1994-04-12 Fujitsu Limited HEMT type semiconductor device having two semiconductor well layers
JPH06267993A (en) * 1993-03-12 1994-09-22 Nec Corp Quantum wire structure
US5940695A (en) * 1996-10-11 1999-08-17 Trw Inc. Gallium antimonide complementary HFET
WO2024116732A1 (en) * 2022-11-30 2024-06-06 株式会社ジャパンディスプレイ Semiconductor element

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0448981A2 (en) * 1990-03-06 1991-10-02 Fujitsu Limited High electron mobility transistor
US5144378A (en) * 1990-03-06 1992-09-01 Fujitsu Limited High electron mobility transistor
US5302840A (en) * 1991-06-20 1994-04-12 Fujitsu Limited HEMT type semiconductor device having two semiconductor well layers
JPH06267993A (en) * 1993-03-12 1994-09-22 Nec Corp Quantum wire structure
US5940695A (en) * 1996-10-11 1999-08-17 Trw Inc. Gallium antimonide complementary HFET
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