JPH01248527A - Treatment of semiconductor wafer - Google Patents

Abstract

PURPOSE:To allow highly efficient and accurate selective removal of a protective film such as a silicon oxide film covering the rear of a semiconductor wafer by attaching corrosion resistant plates to both sides of the semiconductor wafer interposing an unetched viscous composition therebetween, dipping the semiconductor wafer in an etching solution, and removing redundant part of the oxide film around the peripheral part of the semiconductor wafer. CONSTITUTION:A semiconductor wafer 2 has corrosion resistant plates 6 attached to both sides thereof after being wetted by an unetched solution or viscous substance such as water 4. The semiconductor wafer 2 sequentially has the corrosion resistant plates 6 attached after being wetted by water 4 so as to be formed into a laminate X with tens to hundreds of layers. The laminate X is clamped after being placed between a fixed support wall 8 and a movable clamping wall 10 of a clamping device Y and then is dipped into an etching solution W within a container H with the semiconductor wafers 2 and the corrosion resistant plates 6 completely in contact. Under this condition, and part of the semiconductor wafer 2 which is not in contact with the corrosion resistant plates 6, i.e., its peripheral part 12 is exposed to the etching solution W, whereby the oxide film on the peripheral part 12 can be removed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to the selective removal of a protective film such as a silicon oxide film coated on the back surface of a semiconductor single crystal substrate, especially a silicon wafer, for autodoping or other reasons. This invention relates to a high-precision, high-efficiency etching process.

(Conventional technology) Epitaxial technology is a method of continuously growing a single crystal layer on a semiconductor single crystal substrate along the crystal axis of the substrate, but in semiconductor device manufacturing technology using semiconductor silicon as a substrate, generally The mainstream is vapor-phase deposition through a chemical reaction in which epitaxial growth is performed from the vapor phase on a substrate single-crystal layer by thermal decomposition or hydrogen reduction of a volatile silicon compound. In order for a semiconductor silicon single crystal to function as a single element, for example, a transistor, it is essential to introduce p-type or n-type impurities to form a so-called pn junction.

There are various methods for introducing active impurities (referred to as doping) to form such a Pn junction into semiconductor silicon, and in particular, in the manufacturing process of semiconductor devices, thermal diffusion, ion plantation, and the method covered by the present invention are currently available. There is a technology called epitaxial technology. With these impurity introduction techniques, epitaxial technology can make the impurity concentration gradient steep, and double doping is not required when forming a junction, so it is possible to form a junction with a low doping level and a large difference in dopant a degree. It is an extremely important doping technique because it is easy to perform. As an example of actual application,
Semiconductor elements are formed on a single crystal substrate containing a high concentration of n-type or p-type impurities in order to lower the collector resistance in bipolar transistors, and to improve anti-ruff swelling characteristics and alpha-ray strength in MO3ICs. There is an epitaxial wafer in which a low concentration active layer is epitaxially grown.

There are three types of epitaxial wafer manufacturing equipment in general: horizontal, vertical, and barrel-type.The common principle is that first, a semiconductor silicon substrate is coated with dense SiC on the surface of a graphite plate called a susceptor. On the heating table!
! The temperature of the substrate is 900 to 12, depending on the conditions.
heated to oO°C and treated with monosilane or a compound substituted with halogen, primarily chlorine, e.g. S i HC1s
The substrate is brought into contact with a hydrogen mixed gas, and silicon atoms are deposited on the substrate by thermal decomposition or hydrogen reduction, thereby completing epitaxial growth.

It is necessary for the semiconductor silicon substrate to have at least one clean surface with a mirror finish, but what is more important is to process the peripheral edge into a tapered shape. The reason for this is that, especially during epitaxial growth, if there is no chamfering at the peripheral edge of the substrate, the single crystal will grow abnormally quickly and become significantly higher than the main surface of the epitaxial growth, making it difficult to manufacture semiconductor devices. It makes precise patterning impossible in the photolithography process (this abnormal growth is called a crown).

Such crown prevention is currently solved by appropriately sagging the angle and width of the chamfer, as well as the vicinity of the boundary between the main surface and the chamfer, during mirror polishing, and creating a transition with a gentle curvature.

In addition, there are two other important problems associated with epitaxial growth techniques that have not yet been completely resolved. One of these is called autodoping, in which the epitaxially grown substrate is doped at a significantly high concentration, e.g., at an impurity concentration level of 10'' to 10'' atoms/cj, into the epitaxially grown layer (typically at a low concentration level of 1014 atoms/ci). The impurity of the substrate is doped and the dopant level of the epitaxial layer changes and becomes non-uniform, and the level of KTh in the epitaxial layer, especially near the interface between the substrate and the epitaxial layer, reaches the low level of the initial epitaxial layer. of epitaxial layers are wasted. This autodoping phenomenon is due to thermal diffusion from the substrate, but is mainly due to reaction with reactive gas from the substrate, especially the side and back surfaces that are not covered with the epitaxial layer.
This is done by being delivered to the substrate surface as a gaseous dopant. For this reason, for example, Japanese Patent Application Laid-Open No. 58-9581
No. 9 proposes forming a silicon oxide film on the back surface of a semiconductor silicon epitaxial growth substrate and covering the back surface with a protective film. Although this method is certainly effective, it is not perfect. Since the inventor does not accurately understand the autodoping phenomenon, it is difficult to cover the chamfered portion with a protective film, which is a particular problem with autodoping. Not paying attention to the importance.

Yet another technical problem with epitaxial growth is that in order to effectively prevent autodoping, the main plane of the back surface is chamfered and the edges are coated with a silicon oxide film in accordance with the proposal of the above-mentioned Japanese Patent Application Laid-open No. 58-95819. When coated, no problem occurs because the flat part of the back surface is usually in contact with the susceptor, but lump-like protrusions (hereinafter referred to as nodules) made of polycrystalline silicon may form on the silicon oxide crotch at the chamfer and end. This occurs and falls off during the semiconductor device manufacturing process, and its minute fragments adhere to the surface of the epitaxial wafer, damaging the exposure mask, causing pinholes in the oxide film, poor patterning of the oxide film, and deposited metal. This can cause various problems such as disconnection of wiring.

FIG. 14 is a photograph showing the nodule. This is mainly an epitaxial wafer, and is a photograph showing an enlarged view of nodules N generated on a part of the surface chamfered portion 2b, the end side surface portion 2c, and the back surface chamfered portion 2e of the silicon substrate 2. This silicon substrate 2 is an example in which a silicon oxide film is present at the outer circumferential edge of the surface chamfered portion 2b, the side surface portion 2c of the same end, and the back chamfered portion 2e, and epitaxial growth is performed on the surface of the silicon substrate 2.

FIG. 15 is a drawing schematically showing the state of nodule generation and the cross-sectional structure of the epitaxial wafer. In the figure, 1llF oxide is formed as a protective film on the back surface 2D (principal surface 2d and chamfered portion 2e) of the silicon substrate 2. The epitaxial growth layer E becomes slightly thick at the boundary between the chamfered portion 2b of the surface 2A of the silicon substrate 2 and the main surface 2a, but in extreme cases, this is called a crown, and in the same figure, the symbol C is the crown.

When the silicon oxide protective film F is deposited on the back surface 2D (2d and 2e) of the silicon substrate 2, and on the surface 2A (2a
Also when epitaxially growing the silicon layer E in 2b), it is important to control these deposited layers to predetermined locations. However, according to the prior art, there are no proposals regarding these. That is, if the protective film F is limited to the back main surface 2d and the chamfered portion 2e, and the epitaxial growth layer E is limited to the front main surface 2a and the chamfered portion 2b, the nodules N
It is possible to simultaneously suppress the occurrence of autodoping and the autodoping phenomenon. For example, in Japanese Patent Laid-Open No. 59-500951, a recess is provided for inserting and supporting a silicon substrate on a susceptor, but the bottom surface of this recess forms a part of a spherical surface, so that uniform heating of the silicon substrate is attempted. However, it does not disclose any technical means to solve the above-mentioned drawbacks.

As described above, no solution has been proposed in the past as a method for preventing autodoping and not generating nodules. For this reason, it has been necessary to accept low-efficiency work in order to allow auto-dovigation or to mechanically remove the generated nodules.

(Problems to be Solved by the Invention) The present invention provides a highly efficient and highly accurate selective removal etching method for a protective film such as a silicon oxide film coated on the back surface of a semiconductor single crystal substrate, particularly a silicon wafer. After carrying out the method, the surface of the silicon wafer is mechanically and chemically polished to a mirror finish, and epitaxial growth is performed to prevent autodoping, which is mainly caused by the transfer of chemical species from the back side, and to selectively remove the protective film on the back side. An object of the present invention is to provide a semiconductor wafer processing method that prevents the generation of nodules due to abnormal growth of the protective crotch when such processing is not performed, and a preferable jig used to carry out this method.

(Means for Solving the Problems) In order to achieve the above object, in the present invention, corrosion-resistant plates are brought into close contact with both sides of a semiconductor wafer with a non-etching liquid interposed therebetween, and the plate is immersed in an etching liquid. hand,
This removes unnecessary silicon oxide film from the peripheral edge of the semiconductor wafer. Since the silicon oxide film is formed by chemical vapor deposition, the outer peripheral shape of the corrosion-resistant plate changes depending on the presence or absence of the silicon oxide film on the main surface of the semiconductor wafer facing the corrosion-resistant plate. Taking a silicon wafer as an example of a semiconductor wafer, the periphery of this silicon wafer is naturally tapered to form a tapered part (referred to as a chamfered part), and the silicon oxide film is formed on the main surface chamfered part on one side and on the end side surface part. Therefore, in the present invention, the silicon oxide film deposited on the end side surface portion is to be removed, and in some cases, the silicon oxide film on the back chamfered portion is to be removed.

The corrosion-resistant plate is preferably made of an elastic body, and the material used is soft vinyl chloride resin, fluororesin, or the like.

Due to the need for selective removal of the silicon oxide coating as described above, the shape of the end portion is such that when facing the silicon oxide coating surface of the silicon wafer, there is an annular protrusion on the main surface near the outer periphery. In order to press and cover the chamfered portion, or in some cases to press and cover only the main surface portion, the position of the annular projection is displaced toward the center, leaving a part of the outer circumference. Preferably, the outer peripheral edge of the corrosion-resistant plate on the surface not coated with silicon oxide is processed in a tapered or stepped manner so that the surface is separated from the silicon wafer.

The etching solution used may be approximately 15 to 20% (by weight) of hydrofluoric acid, but it goes without saying that the concentration may be changed as appropriate depending on the processing time and processing temperature.

The non-etching viscous material is used to improve the adhesion between the semiconductor wafer and the corrosion-resistant plate, and to prevent the corrosive liquid from proceeding with unnecessary corrosion.Water is sufficient; CMC or starch may be added to the material. Considering the subsequent steps, hydrophilicity is preferable.

Furthermore, in the present invention, in order to remove the above-mentioned silicon oxide film with high efficiency, a jig is provided for forming a laminate by sequentially bringing a semiconductor wafer and a corrosion-resistant plate into close contact with each other with a non-etching viscous material interposed therebetween. It is preferable to use a semi-cylindrical main body, which has a flat part at the bottom corresponding to the orientation flat part of the semiconductor wafer, and has an inner diameter that partially corresponds to the outer diameter of the semiconductor wafer; It has a pair of support pillars provided at one end with a gap in between.

It is also preferable to use a tightening device that tightens the laminate and immerses it in the etching solution. This tightening device includes a side U-shaped main body consisting of a lower arm, an upper arm, and a connecting part that connects the base ends of the lower and upper arms, and a fixed support wall provided at the tip of the lower arm. , a fastener attached to the distal end of the upper arm so as to be movable up and down and having a movable pressing wall provided at the distal end.

(Function) Since silicon oxide coating on silicon wafers is usually carried out by chemical vapor deposition, a film is mainly formed on one side, and almost no film is formed on the opposite side. In order to prevent this from occurring during epitaxial growth, it is preferable that the silicon oxide film F is provided only on at least the main surface 2d of the back surface 2D of the silicon wafer 2, and in some cases only on the back chamfered portion 2e. Therefore, after the silicon oxide film F is formed, the silicon oxide film is selectively removed from the silicon wafer 2 at the outer edge surface 2c of the silicon wafer 2 or, in addition, at the back chamfer 2e. . There is no need to remove the main surface of the silicon oxide film F, and no silicon oxide coating F is formed on the opposite surface. Surfaces 2a and 2d are completely unobjected and must be prevented from contacting the etching liquid by a suitable cover. Therefore, as in the present invention, it is necessary to alternately stack the silicon wafers 2 through corrosion-resistant plates 6, preferably elastic ones, and press them together by applying pressure. If hydrofluoric acid is used as an etching solution for silicon wafers on the surface without a silicon oxide film, the silicon itself will not be corroded, so if the protective films of the silicon wafers are overlapped when stacking the wafers, Two silicon wafers may be placed with a corrosion-resistant plate interposed between them, but direct pressure contact between the silicon wafers should be avoided as this often causes scratches or damage.

Therefore, if the orientation of the silicon wafers is regularized and the protective films of the silicon wafers are arranged so that they do not face each other,
If a corrosion-resistant plate is interposed between silicon wafers, the structure of the outer periphery of the corrosion-resistant plate needs to be different in order to have different effects. That is, a substantially annular protrusion integrally formed on the surface of the corrosion-resistant plate is formed near the outer peripheral edge facing the protective film, and this protrusion portion is formed on the chamfered portion of the silicon wafer or on the main surface as necessary. The area adjacent to the chamfer is specially and intensively crimped to completely prevent etching liquid from entering.

In addition, regarding the outer diameter size and shape of the corrosion-resistant plate, (1) First, it is preferable that the same size as the silicon wafer. Although this does not necessarily have to be strictly followed, if the effects of the annular protrusion and step at the outer peripheral end mentioned above are taken into account, it is necessary that they be approximately equal. In addition, when stacking and press-bonding silicon wafers, it is possible to use an appropriate jig in order to arrange them accurately, but for this purpose, the work will be most efficient if the outer diameter dimensions are the same. (2) Furthermore, a taper is also possible instead of the step. (2) In order to strengthen the crimping effect of the corrosion-resistant plate, it is preferable that when the central part is hollowed and crimped, the pressure is concentrated on the corrosion-resistant plate.

In the method of the present invention, a corrosion-resistant plate is attached to both sides of a semiconductor wafer through a non-etching liquid or a viscous material, but in reality, a large number of semiconductor wafers, from tens to hundreds, are attached one after another. The final adhesion state is achieved by bringing the corrosion-resistant plate into close contact with the semiconductor wafer and compressing the laminate of the corrosion-resistant plate from both directions. The alignment jig for creating this laminate and the jig for pressing and tightening the laminate did not previously exist and were newly invented.

More specifically, the main body has a semi-cylindrical main part that has a flat part at the bottom that corresponds to the orientation flat part of the semiconductor wafer and has an inner diameter that matches the outer diameter of the semiconductor wafer, and a gap at one end of the main part. An alignment jig having a pair of support columns provided therebetween is used when creating a laminate of a semiconductor tool and a corrosion-resistant plate.

The device for tightening the stack of semiconductor wafers and corrosion-resistant plates includes a side U-shaped main body portion consisting of a lower arm, an upper arm, and a connecting portion connecting the base ends of the lower and upper arms, and the lower portion. It has a fixed support wall provided at the tip of the arm, and a fastener that is attached to the tip of the upper arm so as to be movable up and down and has a movable pressing wall at the tip. A laminate is used that can be placed between a fixed support wall and a movable pressing wall and tightened.

By using the above-mentioned etching removal means, the oxide film formed on the peripheral edge of the semiconductor wafer can be easily etched away from a large number of semiconductor wafers at once, and it is possible to remove the oxide film in the most preferable form. Semiconductor wafers can be manufactured. That is, it is possible to manufacture a semiconductor wafer in which the main back surface and the back chamfered surface of the semiconductor wafer are covered with an oxide film.

The principle of the method of the present invention is of course to selectively remove not only oxide films but also other protective films, such as silicon nitride films, nitrogen- or oxygen-doped polycrystalline films, or combinations thereof, as well as selective etching removal of semiconductor wafers. It can also be applied to chamfering, so-called sag etching. That is, corrosion-resistant plates are brought into close contact with both sides of a semiconductor wafer with a non-etching liquid or viscous material interposed therebetween, and the plates are immersed in an etching solution to remove the peripheral corners of the semiconductor wafer. It can also be applied to a semiconductor wafer processing method characterized by: In this case, the etching solution used is fluoronitric acid, as is well known.

(Example) Examples of the present invention will be described below based on FIGS. 1 to 13 of the accompanying drawings.

FIG. 1 is an explanatory diagram showing the state of implementation of the method of the present invention.

In the figure, 2 is a semiconductor wafer, both surfaces of which are wetted with a non-etching liquid or viscous material, such as water 4, and then brought into close contact with corrosion-resistant Fi 6. Each semiconductor wafer 2 is sequentially wetted with water 4 and brought into close contact with a corrosion-resistant plate 6,
Eventually, the laminate X will consist of several tens to hundreds of sheets. The laminate X is placed and tightened between a fixed support wall 8 and a movable pressing wall 10 of a tightening device Y, which will be described later, and the container H is placed in a state where the semiconductor wafer 2 and the corrosion-resistant plate 6 are in complete contact with each other.
The substrate is immersed in an etching solution W (hydrofluoric acid is used to remove the oxide film by etching). In this state, the portion of the semiconductor wafer 2 that is not in close contact with the corrosion-resistant plate 6, that is, the peripheral portion 12, is exposed in the etching solution W. The oxide film F on all or part of the 2C1 front chamfered part 2b and all or part of the back chamfered part 2e will be removed by etching. On the other hand, the oxide film F on the portion of the semiconductor wafer 2 that is in close contact with the corrosion-resistant plate 6 does not come into contact with the etching solution W, and therefore remains as it is. In this way, the unnecessary oxide film on the peripheral edge 12 of the semiconductor wafer 2 is removed.

The shapes of the corrosion-resistant plate 6 used in the method of the present invention include the following. (2) A corrosion-resistant plate 6a (FIG. 2) having the same side surface shape as a semiconductor wafer is the most common. In this case, when arranging the semiconductor wafers and the corrosion-resistant plates, it is necessary to align the orientation flat portions, and a special jig for arranging, which will be described later, is used. ■ Regarding the shape of the surface of the corrosion-resistant plate facing the side of the silicon wafer on which the silicon oxide film is not deposited and the shape of its outer periphery, a tapered portion U is provided around the entire periphery of the corrosion-resistant plate 6b ( (Fig. 3) may also be used. With this shape, the etching liquid can easily enter the periphery of the semiconductor wafer, and the non-etching liquid can be prevented from accumulating on the periphery of the semiconductor wafer, allowing for good etching. ■It is also possible to use 6c (Fig. 4), which has a step T around the entire circumference of the corrosion-resistant plate. This has the same effect as the above item (2). In FIGS. 3 and 4, the trouble of depositing the silicon oxide film on the silicon wafer 2 is explained by using the corrosion-resistant plate 6e as described later.
Alternatively, a shape of 6r may be adopted, and a shape with a tapered portion U or a step may be similarly adopted, but this is shown only by dotted lines in the drawing. (2) A so-called donut-shaped plate 6d (Fig. 5) in which an opening is formed in the center of a corrosion-resistant plate is preferable for another purpose. In this case,
When tightened using a tightening jig, which will be described later, the tightening effect is greater and the penetration of etching liquid is reduced accordingly. ■An annular (more precisely, the orientation flat part is linear) protrusion 11a or l on the outer peripheral edge of the silicon wafer of the corrosion-resistant plate facing the side on which the silicon oxide film is deposited.
6e or 6rC with lb Figure 6 (a) and (b)
) is preferred. With this shape, the oxide film F on the back main surface 2d of the silicon substrate 2 is not etched at all, and the back chamfer 2e is also not etched at all when the corrosion-resistant plate 6e is used, leaving the exposed silicon wafer. Since only the unnecessary oxide film F on the end side surface 2C of 2 is etched, the etching removal area of the oxide film can be changed freely. The shapes of the corrosion-resistant plates 6b and 6c described above are combined with the corrosion-resistant plates 5e and 5f to form both surfaces and the outer peripheral edge of the corrosion-resistant plates. Corrosion resistant plate 6
The shape b can be used in any combination thereof. (2) Furthermore, by providing elasticity to the corrosion-resistant plate 6, the semiconductor wafer 2 can be suitably covered by the elastically deformed portion 13 at the peripheral edge of the corrosion-resistant plate 6, as shown in FIG. 7, for example.

A preferred embodiment of etching removal of the silicon oxide film F will be described below.

FIG. 8 schematically shows a state in which silicon wafers 2 on which a silicon oxide film F has been deposited are stacked with a corrosion-resistant plate 6 interposed therebetween before pressurization. In this case, only the silicon oxide film F on the end side surface 2C of the silicon wafer 2 is removed, and an annular protrusion 11a is integrally formed on one surface near the outer peripheral edge of the corrosion-resistant plate 6, and on the opposite side. There is a step, and the chamfered part 2b (the side without the silicon oxide film F) is opened in a wider space. The corrosion-resistant plate 6 used in this example is made by combining the shapes of the corrosion-resistant plates 6e and 60 described above.

FIG. 9 shows a state in which pressure is applied from the state shown in FIG. 8, in which the outer annular protrusion 11a of the corrosion-resistant plate 6 is crushed and the chamfered portion 2e of the silicon wafer 2 (the side with the M silicon oxide film F) It shows that it is in complete contact with the As it is, immerse it in an etching solution such as a 20% hydrofluoric acid aqueous solution at room temperature.
After about 0 minutes of immersion, the silicon oxide film F on the end side surface 2C is completely removed. The silicon wafer 2 in this state was
As shown in the figure.

The surface on which the silicon oxide film is not attached is left as it is or is finished to a mirror surface by mechanical chemical polishing, and evixaxial growth is performed.

Normally, in epitaxial growth, nodules N are generated mainly on the end side surface portion 2C, and if a susceptor having an appropriately shaped recess is used, nodules N will not be generated on the back surface. Removal of F is rarely required, but if necessary, the shape of the outer peripheral edge of the corrosion-resistant plate 6 may be devised so that the silicon oxide film on the back chamfered portion 2e can be removed. As mentioned above, the step may be provided on the corrosion-resistant plate 6 by actively bringing it into contact with the etching solution.

During lamination, between the corrosion-resistant plate 6 and the silicon wafer 2, a hydrophilic non-etching liquid or viscous material 4 such as water or a mixture of CMC and starch is interposed between the corrosion-resistant plate 6 and the silicon wafer 2. In cooperation with the elasticity of No. 6, it is possible to completely prevent the etching liquid W from entering and selectively remove the silicon oxide film F with precision.

FIG. 11 is an exploded perspective view showing the alignment jig 14 for creating the laminate X of the semiconductor wafer 2 and the corrosion-resistant plate 6a. The alignment jig 14 has a semi-cylindrical main body 18 which has a flat part 16 at the bottom corresponding to the orientation flat part of the semiconductor wafer 2 and has an inner diameter that matches the outer diameter of the semiconductor wafer 2.
have. A pair of support columns 22 and 22 are provided upright at one end of the main body portion 18 with a gap 20 in between. The laminate X is easily formed by sequentially stacking a corrosion-resistant plate 6 wetted with a non-etching viscous material such as water 4 and a semiconductor wafer 2 on the semi-cylindrical main body 18 from the support column 22 side while aligning them. can be formed into

Further, a laminate X of the semiconductor wafer 2 and the corrosion-resistant plate 6
As shown in FIG. 12, the device Y for tightening has a U-shaped main body portion consisting of a lower arm 26, an upper arm 28, and a connecting portion 30 connecting the base ends of the lower arm 26 and the upper arm 2. 32, a fixed support wall 8 provided at the tip of the lower arm 26, and a fastener 34 attached to the tip of the upper arm 28 so as to be movable up and down and having a movable pressing wall lO at the tip. The one with the following is used. The laminate X of the semiconductor wafer 2 and the corrosion-resistant plate 6 is placed between the fixed support wall 8 and the movable pressing wall 10 of the clamping device Y, and is clamped by lowering the movable pressing wall 10. . As a means for vertically movably attaching the fastener 34 to the upper arm 28, any known means may be used. For example, a screw hole may be provided in the upper arm 28, and a screw may be inserted into the screw hole on the side surface of the fastener 34. What is necessary is to form a groove and screw it in so that it can move up and down. In this case, it goes without saying that the movable pressing walls 10 are movably attached to each other so that the fastener 34 can rotate. In addition,
Reference numeral 36 denotes a guide, the distal end of which is connected to the movable pressing wall 10. Also, a guide plate 36 is slidably fitted into the connecting portion 30 of the main body portion 32 at the base end of the guide plate 36. A concave groove portion 38 is provided.Therefore, the movable pressing wall 10
When the movable pressing wall 10 is moved up and down, the guide plate 36 also moves up and down along the connecting portion 30, and the movement of the movable pressing wall 10 is accurately guided in the vertical direction.

By using the above-mentioned etching removal means, the oxide film on the back surface 2D of the semiconductor wafer can be selectively etched away, so that it is possible to manufacture a semiconductor wafer having an oxide film in the most preferable form. That is, as shown in FIGS. 13(a) and (b), the semiconductor wafer 2
A semiconductor wafer 2 in which all or part of the back main plane 2'd and the back chamfer 2e are covered with an oxide film F.
of! ! ! It is something that can be built.

Further, the technical idea of the method of the present invention is that in addition to the selective etching removal of not only oxide films but also other protective films such as silicon nitride films, nitrogen- or oxygen-doped polycrystalline films, or combinations thereof, semiconductor wafers can also be etched. It can also be applied to chamfering, so-called sag etching. That is, corrosion-resistant plates are brought into close contact with both sides of a semiconductor wafer with a non-etching viscous material interposed therebetween, and the plates are brought into contact with, for example, immersed in, an etching solution to remove the corners of the periphery of the semiconductor wafer. However, since the concrete implementation situation is between the state shown in FIG. 1 and the road, the explanation using the drawings will be omitted. In this case, hydrofluoric acid is used as the etching solution instead of hydrofluoric acid.

(Effects of the Invention) As described above, according to the present invention, the area and shape of the silicon oxide protective film produced by the CVD method can be precisely controlled efficiently and freely by simple means. This makes it possible to selectively remove silicon oxide by etching, and therefore, during epitaxial growth, not only autodoping but also silicon oxide retention can be achieved.
This can be highly effective in manufacturing a silicon substrate that can prevent the occurrence of abnormal vapor phase growth nodules of silicon on the crotch.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram showing one embodiment of the method of the present invention, and FIG.
6 to 6 are explanatory diagrams showing deformation of the shape of a corrosion-resistant plate that can be used in the method of the present invention, and FIGS. 7 and 8 are pressurized examples of a laminated state of a silicon wafer and a corrosion-resistant plate. A schematic explanatory diagram showing the previous state, FIG. 9 is a schematic explanatory diagram showing the state in which the laminated body in the state of FIG. 8 is pressed, and FIG. 11 is a perspective view showing an example of an alignment jig used in the method of the present invention; FIG. 12 is a perspective view showing an example of a tightening device used in the method of the present invention; FIG. 13 (a) (
b) is a cross-sectional explanatory diagram of a semiconductor wafer having a preferable oxide film that can be manufactured according to the present invention, FIG. 14 is a photograph substituted for a drawing showing an enlarged view of the state of nodule generation on a silicon substrate, and FIG. 15 is a cross-sectional diagram of an epitaxial wafer. It is a drawing schematically shown. 2...-Semiconductor wafer, silicon wafer, silicon substrate, epitaxial wafer, 2A--Semiconductor wafer surface, 2D...-Back surface to semiconductor sea urchin, 2a-
・-Surface main surface to semiconductor urchin, 2b--Surface chamfer to semiconductor urchin, 2C--End side surface of semiconductor wafer, 2d--Rear main surface of semiconductor wafer, 2e--
Chamfered back surface of semiconductor wafer, 4--Non-etching viscous material, 6, 6a to 6f, corrosion-resistant plate, 8--
- Fixed support wall, 10 - Movable pressing wall, 12 - Semiconductor wafer periphery, 14 - Alignment jig, X - Laminated body, Y - Tightening device, F - Silicon oxide coating. Patent applicant: Shin-Etsu Semiconductor Co., Ltd. Naoetsu Electronics Co., Ltd. ) Figure 15 Figure 14 Procedural Order Form (Method) 1. Indication of the case Japanese Patent Application No. 63-075387 2. Title of the invention Semiconductor wafer processing method 3. Relationship with the amendment person case Patent applicant Name: Shin-Etsu Semiconductor Co., Ltd. Name: Naoetsu Electronics Industry Co., Ltd. 4, Agent address: 1-4-26-6 Takanawa, Minato-ku, Tokyo 108 Number of inventions to be increased by amendment No increase: 7, subject of amendment
Specification (Detailed Description of the Invention) and Drawing 8, Contents of Amendment (1) Specification, page 8, line 17 to page 9, line 5, “1st
Figure 4 shows an example of what was done. ” to be deleted. (2) In the specification, “Figure 15” on page 9, line 6 is replaced with “Figure 14.”
"Fig." is corrected. (3) Specification, page 10, line 5, “Unexamined Japanese Patent Publication No. 59-500
951 Publication" is corrected to "Japanese Unexamined Patent Publication No. 59-50095." (4) Specification, page 29, lines 16 to 17, “, 1
(5) In the specification, page 29, lines 17 to 18, "Figure 15" is replaced with "Figure 1.
Figure 4” is corrected. (6) Figure 14 will be deleted from the attached drawings. (7) In the attached drawings, Figure 15 is corrected to Figure 14.

Claims (1)

[Claims] (1) Corrosion-resistant plates are brought into close contact with both sides of a semiconductor wafer with a non-etching viscous material interposed therebetween, and the plate is immersed in an etching solution to remove unnecessary oxide film from the peripheral edge of the semiconductor wafer. 1. A method for processing a semiconductor wafer, characterized in that: (2) A corrosion-resistant plate used in the method for processing a semiconductor wafer according to claim (1), characterized in that the outer circumference of the semiconductor wafer and its main surface have the same shape. (3) The corrosion-resistant plate according to claim (2), characterized in that a tapered portion is provided on at least one main surface of the entire circumference of the peripheral portion. (4) The corrosion-resistant plate (5) according to claim (2), characterized in that a step is provided on at least one main surface of the entire peripheral side surface.
) The corrosion-resistant plate according to claim 2, characterized in that an opening is formed in the central portion. (6) Claim (2) characterized in that an annular projection is integrally formed on at least one main surface near the outer periphery.
Corrosion resistant board as described. (7) The semiconductor wafer and its main surface have the same outer periphery, an opening is formed in the center, and an annular protrusion is integrally formed on one main surface near the outer periphery end; A corrosion-resistant plate having the structure of 3) or (4) provided all around the periphery of the other main surface is brought into close contact with both sides of the semiconductor wafer with a non-etching viscous material interposed therebetween, and the plate is immersed in an etching solution. A semiconductor wafer processing method in which an unnecessary oxide film on the peripheral edge of the semiconductor wafer is removed. (8) A semi-cylindrical main body part having a flat part corresponding to the orientation flat part of the semiconductor wafer at the bottom and having an inner diameter that matches the outer diameter of the semiconductor wafer; and a pair of support pillars, so that a semiconductor wafer and the corrosion-resistant plate according to claim (2) can be successively brought into close contact with each other with a non-etching liquid interposed therebetween to form a laminate. Alignment jig for laminating semiconductor wafers and corrosion-resistant plates. (9) a side U-shaped main body portion comprising a lower arm, an upper arm, and a connecting portion connecting the base ends of the lower and upper arms; a fixed support wall provided at the tip of the lower arm;
A fastener is attached to the tip of the upper arm so as to be movable up and down and has a movable pressing wall at the tip, and the clamping device is provided with a laminate of a semiconductor wafer and a corrosion-resistant plate between the fixing support wall and the movable pressing wall. A tightening device that can be placed on and tightened. (10) Corrosion-resistant plates are brought into close contact with both sides of a semiconductor wafer through a non-etching viscous material, and the edges of the semiconductor wafer are removed by contacting the etching solution. Characteristic semiconductor wafer processing method.