JP2009158504A - Apparatus for manufacturing semiconductor and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an apparatus for manufacturing a semiconductor that selectively forms an optional film on one surface of a substrate, and to provide a method of manufacturing a semiconductor device using the same. <P>SOLUTION: Gas is supplied from plates 102 and 103 provided at upper and lower gas inlets in a hot-wall heating type process chamber 105, and while a wafer-like substrate 101 is kept floating, a film is formed only on its backside. Inert gas is always applied onto the upper surface side of the substrate 101, and two kinds of material gases are alternatively supplied to the backside side. Thus, the material gases adsorbed to the substrate 101 are reacted with each other on the backside of the substrate 101 so as to form a film thereon. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor manufacturing apparatus used for manufacturing a semiconductor device, and a semiconductor device manufacturing method using the semiconductor manufacturing apparatus.

  The warpage of the semiconductor substrate due to the internal stress of the insulating film or metal film that forms the semiconductor element causes defects such as pattern formation defects and cracks. Therefore, a stress compensation film was previously formed to eliminate the warpage of the substrate. Technology has been used (see Patent Document 1).

  On the other hand, in recent years, with increasing performance of semiconductor elements, strained Si that applies mechanical force (stress) to the Si (silicon) lattice, improves the mobility of electrons and holes, and speeds up the semiconductor device. Technology is actively used.

For example, DSL (Dual Stress Liner) technology moves electrons or holes by changing the internal stress of a silicon nitride film used as an etching stopper when forming contact holes for connecting transistor elements to wirings, etc. It is a technology that improves the degree. Specifically, a silicon nitride film that applies tensile stress to the channel is formed on the n-channel MOS transistor, and a silicon nitride film that applies compressive stress to the channel is formed on the p-channel MOS transistor. In addition, the performance of the p-channel MOS transistor can be improved (see Patent Document 2). As one of the DSL technologies, a strain memory technology called SMT (Stress Memorized Technology) has been proposed. In this method, after a gate electrode is formed, a film having a large thermal expansion coefficient is formed on the substrate, and stress is applied to the substrate by applying a heat treatment at a temperature higher than the film forming temperature. By applying heat treatment, impurities such as carbon and hydrogen are removed from the film and the film shrinks, and the substrate is held in a bent state even when the temperature is returned to room temperature. Thereby, the mobility of electrons can be improved.
Japanese Patent Laid-Open No. 11-153788 JP 2003-060076 A

  In the DSL technology, the stress applied to the channel of the transistor increases as the film thickness of the silicon nitride film increases. However, in recent years, the transistor pitch becomes narrower with the miniaturization of the element, and the film thickness of the silicon nitride film becomes 10%. It can only be about ˜50 nm. For this reason, it has become difficult to apply a large stress to the channel as the transistor becomes finer.

  Even in the SMT technology, if a higher temperature heat treatment is applied after the stress application film is formed, or if a film having a stress in the reverse direction is formed later, the stress applied to the channel is relieved and the electron mobility is improved. There was a case that could not be.

  Further, in the process of forming the wiring of the semiconductor device, contamination of the wiring metal may permeate from the back surface, which may deteriorate the characteristics of the transistor formed on the top surface of the substrate. Conventionally, in a vertical heat treatment apparatus capable of processing a plurality of wafers when forming a transistor, a silicon nitride film is formed on the upper surface and the back surface of a semiconductor substrate, and then processing such as etching is performed on the upper surface and the back surface is processed. Left the silicon nitride film until the end of the wiring process to protect the semiconductor substrate from copper and aluminum contamination. However, with the miniaturization of transistors and the lowering of the manufacturing process, the silicon nitride film has become thinner and the cleaning resistance has deteriorated. Furthermore, the number of times of cleaning for removing the metal formed on the back surface of the substrate has increased due to the multilayered wiring. Since it increases compared to the conventional case, the problem of metal contamination from the back surface is likely to occur.

  The present invention provides a method for improving carrier mobility by applying appropriate stress to a channel even when transistor miniaturization advances, or prevents metal contamination from the back surface of a substrate in a wiring process. It aims to provide a method. Moreover, it aims at providing the semiconductor manufacturing apparatus for implement | achieving these methods collectively.

In order to achieve the above object, in the semiconductor manufacturing apparatus according to the present invention, the first supply port that supplies the source gas to the upper portion or the lower portion supplies the inert gas to a position facing the first supply port. The second supply port includes an exhaust port provided at an arbitrary position, and includes a process chamber for forming a film on the substrate, and a heater installed on the outer periphery of the side wall of the process chamber,
While supplying the source gas to one main surface of the substrate and supplying the inert gas to the other main surface of the substrate, while holding the substrate in a floating state, on the one main surface And forming the film.

  According to this configuration, since the film is formed in a state where the substrate is floated, the surface on which the semiconductor element is formed is less likely to be damaged when the film is selectively grown on the back surface as compared with the conventional semiconductor manufacturing apparatus. It is possible to form a uniform film.

  The first method for manufacturing a semiconductor device of the present invention includes a step (a) of preparing a substrate, a step (b) of forming a MOS transistor on the upper surface of the substrate, and a compressive stress on the rear surface of the substrate. Or a step (c) of forming a stress applying film having a tensile stress.

  According to this method, since the entire substrate can be warped in a concave shape or a convex shape by the stress application film formed on the back surface of the substrate, the miniaturization of the semiconductor element advances, and the liner film on the top surface of the substrate is thinned. However, it is possible to apply a sufficient amount of strain to the transistor channel to improve the mobility of the transistor.

  When forming the stress application film, the semiconductor manufacturing apparatus of the present invention is preferably used. However, when the semiconductor manufacturing apparatus of the present invention is used, since the diameter of the gas supply port is relatively small in order to float the substrate, when there are two or more kinds of source gases, different source gases are alternately supplied to the substrate. It is preferable to do.

  The second method for manufacturing a semiconductor device of the present invention includes a step (a) of preparing a substrate, a step (b) of forming a MOS transistor on the upper surface of the substrate, and a first metal on the rear surface of the substrate. A step (c) of forming a contamination preventing film and a step (d) of forming a metal wiring above the MOS transistor after the step (c) are provided.

  According to this method, the metal contamination prevention film can be selectively formed on the back surface of the substrate as appropriate before or during the wiring process, so that the semiconductor substrate can be prevented from being contaminated with metal or the like from the back surface side.

  According to the semiconductor manufacturing apparatus of the present invention, a film having a uniform thickness can be selectively formed on one surface of the substrate without damaging the other surface. A stress application film having a stress opposite to the stress to be applied to the film is formed on the back surface, and a large stress can be applied to the channel regardless of the miniaturization of the pattern. Further, if this semiconductor manufacturing apparatus is used, a metal contamination prevention film can be selectively formed on the back surface of the substrate in a desired process, so that it is possible to suppress deterioration of the performance of the element due to metal contamination.

(First embodiment)
Hereinafter, a semiconductor manufacturing apparatus according to a first embodiment of the present invention and a semiconductor device manufacturing method using the same will be described with reference to the drawings.

  FIG. 1 is a diagram showing a structure of a main part of a film forming apparatus (semiconductor manufacturing apparatus) according to the first embodiment of the present invention. The film forming apparatus shown in FIG. 1 is a “single-wafer type” film forming apparatus that processes wafers one by one.

  As shown in FIG. 1, the semiconductor manufacturing apparatus according to the present embodiment is provided with a source gas supply port, an inert gas supply port, and an exhaust port 106, and is composed of a quartz tube or the like. A process chamber 105 for forming a film; a first gas supply plate 103 for supplying a source gas to the first main surface of the substrate 101; and a supply of an inert gas. A second gas supply plate 102 that is installed in the mouth and supplies an inert gas to the second main surface of the substrate 101 and a tape heater 104 installed on the outer periphery of the side wall of the process chamber 110 are provided. When a plurality of source gases are used, the plurality of source gases are supplied into the process chamber 105 from the same supply port.

  In the example of FIG. 1, the source gas supply port is provided in the lower part of the process chamber 105 and the inert gas supply port is provided in the upper part of the process chamber 105, but the source gas supply port and the inert gas supply are provided. The position of the mouth may be changed. Further, an inert gas supply port may be further provided on the same side as the source gas supply port.

  The exhaust port 106 connected to the exhaust pipe can be formed at an arbitrary position in the process chamber 105. However, in order to exhaust the source gas efficiently and suppress the generation of particles and the like, the exhaust port 106 is connected to the source gas supply port. It is preferable to be provided on the opposite side, that is, on the opposite side (the upper wall of the process chamber 105 in FIG. 1) across the substrate gas supply port and the substrate. A gate valve for controlling the pressure in the process chamber 105 is installed at the exhaust port 106. A heater other than the tape heater 104 may be used. The planar shapes of the first gas supply plate 103 and the second gas supply plate 102 are circular according to the planar shape of the substrate 101.

  In the example shown in FIG. 1, a film is grown while a wafer-like substrate 101 is supported by a gas cushion formed by flowing an inert gas from the upper part of the process chamber 105 and flowing a raw material gas from the lower part of the process chamber 105. . Here, film formation is performed with the element formation surface of the substrate 101 facing upward.

  In the semiconductor manufacturing apparatus of the present embodiment, since the source gas and the inert gas are supplied from the vertical direction of the wafer, when the wafer is heated from the vertical direction of the wafer, the reaction between the gases easily occurs at the source gas supply port, and the particles are generated. Cause it to occur. Therefore, the heating system is preferably a hot wall type as shown in FIG.

  Whereas a conventional semiconductor manufacturing apparatus includes a base for installing a substrate, the semiconductor manufacturing apparatus according to the present embodiment supports the substrate in a state of being floated by buoyancy due to gas without providing a base. Is different.

  For this reason, when forming the protective film which consists of an insulator etc. only on the back surface of a board | substrate using the conventional semiconductor manufacturing apparatus, there existed a possibility that an element formation surface might contact | connect a base and an element formation surface might be damaged. Furthermore, the base has also been a cause of particle generation. On the other hand, if the semiconductor manufacturing apparatus of this embodiment is used, since the element formation surface does not come into contact with the base, a desired film can be formed on the back surface of the substrate without damaging the element formation surface. It becomes. Moreover, the generation of particles is also suppressed. Here, an inert gas is supplied to the surface (upper surface) opposite to the surface (back surface) to which the source gas is supplied so that the source gas does not enter the upper surface side of the substrate 101.

In the present embodiment, any one of N ₂ (nitrogen), Ar (argon), He (helium), etc. is used as the inert gas. In the case of forming a silicon nitride film on the back surface, TDMA (tetradimethylaminosilane), TEOS (tetraethoxysilane), or the like that can be thermally decomposed at 400 ° C. or lower is preferably used as a silicon source gas. Ammonia is used as the gas.

FIG. 2 is a diagram showing a method for manufacturing the semiconductor device of this embodiment. As shown in the figure, two types of gases A and B (for example, gas A: silicon source gas, gas B: nitrogen source gas) are alternately supplied to the back surface of the substrate. Further, the supply amount of the inert gas (for example, N ₂ gas) to the back surface is small while the raw material gas is supplied, and is increased while the supply of the raw material gas is stopped. The supply amount of the inert gas to the upper surface of the substrate is constant throughout the film growth process. By continuing to supply a predetermined flow rate of gas to the top and back surfaces of the substrate, the substrate can be held in a floating state.

  As the source gas, one or more kinds of gases are used depending on the film to be grown. For example, when two kinds of source gases (gas A and B) are used, as shown in FIG. It is preferable to supply B to the substrate alternately. However, after one source gas is supplied, the inside of the chamber is always purged with an inert gas. At this time, an inert gas such as nitrogen is supplied from the supply port for the source gas. Thereby, the residue of source gas can be eliminated and it can prevent that the gas A and the gas B react in a gaseous phase, and a particle | grain is generated. Further, by causing the source gases to react only on the substrate surface, in-plane film thickness uniformity can be improved for the grown film. When two types of source gases are supplied simultaneously or when a reaction occurs in the gas phase, the film thickness near the source gas supply port is thicker than the other parts, and the film thickness is uniform within the surface. Sexuality gets worse.

  In order to float the substrate by the gas flow supplied from above and below the substrate, a flow rate of at least 1.0 L / min (slm) is required, and the substrate and the gas supply port (or the first or second gas) The distance from the supply plate is preferably 5 mm or less. When a silicon nitride film is specifically formed, for example, there is a space of 4 mm between the substrate and the gas supply port, and TDMAS which is a silicon source gas (raw material gas) is 5.0 L / min (slm). Ammonia, which is a nitrogen source gas, is supplied at 8.0 L / min (slm). The diameter of the gas supply port (that is, the hole diameter of the gas supply plate) is preferably 1 mm or more and 5 mm or less. This is because if the gas supply port is too large, it becomes difficult to float the substrate, and if the gas supply port is too small, problems are likely to occur due to adhesion of reactants. In the semiconductor manufacturing apparatus of this embodiment, since the diameter of the gas supply port is smaller than that of the conventional semiconductor manufacturing apparatus, it is important to suppress the reaction of the raw material gas at the gas supply port. A film forming method in which source gases are alternately supplied is preferably used.

  Further, the chamber internal volume can be reduced by bringing the substrate and the gas supply port closer to each other. As described above, when the source gas is alternately flowed and the reaction on the surface of the substrate is repeated, the film formation speed is slow, and thus the processing takes a long time. For this reason, it is necessary to increase the deposition rate by reducing the furnace volume as much as possible, shortening the gas supply time, and increasing the number of gas supply times. Therefore, the supply time of each gas is preferably 1 second or less at a time.

  FIG. 3 is a view showing the film thickness distribution in the wafer surface of the silicon nitride film formed on the back surface of the substrate using the semiconductor manufacturing apparatus and film forming method of the present embodiment. As can be seen from the figure, when the semiconductor manufacturing apparatus and film forming method of this embodiment are used, the contour lines in the substrate surface are concentric, and the thickness of the film is thin at the central portion and thick at the outer peripheral portion. This is because it is a hot wall type heating method, the temperature of the outer peripheral portion tends to rise, and the flow rate of gas ejection is high near the center. However, the in-plane uniformity of the film thickness is greatly improved as compared with the conventional semiconductor manufacturing apparatus. The interval between the contour lines is, for example, 1 nm.

  FIG. 4 is a diagram showing the relationship between the number of source gas supply cycles and the thickness of the deposited film when the film forming method of this embodiment is used. As can be seen from the figure, since the number of supply cycles and the film thickness have a proportional relationship, it can be seen that according to the method of the present embodiment, a very stable film thickness reproducibility can be obtained.

(Second Embodiment)
As an application example of the method for manufacturing a semiconductor device according to the second embodiment of the present invention, a method for forming a stress applying film for distorting a semiconductor layer formed on the upper surface of the substrate will be described.

  5A to 5D are views showing a method for manufacturing the semiconductor device of this embodiment.

  First, as shown in FIGS. 5A and 5B, a wafer-like substrate 501 made of a semiconductor such as silicon is introduced into a process chamber (reactor) of a semiconductor manufacturing apparatus. Here, in FIGS. 5A and 5B, the back surface of the substrate is shown upward. Although not shown, a semiconductor layer made of silicon or the like and a semiconductor element such as a MOS transistor have already been formed on the substrate 501.

  Next, as shown in FIG. 5C, the source gas is alternately supplied to the back surface of the substrate 501 under the conditions described in the first embodiment, so that the thermal expansion coefficient is higher than that of the substrate material on the back surface of the substrate 501. A stress applying film 503 made of a large material is formed. The film forming temperature depends on the decomposition temperature of the raw material gas, and is, for example, not higher than the vapor phase decomposition temperature of the raw material gas and higher than the temperature at which adsorption and film forming reaction occur on the substrate surface. When a silicon substrate is used, a silicon nitride film is used as the stress application film 503. The preferable film thickness range of the silicon nitride film varies depending on its internal stress. The internal stress in the silicon nitride film is affected by the composition of nitrogen and silicon in the silicon nitride, other impurity concentrations, and the film formation temperature. Therefore, when using a silicon nitride film with a low internal stress, a thick film is required. Is large, a thin film can give a desired stress to the channel of the transistor. However, if the film thickness becomes too large, cracks and the like may occur.

  Note that even a silicon oxide film or the like can be used as the stress application film 503. When a silicon oxide film is used, the film thickness is set according to the internal stress of the film, as in the case of using a silicon nitride film.

  In this step, when the stress application film 503 is formed only on the back surface by heating the substrate 501, the warpage of the substrate increases as the thermal expansion coefficient of the stress application film 503 increases. Film formation proceeds in a chamber maintained at a certain temperature during film formation.

  Next, as shown in FIG. 5D, when the substrate temperature is lowered after the film formation is completed, the stress application film 503 contracts more than the substrate 501, so that the substrate 501 has the stress application film 503 on the inside. Warp in the direction you face. The larger the thermal expansion coefficient of the stress application film 503, the greater the warpage of the substrate 501 in the film forming process shown in FIG. After film formation in this state, when the temperature of the substrate 501 is lowered, the substrate warps so that the stress application film 503 is inside as described above. Thereby, the semiconductor layer on the substrate 501 receives tensile stress. For this reason, the mobility of the n-channel MOS transistor formed on the upper surface of the substrate can be improved.

  When a silicon nitride film is used as the stress application film 503, the internal compressive stress of the film is preferably 600 MPa or more. Further, when a silicon oxide film is used as the stress application film 503, the internal compressive stress of the film is preferably 50 MPa or more. The warpage of the substrate 501 increases as the stress application film 503 is thicker.

  In the following explanation, for the stress application film formed on the back surface of the substrate, the stress that bends the top surface of the substrate inward is called (internal) tensile stress (Tensile Strain), and the stress that bends the back surface of the substrate inward is (internal) compression This is called Compressive Strain.

  The stress σ received by the device can be calculated from the curvature of the substrate by these stresses using the following equation (1).

σ∝ (1 / t) {(1 / R) − (1 / R ₀ )} (1)
(T: formed film thickness, R: curvature of substrate after film formation, R ₀ : curvature of substrate before film formation)
As described above, as the miniaturization of semiconductor elements progresses, it is difficult to form a silicon nitride film having a sufficient thickness with the conventional DSL technique. Even when the SMT technique is used, the mobility of electrons may not be sufficiently improved depending on the subsequent steps.

  On the other hand, according to the method of the present embodiment, the warpage of the substrate can be increased by forming the insulating film having the stress opposite to the stress to be applied to the upper surface side of the substrate on the back surface side. On the back surface side, there is no film thickness limitation as on the upper surface side where the semiconductor element is formed, and the stress application film can be formed thick, and a large distortion can be given to the channel of the transistor.

  FIG. 6A is a graph showing warpage of the Si wafer (Si substrate) when a silicon oxide film having a compressive stress is formed on the back surface of the substrate with a thickness of 100 nm. In the figure, the formation surface of the semiconductor element is shown downward. FIG. 6A shows that the Si substrate is warped by about 28 μm near the center. Here, in order to improve the mobility of the n-channel MOS transistor on the substrate, a warpage amount of 20 to 30 μm or more is required.

  As an example of the method for forming the silicon oxide film, the furnace temperature is kept at 400 ° C., and nitrogen gas is flowed from above and below to hold the Si substrate. Then, TEOS is supplied as a silicon source gas at 4 L / min (slm), the inside of the chamber is purged with nitrogen gas, and then ozone is supplied as an oxygen source gas at 8 L / min (slm). Each gas supply time is 1 second.

FIG. 6B is a graph showing the warpage of the Si substrate when a silicon nitride film having a high tensile stress and having a thickness of 30 nm is formed on the upper surface of the Si substrate. The orientation of the Si substrate is the same as in FIG. It can be seen from FIG. 6B that the warpage is about 25 μm near the center of the Si substrate. This silicon nitride film is formed by plasma CVD using SiH ₄ as the silicon source gas and ammonia as the nitrogen source gas. After the film formation, the film is shrunk by ultraviolet irradiation to improve the tensile stress. It has been made.

  FIG. 6C shows a silicon oxide film having a thickness of 100 nm having compressive stress formed on the back surface of the substrate, and a silicon nitride film having a thickness of 30 nm having tensile stress being formed on the upper surface of the substrate, and then measuring the warpage of the Si substrate. It is the result. In the vicinity of the center of the Si substrate, a warp of about 40 μm is observed, and it can be seen that a larger stress can be applied than when a stress applying film is formed on one surface.

  In the manufacturing method of this embodiment, the step of forming the stress applying film on the back surface of the substrate is preferably after the semiconductor element is formed and before the contact hole is formed. Specifically, after the transistor is formed on the upper surface of the substrate, a silicon nitride film having a strong tensile stress, which becomes an etching stopper film against etching at the time of forming the contact hole, is formed. Thereafter, for example, a silicon oxide film having a compressive stress is formed on the back surface of the substrate. Thereafter, a silicon oxide film as an interlayer insulating film is formed on the silicon nitride film on the upper surface side to a thickness of about 500 nm. This silicon oxide film must have a tensile stress or be a film having a very small stress. Thereafter, planarization (CMP: Chemical Mechanical Polishing) is performed to form contact holes. Thus, by forming a stress application film having compressive stress not only on the top surface of the substrate but also on the back surface of the substrate, sufficient stress is applied to the channel to improve carrier mobility even when the semiconductor element is miniaturized. It becomes possible to apply. In addition, the stress applied to the channel of the transistor can be easily adjusted by adjusting the thickness of the stress application film formed on the back surface of the substrate.

  Further, there is no problem even if the film having compressive stress formed on the back surface is removed when the first wiring layer is formed after the contact hole is formed. In the wiring process, an insulating film having a thickness of several hundreds of nanometers is formed on the transistor. Therefore, even if the stress application film on the back surface is removed, the strain applied to the substrate is maintained, and the driving capability of the transistor can be improved. .

  Since a plurality of films are not formed on the back surface of the substrate as compared with the top surface of the substrate, the stress applied by the stress application film is not canceled by the upper layer film as in the conventional SMT technique. In addition, when the semiconductor manufacturing apparatus according to the first embodiment is used, there is no risk of damaging the formation surface of the semiconductor element, and a stress applying film having a uniform thickness can be formed compared to the conventional case.

  FIG. 7 is a diagram comparing drive currents in an n-channel MOS transistor when the manufacturing method of the present embodiment is applied and not applied. The off current is 200 pA / μm. Evaluation was performed with the substrate orientation of the wafer set to <100> notch orientation. A in the drawing, which is a comparison target, is a case where a contact etching stopper film having a small stress is used. B in the figure is an on-current value when a silicon nitride film having a strong tensile stress is used as a contact etching stopper, and the driving current is improved by 7% compared to the case of A. Further, in the case of C in the figure in which a silicon oxide film having a compressive stress was formed on the back surface of the substrate, the drive current was improved by 13% compared to the case of A.

  In the semiconductor device manufacturing method of the present embodiment, tensile strain is applied to the channels of all n-channel MOS transistors provided in the substrate surface to improve mobility, but stress application having tensile stress is applied to the back surface of the substrate. In the case of forming a film, the mobility of all p-channel MOS transistors on the substrate can be improved.

  Examples of the material for the stress application film include a metal oxide film in addition to silicon nitride and silicon oxide.

(Third embodiment)
As a method for manufacturing a semiconductor device according to the third embodiment of the present invention, a method for forming a metal contamination prevention film on the back surface of a substrate will be described with reference to the drawings.

  8A to 8H are cross-sectional views illustrating the method for manufacturing the semiconductor device of this embodiment.

  First, as shown in FIG. 8A, after a gate insulating film (not shown) and a gate electrode 205 are sequentially formed on a semiconductor substrate 203 made of Si or the like by a known method, silicon nitride is formed on the entire surface of the substrate. A film 207 is formed. At this time, since the film is formed using a vertical furnace capable of processing a plurality of sheets simultaneously, the silicon nitride film 201 can be formed not only on the upper surface of the substrate but also on the rear surface of the substrate. Conventionally, the silicon nitride film 201 is left on the back surface until the wiring process to prevent metal contamination from the back surface.

  Next, as shown in FIG. 8B, the silicon nitride film 207 on the upper surface of the substrate is etched back to form a sidewall 207a made of silicon nitride on the side surface of the gate electrode 205. Next, a transistor portion is formed through an impurity implantation process and a silicide process.

  Next, as shown in FIG. 8C, after an interlayer insulating film 209 is formed on the semiconductor substrate 203 and the transistor, a contact 211 that penetrates the interlayer insulating film 209 and is connected to the transistor portion is formed.

  Next, as shown in FIG. 8D, an etching stopper film 213 and an interlayer insulating film 215 are formed by a known method.

Next, as shown in FIGS. 8E and 8F, after forming the wiring groove 217 in the interlayer insulating film 215 and the etching stopper film 213, the semiconductor manufacturing apparatus of the first embodiment is used, for example, amorphous. A metal contamination prevention film 221 made of silicon is formed on the back surface of the silicon nitride film 201 on the back surface of the substrate. At this time, using the semiconductor manufacturing apparatus according to the first embodiment, the furnace temperature is set to 400 ° C., disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) is used as the source gas, and inert gas. For example, nitrogen is used. Since there is only one kind of source gas used during film formation, it is not necessary to supply the source gas intermittently, and a constant flow rate may be continuously provided. The film density of the metal contamination prevention film 221 made of amorphous silicon is preferably 2.0 g / cm ³ or more. A higher film density can more effectively suppress metal diffusion. The film density of amorphous silicon can be controlled by the pressure in the process chamber. Even when the metal contamination preventing film 221 is made of silicon nitride, the film density is preferably 2.0 g / cm ³ or more.

  Next, a barrier metal 218 and a copper film 219 are sequentially deposited on the entire surface of the substrate.

  Next, as shown in FIG. 8G, the excess copper film 219 and the barrier metal are removed by a CMP method or the like, leaving the barrier metal 218 only on the inner surface of the wiring groove, and filling the wiring groove 217 to form copper. A metal wiring 219a is formed. At this time, a metal such as copper or a barrier metal adheres not only to the upper surface of the semiconductor substrate 203 but also to the back surface side and the end portion.

  Next, as shown in FIG. 8H, etching using hydrofluoric acid is performed from the back side of the substrate to remove unnecessary metal attached to the semiconductor device. At this time, the metal contamination prevention film 221 is removed and the silicon nitride film 201 is thinned. The reason for removing the excess metal is to prevent the metal from diffusing into the semiconductor substrate and degrading the reliability of the transistor.

  In this step, since the silicon nitride film 201 functions as an etching stopper, a sufficient film thickness and cleaning resistance are required. However, as the thickness of the sidewall is reduced and the process temperature is lowered due to miniaturization, the cleaning resistance of the silicon nitride film 201 to hydrofluoric acid is also lowered. In the manufacturing method of this embodiment, the metal contamination prevention film 221 can be formed on the back surface of the semiconductor substrate 203 (or the silicon nitride film 201) at an arbitrary time before the metal film is formed. Regardless of the thickness of the silicon nitride film 201 formed on the back surface of the substrate, metal contamination can be reliably prevented. Therefore, the metal contamination prevention film 221 may be formed not only before the formation of the first layer metal wiring but also between the respective wiring processes.

  Further, the material of the metal contamination preventing film 221 may be silicon oxide, silicon nitride, polysilicon, metal oxide, etc. in addition to amorphous silicon. In particular, when silicon nitride is used, the metal contamination prevention film 221 can be made to function as the stress application film described in the second embodiment by forming the metal contamination prevention film 221 before forming the contact holes. Therefore, it is preferable.

  As described above, according to the manufacturing method of the semiconductor device of the present embodiment, the protective film on the back surface of the semiconductor substrate can be made sufficiently thick. Even when formed, the reliability of the transistor formed over the top surface of the semiconductor substrate is not lowered.

  The semiconductor manufacturing apparatus according to the present invention is useful as a film forming apparatus that can selectively form a film on the back surface without contaminating the upper surface of the wafer, and the semiconductor device manufacturing method according to the present invention includes a metal wiring, This is useful for manufacturing a highly reliable semiconductor device.

It is a figure which shows the structure of the principal part of the film-forming apparatus (semiconductor manufacturing apparatus) which concerns on the 1st Embodiment of this invention. It is a figure which shows the manufacturing method of the semiconductor device which concerns on 1st Embodiment. It is a figure which shows the film thickness distribution of the film | membrane formed into a film in the back surface of 1st Embodiment. It is a figure which shows the relationship between the supply cycle number of the source gas at the time of using the film-forming method of 1st Embodiment, and the film thickness of the deposited film. (A)-(d) is a figure which shows the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention. (A) is a graph showing the warpage of the Si wafer (Si substrate) when a silicon oxide film having a compressive stress is formed on the back surface of the substrate, and (b) is a graph showing a silicon nitride film having a high tensile stress as Si. It is a graph which shows the curvature of Si substrate at the time of forming on the substrate upper surface, and (c) is after forming a silicon oxide film having compressive stress on the substrate back surface and forming a silicon nitride film having tensile stress on the substrate upper surface. It is a graph which shows the curvature of Si substrate. It is the figure which compared the drive current in the n channel type MOS transistor when not applying the case where the manufacturing method concerning a 2nd embodiment is applied. (A)-(h) is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on the 3rd Embodiment of this invention.

Explanation of symbols

101 Substrate 102 Second gas supply plate 103 First gas supply plate 104 Tape heater 105 Process chamber 106 Exhaust port 110 Process chamber 201, 207 Silicon nitride film 203 Semiconductor substrate 205 Gate electrode 207a Side wall 209, 215 Interlayer insulating film 211 Contact 213 Etching stopper film 217 Wiring groove 218 Barrier metal 219 Copper film 219a Metal wiring 221 Metal contamination prevention film 501 Substrate 503 Stress application film

Claims (19)

The first supply port for supplying the source gas to the upper part or the lower part, the second supply port for supplying the inert gas to a position facing the first supply port, and the exhaust port at an arbitrary position are provided. A process chamber for forming a film on the substrate;
A heater installed on the outer periphery of the side wall of the process chamber,
While supplying the source gas to one main surface of the substrate and supplying the inert gas to the other main surface of the substrate, while holding the substrate in a floating state, on the one main surface A semiconductor manufacturing apparatus for forming the film on the substrate.   The semiconductor manufacturing apparatus according to claim 1, wherein the exhaust port is provided at a position facing the first supply port in the process chamber.   The semiconductor manufacturing apparatus according to claim 1, wherein a diameter of the gas supply port is 1 mm or more and 5 mm or less. Preparing a substrate (a);
Forming a MOS transistor on the upper surface of the substrate;
And (c) forming a stress applying film having a compressive stress or a tensile stress on the back surface of the substrate.   In the step (c), the first supply port for supplying the source gas to the upper part or the lower part, and the second supply port for supplying the inert gas to a position opposite to the first supply port are at arbitrary positions. Forming the stress applying film in a state where the substrate is floated using a semiconductor manufacturing apparatus having a process chamber provided with an exhaust port respectively on the substrate and a heater installed on an outer periphery of a side wall of the process chamber. The method of manufacturing a semiconductor device according to claim 4, wherein: The source gas includes a first gas and a second gas,
In the step (c), the step (c1) of supplying the first gas from the first supply port and the step (c2) of supplying the second gas from the first supply port are alternately performed. The process chamber is purged by repeatedly supplying the inert gas from the first supply port between the step (c1) and the step (c2). The manufacturing method of the semiconductor device of description.   The method of manufacturing a semiconductor device according to claim 6, wherein the stress application film is made of silicon oxide or silicon nitride. The stress applying film is made of silicon nitride and has a tensile stress;
8. The method of manufacturing a semiconductor device according to claim 7, wherein the MOS transistor is an n-channel type.   9. The method of manufacturing a semiconductor device according to claim 8, wherein the tensile stress of the stress application film is 600 MPa or more. The stress applying film is made of silicon oxide and has a compressive stress;
8. The method of manufacturing a semiconductor device according to claim 7, wherein the MOS transistor is a p-channel type.   9. The method of manufacturing a semiconductor device according to claim 8, wherein the compressive stress of the stress application film is 50 MPa or more. After the step (b), the method further includes a step (d) of forming a contact hole penetrating the interlayer insulating film after forming an interlayer insulating film on the substrate and the MOS transistor.
The method of manufacturing a semiconductor device according to claim 4, wherein the step (c) is performed before the step (d). The semiconductor device includes a metal wiring above the MOS transistor,
The method of manufacturing a semiconductor device according to claim 4, wherein the stress application film functions as a metal contamination prevention film in the step of forming the metal wiring. The step (b)
Forming a gate insulating film and a gate electrode on the substrate (b1);
Forming an insulating film on the entire top surface of the substrate, and forming a second metal contamination prevention film made of the insulating film on the back surface of the substrate (b2);
Etching the insulating film formed on the upper surface of the substrate to form a sidewall on the side surface of the gate electrode (b3),
14. The method of manufacturing a semiconductor device according to claim 13, wherein in the step (c), the stress applying film is formed on a back surface of the second metal contamination prevention film. Preparing a substrate (a);
Forming a MOS transistor on the upper surface of the substrate;
Forming a first metal contamination preventive film on the back surface of the substrate (c);
A method of manufacturing a semiconductor device, comprising a step (d) of forming a metal wiring above the MOS transistor after the step (c).   In the step (c), the first supply port for supplying the source gas to the upper part or the lower part is at a position facing the first supply port, and the second supply port for supplying the inert gas is at an arbitrary position. The raw material gas is supplied from the first supply port to the back surface of the substrate using a semiconductor manufacturing apparatus having a process chamber provided with an exhaust port on each side and a heater installed on the outer periphery of the side wall of the process chamber. The first metal contamination prevention film is formed in a state where the substrate is floated by supplying and supplying the inert gas to the upper surface of the substrate from the second supply port. 15. A method for manufacturing a semiconductor device according to 15.   The first metal contamination prevention film is formed of any one of silicon oxide, silicon nitride, polysilicon, amorphous silicon, and a metal oxide film. The manufacturing method of the semiconductor device of description. 18. The manufacturing method of a semiconductor device according to claim 17, wherein the first metal contamination prevention film is made of a silicon nitride film or amorphous silicon and has a film density of 2.0 g / cm ³ or more. Method. The step (b)
Forming a gate insulating film and a gate electrode on the substrate (b1);
Forming an insulating film on the entire top surface of the substrate, and forming a second metal contamination prevention film made of the insulating film on the back surface of the substrate (b2);
Etching the insulating film formed on the upper surface of the substrate to form a sidewall on the side surface of the gate electrode (b3),
19. The method according to claim 15, wherein in the step (c), the first metal contamination prevention film is formed on a back surface of the second metal contamination prevention film. A method for manufacturing a semiconductor device.

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