JPH01239967A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01239967A
JPH01239967A JP63067548A JP6754888A JPH01239967A JP H01239967 A JPH01239967 A JP H01239967A JP 63067548 A JP63067548 A JP 63067548A JP 6754888 A JP6754888 A JP 6754888A JP H01239967 A JPH01239967 A JP H01239967A
Authority
JP
Japan
Prior art keywords
light
emitting element
photodetector
light emitting
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63067548A
Other languages
Japanese (ja)
Inventor
Hiroyuki Oshima
弘之 大島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63067548A priority Critical patent/JPH01239967A/en
Publication of JPH01239967A publication Critical patent/JPH01239967A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To effectively reduce an irregularity in photodetecting brightness by a method wherein a light-emitting element and a photodetector, both composed of a compound semiconductor layer, are formed on an Si substrate to be adjacent to each other, a MOSFET formed to be adjacent to them is used and an optical output of the photodetector is controlled to be constant by using an output signal from the photodetector. CONSTITUTION:Compound semiconductor layers are formed on an Si substrate by an epitaxial growth method; a light-emitting element 201 such as an LED or the like and a photodetector 202 such as a photodiode or the like are made up of the layers. These elements comprise a P-N junctions of the compound semiconductor; voltages are applied in the forward direction in the element 201 and in the reverse direction in the element 202. The light-emitting element and the photodetector are constituted in this manner; a beam of light emitted from the element 201 by a drive current I from a MOSFET element 203 formed to be adjacent to the element 201 is detected by using the element 202; a photoelectric current Ip corresponding to the light intensity is applied to the element 203; the drive current I is controlled in such a way that the Ip becomes constant. By this setup, an optical output becomes stable.

Description

【発明の詳細な説明】 [産業上の利用分野1 本発明は半導体装置に関する。特に、発光ダイオード(
LED)アレイとして好適なシリコン基板上の光電子集
積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a semiconductor device. In particular, light emitting diodes (
The present invention relates to an optoelectronic integrated circuit on a silicon substrate suitable as an LED (LED) array.

〔従来の技術1 発光ダイオード(LED)は小型・軽量な発光源として
種々の分野に応用されてきている。特にLEDを一次元
に複数個配列したLEDアレイは、高速・高解像度のペ
ージプリンタ用光源としてその発展が期待されている。
[Prior Art 1] Light emitting diodes (LEDs) have been applied to various fields as small and lightweight light sources. In particular, LED arrays in which a plurality of LEDs are arranged in one dimension are expected to develop as light sources for high-speed, high-resolution page printers.

従来のLEDは、ガリウム・ヒ素(GaAs)基板上に
アルミニウム・ガリウム・ヒ素(AI2GaAs)層や
GaAs層などの単結晶薄膜をエピタキシャル成長させ
、これらにより形成されたPn接合に順方向電流を流し
て発光を得ていた。
Conventional LEDs emit light by epitaxially growing a single crystal thin film such as an aluminum gallium arsenide (AI2GaAs) layer or a GaAs layer on a gallium arsenide (GaAs) substrate, and passing a forward current through the Pn junction formed by these layers. I was getting .

このLEDを複数個配列すればLEDアレイとなる。If a plurality of these LEDs are arranged, it becomes an LED array.

〔発明が解決しようとする課題1 しかし前述の従来技術は、GaAs基扱やエピタキシャ
ル膜に含まれる結晶欠陥などにより、  LEDの特性
(特に輝度)が大幅にバラつき、個体差が大きいという
欠点を有していた。特にL E Dアレイでは、集積さ
れた複数のLEDが均一な特性を有することが要求され
、輝度がバラつくことは致命的な課題である。
[Problem to be solved by the invention 1 However, the above-mentioned conventional technology has the drawback that the characteristics (especially brightness) of LEDs vary widely due to the GaAs-based treatment and crystal defects contained in the epitaxial film, and there are large individual differences. Was. Particularly in LED arrays, a plurality of integrated LEDs are required to have uniform characteristics, and variation in brightness is a fatal problem.

本発明はこのような課題を解決するものであり、その目
的とするところは、発光輝度のバラツキが極めて小さい
半導体装置を提供することにある。
The present invention is intended to solve these problems, and its purpose is to provide a semiconductor device with extremely small variations in luminance.

[課題を解決するための手段] 本発明の半導体装置は、シリコン基板上に設けられた化
合物半導体層から成る発光素子と、同じくシリコン基板
上に設けられた化合物半導体層から成り、該発光素子に
隣接した受光素子と、該受光素子からの出力信号により
前記発光素子の光出力を一定に制御用する機能を有する
該シリコン基板内の駆動回路を具備したことを特徴とす
る。
[Means for Solving the Problems] A semiconductor device of the present invention includes a light emitting element made of a compound semiconductor layer provided on a silicon substrate, and a compound semiconductor layer also provided on the silicon substrate. The device is characterized by comprising an adjacent light receiving element and a drive circuit in the silicon substrate having a function of controlling the light output of the light emitting element to a constant level based on an output signal from the light receiving element.

[実 施 例1 以下、実施例に基づいて本発明の詳細な説明する。[Implementation Example 1] Hereinafter, the present invention will be described in detail based on Examples.

第2図に本発明による半導体装置の基本構成図を示す。FIG. 2 shows a basic configuration diagram of a semiconductor device according to the present invention.

本発明の半導体装置はモノリシックに集積化された3つ
の基本要素から成る。シリコン基板上にエピタキシャル
成長された化合物半導体層に設けられた発光素子(LE
Dなと)201と。
The semiconductor device of the present invention consists of three monolithically integrated basic elements. A light emitting element (LE) is provided on a compound semiconductor layer epitaxially grown on a silicon substrate.
D nato) 201.

同じくシリコン基板上にエピタキシャル成長された化合
物半導体層に設けられた受光素子(〕オドダイオードな
と)202と、シリコン基板内に設けられた駆動回路2
03である。発光素子と受光素子は共に、同時に形成さ
れた化合物半導体のPn接合から成り、電圧の印加方向
が発光素子では順方向に、受光素子では逆方向になる点
が異なる。これら2つの素子はシリコン基板上で互いに
隣接している。駆動回路から流れ出る駆動電流Iにより
発光素子が発する光を受光素子が検知し、光の強度に応
じた光電流Ipを駆動回路に伝える。駆動回路はIpが
一定となるように駆動電流Iを制御し、常に安定しな光
出力を得ることができる。具体的な駆動回路は、半導体
レーザの場合に一般的に使用されているA P C(A
uto…aticPower ConLroll)回路
と同様である。
Similarly, a light receiving element (such as an odd diode) 202 provided in a compound semiconductor layer epitaxially grown on a silicon substrate, and a drive circuit 2 provided in the silicon substrate.
It is 03. Both the light-emitting element and the light-receiving element are composed of Pn junctions of compound semiconductors formed at the same time, and the difference is that the voltage is applied in the forward direction for the light-emitting element and in the opposite direction for the light-receiving element. These two elements are adjacent to each other on the silicon substrate. The light receiving element detects the light emitted by the light emitting element due to the drive current I flowing out from the drive circuit, and transmits a photocurrent Ip corresponding to the intensity of the light to the drive circuit. The drive circuit controls the drive current I so that Ip remains constant, and can always obtain stable optical output. A specific driving circuit is an APC (A
This is similar to the auto...aticPower ConLroll) circuit.

第1図に本発明による半導体装置の断面構造図を示す。FIG. 1 shows a cross-sectional structural diagram of a semiconductor device according to the present invention.

p−Si基板101の中に駆動回路に用いられるMOS
FETが設けられている。シリコン面上にはダブルへテ
ロ構造の発光素子(LED、半導体レーザなと)と受光
素子()オドグイオード)が設けられている。これらの
発光素子と受光素子は基本的に同一の構造を持ち、同時
に形成されるが、−電圧の印加方向が発光素子ではPn
接合の順方向に、受光素子では逆方向になるように配線
される点が異なる。したがって、共にシリコン面側から
順に、n−GaAsバッファ層102、n  A Qo
、z G ao、y A Sクラッド層103、GaA
s活性層104.  p−Al1.o 3(J ao、
t A Sクラッド層105.p−GaAsコンタクト
層106がエピタキシャル成長されている。成長方法は
各種あるが、有機金属気相成長法(MOCVD法)ある
いは分子線エピタキシャル法(M B E法)が適当で
ある。また、発光素子のp側の電極107は受光素子の
p側の電極に接続されている。シリコン基板101とG
 a A s層lO2の間の洩れ電流を防ぐためには、
両者の電位を等しくするか、あるいは逆バイアスされる
ように適当な電圧をシリコン基板に印加して使用すれば
よい。装造方法はまず通常のプロセスによりMOS F
 ETを炸裂する。駆動回路はCMOS(相補型MO3
)やバイポーラ1−ランジスタで構成しても良い。各デ
バイス間はS iO2108により素子分離されている
。この後、GaAsやAρGaAsを連続的にエピタキ
シャル成長されて、発光素子と受光素子を形成する。全
面に絶縁膜(StO2,SiNなど)110を堆積させ
た後、金属配線を行えば完成となる。オーミックコンタ
クトを得るためには、Si系への金属配線とGaAs系
への金属配線の材料を変えることが望ましい。Si系へ
はAf2またはAf2−5iまたはAf;!、−51−
CnなどのAff系の金属illが適している。GaA
s系へはCr / N i / A 11 。
MOS used for the drive circuit in the p-Si substrate 101
FET is provided. On the silicon surface, a double heterostructure light emitting element (LED, semiconductor laser, etc.) and light receiving element ( ) are provided. These light-emitting elements and light-receiving elements basically have the same structure and are formed at the same time, but the - voltage application direction is Pn for the light-emitting element.
The difference is that the light receiving element is wired in the opposite direction to the forward direction of the junction. Therefore, in order from the silicon surface side, the n-GaAs buffer layer 102, the n A Qo
, z Gao, y A S cladding layer 103, GaA
s active layer 104. p-Al1. o 3(J ao,
tAS cladding layer 105. A p-GaAs contact layer 106 is epitaxially grown. Although there are various growth methods, a metal organic chemical vapor deposition method (MOCVD method) or a molecular beam epitaxial method (MBE method) is suitable. Further, the p-side electrode 107 of the light emitting element is connected to the p-side electrode of the light receiving element. Silicon substrate 101 and G
In order to prevent leakage current between the a A s layer lO2,
It is sufficient to apply an appropriate voltage to the silicon substrate so that both potentials are equalized or reverse biased. The manufacturing method is to first create MOS F using the normal process.
Explosive ET. The drive circuit is CMOS (complementary MO3
) or a bipolar transistor. Each device is isolated by SiO2108. Thereafter, GaAs or AρGaAs is epitaxially grown continuously to form a light emitting element and a light receiving element. After depositing an insulating film (StO2, SiN, etc.) 110 on the entire surface, metal wiring is completed. In order to obtain ohmic contact, it is desirable to use different materials for the Si-based metal wiring and the GaAs-based metal wiring. Af2 or Af2-5i or Af;! to Si system. , -51-
Aff-based metal illumination such as Cn is suitable. GaA
Cr/N i / A 11 to the s system.

N i/Ge/Au、Cr/AuなどのA u系の金属
112が適している。したがってデバイス間の配線は、
Af2系及びAu系の金属の接触により行われる。
Au-based metals 112 such as Ni/Ge/Au and Cr/Au are suitable. Therefore, the wiring between devices is
This is done by contacting Af2-based and Au-based metals.

第3図はLEDの駆動電流と発光強度の関係を示すグラ
フである。前述の如< LEDの特性は個体差が大きく
、301.302.303のような特性のバラツキがあ
る。従来は駆動電流Iを一定に保つためそれぞれの特・
姓に応じて発光強度はPl、p、p2とバラつく。しか
し、上記の本発明によれば、フォトダイオードで光強度
を検知し、一定の光強度となるように駆動電流を11.
1、I2と制御卸するので、いかなる特性のLEDでも
所望の光強度Pを安定に得ることができる。
FIG. 3 is a graph showing the relationship between the driving current of the LED and the luminous intensity. As mentioned above, there are large individual differences in the characteristics of LEDs, and there are variations in characteristics such as 301, 302, and 303. Conventionally, in order to keep the drive current I constant, each characteristic
The luminescence intensity varies depending on the surname: Pl, p, and p2. However, according to the present invention described above, the light intensity is detected by a photodiode, and the drive current is adjusted to 11.
1 and I2, the desired light intensity P can be stably obtained with any LED of any characteristic.

第4図は本発明による半導体装置をLEDや半導体レー
ザなどの発光素子アレイとして構成した場合のブロック
図である。駆動回路403と発光素子404とフォトダ
イオード405の基本構成にMOSスイッチ406を加
えたものを1ユニツトとして、所望の数だけ一次元的に
配列している。シフトレジスタ列401はスタートパル
ス(SP)の信号を順次転送し、発光素子の発光あるい
は非発光のデータ(D)と共にラッチ列402へ順に取
り込まれる。発光データが取り込まれると、次にデータ
が書きかえられるまでの間、MOSスイッチ406のゲ
ートを開き、発光素子を発光させる。このように構成さ
れた発光素子アレイは、1ビツトごとに発光強度を一定
に保つことができるため、全体としての輝度の均一性を
極めて高めることができる。シフトレジスタ列401、
ラッチ列402、駆動回路403、MOSスイッチ40
6がいずれは同じシリコン基板内に集積化できることは
いうまでもない。
FIG. 4 is a block diagram of a semiconductor device according to the present invention configured as an array of light emitting elements such as LEDs and semiconductor lasers. The basic configuration of the drive circuit 403, light emitting element 404, and photodiode 405 plus a MOS switch 406 constitutes one unit, and a desired number of units are arranged one-dimensionally. The shift register array 401 sequentially transfers start pulse (SP) signals, which are sequentially fetched into the latch array 402 along with data (D) indicating whether the light emitting element emits light or does not emit light. When the light emission data is captured, the gate of the MOS switch 406 is opened to cause the light emitting element to emit light until the next data is rewritten. Since the light emitting element array configured in this manner can maintain constant emission intensity for each bit, the uniformity of the overall brightness can be extremely improved. shift register column 401,
Latch row 402, drive circuit 403, MOS switch 40
It goes without saying that 6 can eventually be integrated within the same silicon substrate.

[発明の効果] 本発明は次のような数々の優れた特徴を有する。まず第
1に1発光素子の光強度を安定に一定値に保つことがで
きる。発光素子の特性にバラツキがあっても同じ輝度を
得ることができるばかりでなく、環境条件(例えば温度
)が変化しても一定の光強度を得ることができる。この
特徴はLEDアレイのように複数個の発光素子を集積化
した時に特に顕著である。
[Effects of the Invention] The present invention has the following excellent features. First of all, the light intensity of one light emitting element can be stably maintained at a constant value. Not only can the same brightness be obtained even if there are variations in the characteristics of the light emitting elements, but also constant light intensity can be obtained even if the environmental conditions (for example, temperature) change. This feature is particularly noticeable when a plurality of light emitting elements are integrated, such as in an LED array.

第2に、原理的にはいかなる特性の発光素子でも所望の
輝度が得られるため、不良の発生が極めて少なくなり歩
留り向上及び低コスト化に有利である。特にLEDアレ
イでは、1個のLEDの不良も許されないため効果が大
きい。
Second, since a desired luminance can be obtained in principle with a light emitting element having any characteristics, the occurrence of defects is extremely reduced, which is advantageous for improving yield and reducing costs. This is particularly effective for LED arrays, as even a single LED cannot be defective.

第3に、シリコン基板を用いるために放熱に有利である
。シリコン基板の熱伝導率はGaAs基板の約2倍大き
く、発光素子のように大電流を扱う素子にとって好適で
ある。特にLEDアレイのように複数の発光素子を集積
し消費電力が大きい用途では特に効果が大きい。
Third, since a silicon substrate is used, it is advantageous for heat dissipation. The thermal conductivity of a silicon substrate is approximately twice as high as that of a GaAs substrate, making it suitable for devices that handle large currents, such as light emitting devices. This is particularly effective in applications such as LED arrays where multiple light emitting elements are integrated and power consumption is large.

第4に、発光素子の発光強度の経時変化を防止すること
ができる。一般に発光素子は電流注入により発光を継続
していると1時間と共に結晶欠陥が増大し、光強度が低
下してくるが、本発明では、光強度が低下すると自動的
に駆動電流を増加させ一定の輝度を確保することができ
る。特にシリコン基板上にエピタキシャル成長した化合
物半導体層は格子定数が整合しないために多数の結晶欠
陥を初期的に含んでいる。したがってシリコン基板上の
発光素子は本発明の構成をとらないと。
Fourthly, it is possible to prevent the emitted light intensity of the light emitting element from changing over time. Generally, when a light-emitting element continues to emit light by current injection, crystal defects increase over an hour and the light intensity decreases, but in the present invention, when the light intensity decreases, the drive current is automatically increased and kept constant. brightness can be ensured. In particular, a compound semiconductor layer epitaxially grown on a silicon substrate initially contains many crystal defects due to mismatched lattice constants. Therefore, a light emitting element on a silicon substrate must have the structure of the present invention.

著しく早く輝度の劣化が進む。換言すれば、シリコン基
板上の発光素子を実現する上で本発明は特有の効果を有
すると言える。
Brightness deteriorates extremely quickly. In other words, it can be said that the present invention has a unique effect in realizing a light emitting element on a silicon substrate.

第5に、必要となる回路をすべてシリコン基板内に集積
化できるため、外部との接続端子数が少なく実装が容易
である。従来のL E Dアレイでは2000本から4
000本ものワイヤポンデイジグが・必要であったが、
本発明によればわずか10本程度のワイヤポンディング
で済む。
Fifth, since all the necessary circuits can be integrated within the silicon substrate, the number of external connection terminals is small and implementation is easy. Conventional LED arrays have 2,000 to 4
000 wire pondage jigs were required,
According to the present invention, only about 10 wires need to be bonded.

第6に、発光素子と受光素子を全く同一のプロセスで製
造するため、工程が簡略化され0歩留りの改善及び低コ
ストが達成される。これは構造上は同じ素子に対して電
圧の印加方向を変えることにより発光素子と受光素子の
機能を持たせるためである。
Sixth, since the light-emitting element and the light-receiving element are manufactured by the same process, the process is simplified and zero yield is improved and costs are reduced. This is because structurally the same element has the functions of a light emitting element and a light receiving element by changing the direction of voltage application.

第7に、発光素子と受光素子は平面的に隣接するため、
発光素子が半導体レーザの場合にも対応することができ
る。発光ダイオードは周囲全方位に光を放射するため、
受光素子がどこに配置されていても光を受けることがで
きるが、半導体レーザの場合には、水平方向のみに光を
放射するため本発明のように発光素子と受光素子が平面
的に隣接することが重要である。これにより、常に光強
度が一定の半導体レーザアレイを実現することがijI
能となり、レーザビームプリンタの高速化、レーザアド
レス梨デイスプレィの高速化などに多大な11献をする
Seventh, since the light emitting element and the light receiving element are adjacent in a plane,
The present invention can also be applied to a case where the light emitting element is a semiconductor laser. Light emitting diodes emit light in all directions, so
Although the light-receiving element can receive light no matter where it is placed, in the case of a semiconductor laser, it emits light only in the horizontal direction, so the light-emitting element and the light-receiving element cannot be adjacent to each other in a plane as in the present invention. is important. This makes it possible to realize a semiconductor laser array with constant light intensity.
He made significant contributions to speeding up laser beam printers and laser address displays.

以上述べたように本発明は放多くの優れた効果を有する
ものである。
As described above, the present invention has many excellent effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による半導体装置の断面構造図、第2図
は本発明による半導体装置の基本構成図、第3図は発光
素子の駆動電流と発光強度の関係を示すグラフ、第4図
は本発明の半導体装置を発光素子アレイとして構成した
場合のブロック図である。 以上 出願人 セイコーエプソン株式会社 代理人 弁理士 最 上  務(他1名)MO,s P
ET     e尤、*”r     ’a−i=’ケ
葛 1図 工+L     f工 駆?p電5( 蒲 3 図
FIG. 1 is a cross-sectional structural diagram of a semiconductor device according to the present invention, FIG. 2 is a basic configuration diagram of a semiconductor device according to the present invention, FIG. 3 is a graph showing the relationship between drive current of a light emitting element and light emission intensity, and FIG. FIG. 2 is a block diagram of a semiconductor device of the present invention configured as a light emitting element array. Applicant: Seiko Epson Co., Ltd. Agent Patent Attorney Mogami (1 other person) MO, s P
ET e尤, *”r 'a-i='kekuzu 1 drawing + L f engineering drive? p electric 5 ( 蒲 3 drawing

Claims (1)

【特許請求の範囲】[Claims]  シリコン基板上に設けられた化合物半導体層から成る
発光素子と、同じくシリコン基板上に設けられた化合物
半導体層から成り、該発光素子に隣接した受光素子と、
該受光素子からの出力信号により前記発光素子の光出力
を一定に制御する機能を有する該シリコン基板内の駆動
回路を具備したことを特徴とする半導体装置。
a light-emitting element made of a compound semiconductor layer provided on a silicon substrate; a light-receiving element adjacent to the light-emitting element made of a compound semiconductor layer also provided on the silicon substrate;
A semiconductor device comprising a drive circuit in the silicon substrate that has a function of controlling the light output of the light emitting element to a constant level based on an output signal from the light receiving element.
JP63067548A 1988-03-22 1988-03-22 Semiconductor device Pending JPH01239967A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63067548A JPH01239967A (en) 1988-03-22 1988-03-22 Semiconductor device

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WO2002033385A3 (en) * 2000-10-19 2002-08-29 Motorola Inc Biochip excitation and analysis structure
KR100431760B1 (en) * 2001-08-08 2004-05-17 삼성전기주식회사 AlGaInN LED device and their fabrication method
JP2005257323A (en) * 2004-03-09 2005-09-22 Denso Corp Distance detector
WO2005124880A1 (en) * 2004-03-13 2005-12-29 Epivalley Co., Ltd. Iii-nitride light emitting diode and method of manufacturing it
JP2015137988A (en) * 2014-01-24 2015-07-30 アズビル株式会社 reflection type optical sensor
WO2016085880A1 (en) * 2014-11-24 2016-06-02 Artilux, Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002033385A3 (en) * 2000-10-19 2002-08-29 Motorola Inc Biochip excitation and analysis structure
KR100431760B1 (en) * 2001-08-08 2004-05-17 삼성전기주식회사 AlGaInN LED device and their fabrication method
JP2005257323A (en) * 2004-03-09 2005-09-22 Denso Corp Distance detector
WO2005124880A1 (en) * 2004-03-13 2005-12-29 Epivalley Co., Ltd. Iii-nitride light emitting diode and method of manufacturing it
JP2015137988A (en) * 2014-01-24 2015-07-30 アズビル株式会社 reflection type optical sensor
WO2016085880A1 (en) * 2014-11-24 2016-06-02 Artilux, Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
US9524898B2 (en) 2014-11-24 2016-12-20 Artilux, Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
US9640421B2 (en) 2014-11-24 2017-05-02 Artilux, Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
US9882068B2 (en) 2014-11-24 2018-01-30 Artilux Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
JP2018505544A (en) * 2014-11-24 2018-02-22 アーティラックス インコーポレイテッドArtilux Inc. Monolithic integration technique for fabricating photodetectors with transistors on the same substrate
US9954121B2 (en) 2014-11-24 2018-04-24 Artilux Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate
JP2018074175A (en) * 2014-11-24 2018-05-10 アーティラックス インコーポレイテッドArtilux Inc. Monolithic integration technique for manufacturing photo-detector together with transistor on the same substrate
US10734533B2 (en) 2014-11-24 2020-08-04 Artilux, Inc. Monolithic integration techniques for fabricating photodetectors with transistors on same substrate

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