JPH01239856A - Gold plating of electronic component of semiconductor integrated circuit - Google Patents

Gold plating of electronic component of semiconductor integrated circuit

Info

Publication number
JPH01239856A
JPH01239856A JP6581888A JP6581888A JPH01239856A JP H01239856 A JPH01239856 A JP H01239856A JP 6581888 A JP6581888 A JP 6581888A JP 6581888 A JP6581888 A JP 6581888A JP H01239856 A JPH01239856 A JP H01239856A
Authority
JP
Japan
Prior art keywords
gold
plating
gold plating
thalium
plating bath
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6581888A
Other languages
Japanese (ja)
Other versions
JPH0622252B2 (en
Inventor
Takahiro Yamada
隆裕 山田
Kazuo Arimura
有村 一雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YAMAGUCHI PREF GOV
Original Assignee
YAMAGUCHI PREF GOV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YAMAGUCHI PREF GOV filed Critical YAMAGUCHI PREF GOV
Priority to JP6581888A priority Critical patent/JPH0622252B2/en
Publication of JPH01239856A publication Critical patent/JPH01239856A/en
Publication of JPH0622252B2 publication Critical patent/JPH0622252B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To reduce a thalium eutectic amount, and to obtain a gold plating film having excellent characteristics such as wire adhesive properties at a high speed by employing a gold cyanide plating bath containing citric acid or citrate and a specific amount of less of thalium, and gold plating by a constant current pulse method. CONSTITUTION:An electronic component is gold plated by a constant current pulse method by using gold cyanide plating bath containing citric acid or citrate and 1mg/l or less of thalium. For example, gold plating is conducted under the conditions of 10A/dm<2> of pulse current density, 0.1ms of ON time and 1.9ms of OFF time by using a gold plating bath containing 50g/l of citric acid, 50g/l of sodium citrate, and 50g/l of primary potassium cyanide with 0 of thalium content. Otherwise, gold planting is conducted under the conditions of 2A/dm<2> of pulse current density, 0.1ms of ON time and 0.1ms of OFF time by using a gold plating bath containing 30g/l of citric acid, 50g/l of sodium citrate, 140g/l of secondary hydrogen potassium phosphate, 50g/l of primary gold potassium cyanide with 1mg/l of thalium content.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はプラスチックパッケージやセラミックパッケー
ジ等の半導体集積回路用電子部品の所要部分に金めつき
を施す方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for applying gold plating to required portions of electronic components for semiconductor integrated circuits such as plastic packages and ceramic packages.

(従来の技術及び発明が解決しようとする課題)プラス
チックパッケージなどの半導体集積回路用電子部品には
高い信頼性が要求されるため従来から金めつきが施され
ているが、1979年の金価格の高騰により、その必要
な部分だけに高速度で金めつきを行い生産性を向上させ
ることが望まれている。
(Prior art and problems to be solved by the invention) Electronic components for semiconductor integrated circuits such as plastic packages are required to have high reliability, so gold plating has been applied to them for a long time. Due to the rising price of gold, it is desired to improve productivity by applying gold plating only to the necessary parts at high speed.

従来、半導体集積回路用電子部品l\の金めっきはタリ
ウム等の添加剤を10mg/&以上含むめっき浴を使用
して直流法でめっきされている。この方法でめっき速度
を速めて生産性を向上させるため、高い電流密度(例え
ばI A / d rn ”以上)でめっき作業を行お
うとすると、めっき皮膜中に添加剤であるタリウムが多
量(100p p rn以上)に共析してくる。しかし
ながら、この多量のタリウムが共析すると、金めつき表
面でタリウムの酸化物を形成し、後工程であるワイヤー
ボンディング工程においてワイヤーと金めっき1121
模とが良好に接合しない、耐熱性試験時におけるタリウ
ムの拡散移動による接合力等の不良を生しる。
Conventionally, electronic components for semiconductor integrated circuits are plated with gold by a direct current method using a plating bath containing 10 mg/& of additives such as thallium. In order to increase the plating speed and improve productivity using this method, when plating is performed at a high current density (for example, I A / drn'' or higher), a large amount of thallium (100 p p However, when this large amount of thallium eutectoids, it forms thallium oxide on the gold-plated surface, and the wire and gold plating 1121 form in the post-process wire bonding process.
This results in problems such as poor bonding between the molds and poor bonding strength due to diffusion and movement of thallium during heat resistance tests.

したかって、現在ではタリウムの共析量を少なくするた
め、直流法により0.25A/dm2程度の低電a密度
でめっき作業をしている。その結果、めっきに長時間を
要し、めっきの生産性は低いものとなっている。
Therefore, in order to reduce the amount of thallium eutectoid, plating is currently performed using a direct current method at a low electrode density of about 0.25 A/dm2. As a result, plating takes a long time and plating productivity is low.

一方、タリウム等の添加剤を含有させないめっき浴を用
いて直流法で金めつきを施した場合は、金めつき皮膜は
無光沢で1■雄ならのしか得られず、半導体集積回路用
の電子部品用金めっ金として満足できる特性を有しない
On the other hand, when gold plating is performed by the direct current method using a plating bath that does not contain additives such as thallium, the gold plating film is matte and only 1.5 mm thick is obtained, making it suitable for semiconductor integrated circuits. It does not have satisfactory properties as a gold plating for electronic parts.

(課題を解決するための手段) 本発明は上記のような課題を解決した半導体集積回路用
電子部品の金めつき法を提供するもので、金めつき皮膜
中のタリウム共析量をl 00 P 9m以下に減少さ
せ、ワイヤーボンディング性等の特性が潰れた半導体集
積回路用電子部品の金めつき皮膜を高速度でえることを
可能とするものであり、すなわち、クエン酸又はクエン
酸塩を含み、かつタウムを1 m g / 1以下含有
する金シアン化物めっき浴を用い、定電流パルス法によ
って電子部品に金めつきを施すこと分特徴とする半導体
集積回路用電子部品の金めつき法である。
(Means for Solving the Problems) The present invention provides a gold plating method for electronic components for semiconductor integrated circuits that solves the above-mentioned problems. It is possible to obtain gold plating films for electronic components for semiconductor integrated circuits at a high speed with reduced P of 9 m or less and whose characteristics such as wire bondability are destroyed. A method for gold plating electronic components for semiconductor integrated circuits, characterized in that gold plating is applied to electronic components by a constant current pulse method using a gold cyanide plating bath containing 1 mg/1 or less of taum. It is.

本発明においては、クエン酸又はクエン酸塩をめっき洛
中に含有せしめているが、これによって金めつき浴の適
正p hが安定的に保持できるものであり、通常30〜
80g/e含有せしめられている。金シアン化物として
は、シアンfヒ第−金カリウム、シアン化第−金アンモ
ニウムなどが用いられ、そのめっき中の含有量は5〜5
0g7”/程度である。
In the present invention, citric acid or citrate is contained in the plating bath, which allows the gold plating bath to stably maintain an appropriate pH, usually 30-30.
It is made to contain 80g/e. As the gold cyanide, cyanide potassium potassium arsenide, ammonium gold cyanide, etc. are used, and the content in the plating is 5 to 5.
It is about 0g7”/.

ところで従来、金めつき浴中にはタリウムを含有せしめ
ているが、この理由はタリウムが金めつき表面で吸着と
脱着を繰り遅しながら電析した金めつき粒子を適正な大
きさの結晶に調整する代用があるためである。それ故、
高い電流密度(IA/ d m ”以上)で高い生産性
のめっき作業を行おうとすると、金めつき表面における
タリウムの脱着が阻害され、結果的にその共析量が増加
し、不良な金めつき皮膜層が形成される。
Conventionally, gold plating baths contain thallium.The reason for this is that thallium slowly adsorbs and desorbs on the gold-plated surface, converting the electrodeposited gold particles into crystals of appropriate size. This is because there is a substitute for adjustment. Therefore,
Attempting to conduct plating operations with high productivity at high current densities (more than IA/dm'') inhibits the desorption of thallium on the gold-plated surface, resulting in an increase in the amount of eutectoid deposits and the formation of defective gold plating. A coating layer is formed.

そこで、本発明では定電流パルス法を採用する。Therefore, in the present invention, a constant current pulse method is adopted.

この方法は、間欠的に電流を流すめっき法であり、電流
のオン・オフが定期的に繰り返されるものである。本発
明においては、定電流パルス法を採用したことにより、
萌記電流がオフになる時間、すなわち電流が流れない時
間にタリウムの脱着が促進されるため、金めつき皮膜中
のタリウム共析量が減少するものと考えられる。本発明
にしたがってめっき洛中のタリウム添加量を従来法の1
/10(lppm)に低減し、パルス電流密度(電流が
オンの時に流れる電流の電流密度)を高くして(2A 
/ d m ”以上〉金めつきを施した場き、従来法で
あるタリウムをlomg/1以上含むめっき浴を使用す
る低−[流密度の直流法によって作製した製品と同笠の
特性を有する金めっき皮膜を得ることか可能となった。
This method is a plating method in which current is passed intermittently, and the current is turned on and off periodically. In the present invention, by adopting the constant current pulse method,
It is thought that the amount of thallium co-deposited in the gold plating film decreases because the desorption of thallium is promoted during the time when the Moeki current is off, that is, the time when no current flows. According to the present invention, the amount of thallium added during plating is reduced to the level of the conventional method.
/10 (lppm), and the pulse current density (the current density of the current flowing when the current is on) was increased (2A
/ dm" or more> When gold plating is applied, the product has the same characteristics as the product manufactured by the conventional method of low flow density direct current method using a plating bath containing thallium of log/1 or more. It became possible to obtain a gold plating film.

一方、タリウムを含まないめっき浴を使用した場き、?
を来の直流法では171 Ntなめつき皮膜となってし
まう6しかし、本発明における定電流パルスめっき法を
採用してパルス電流密度を非常に高く(10A / d
 m ”以上)設定してめっき作業を行うと、瞬間的に
多くの金の結晶核が高範囲に生成するものと考えられ、
その結果、緻密で光沢のある金めつき皮膜が得られるも
のである。
On the other hand, when using a plating bath that does not contain thallium?
However, by adopting the constant current pulse plating method of the present invention, the pulse current density is extremely high (10 A / d).
It is thought that when plating is performed with a setting of 1.5 m or more, a large number of gold crystal nuclei will be instantaneously generated in a wide range.
As a result, a dense and shiny gold plating film is obtained.

本発明における定電流パルスの使用条件としては、■タ
リウム不含のめっき浴の場き、パルス電流密度10〜1
00A/dm2、パルスオン時間0.1〜10m5ec
、平均電流密度0.1〜05A/dm2、■タリウム含
有量 l m g / 1の場合、パルス電流密度2〜
5A/dm2、パルスオン時間0.1〜10m5ec、
平均電流密度0゜1〜LA/dm2が好ましい。
The conditions for using the constant current pulse in the present invention are: (1) When using a thallium-free plating bath, the pulse current density is 10 to 1
00A/dm2, pulse on time 0.1~10m5ec
, average current density 0.1~05A/dm2, ■When thallium content l m g/1, pulse current density 2~
5A/dm2, pulse on time 0.1-10m5ec,
An average current density of 0°1 to LA/dm2 is preferred.

本発明において使用される金めつき浴はクエン酸又はク
エン酸塩含有浴であり、例えば(A)クエン酸510g
/l、クエン酸ナトリウム(あるいはクエン酸カリウム
、あるいはクエン酸アシ・モニウム)50g/l、さら
にシアン化第−金カリウム10〜50g/Nを含有した
ものと基本浴とし、また、例えば(B)クエン酸30 
g / i!、クエン酸ナトリウム(あるいはクエン酸
カリウム、あるいはクエン酸アンモニウム)50g/N
、リン酸二水素カリウム140g、#、さらにシアン化
第−金カリウム10〜50g/Zを基本浴としたものに
タリウムをO〜1mg/N添加したものである。これら
のめっき浴のP Hは3.7〜4.5であり、浴温50
〜70℃でめっき作業を行うものである。
The gold plating bath used in the present invention is a citric acid or citrate containing bath, for example (A) 510 g of citric acid.
/l, sodium citrate (or potassium citrate, or acimonium citrate) 50 g/l, and further containing potassium gold cyanide 10 to 50 g/N, and for example (B) citric acid 30
g/i! , sodium citrate (or potassium citrate, or ammonium citrate) 50g/N
, 140 g of potassium dihydrogen phosphate, #, and 10 to 50 g/Z of potassium cyanide were used as a basic bath to which 0 to 1 mg/N of thallium was added. The pH of these plating baths is 3.7 to 4.5, and the bath temperature is 50
Plating work is performed at ~70°C.

ところで、従来の直流法で作製した金めつき皮膜はその
膜厚が薄い(21Im以下)場合は、それに小孔が多数
存在し、その孔を通して下地のニッケルが金めつき表面
に拡散し酸化物を形成する結果、ダイボンディング工程
においてICチップと金めっきとの融着を阻害する問題
がある。このため、現在では膜厚を3〜’Bmに厚くし
てニッケルの拡散を防止して上記問題に対処している。
By the way, if the gold-plated film produced by the conventional DC method is thin (21 Im or less), it will have many small pores, and the underlying nickel will diffuse to the gold-plated surface through these pores, causing oxides to form. As a result, there is a problem that the fusion between the IC chip and the gold plating is inhibited in the die bonding process. For this reason, at present, the above-mentioned problem is dealt with by increasing the film thickness to 3-'Bm to prevent nickel diffusion.

本発明の定電流パルス法はこの孔の数を減少させるのに
有効なめっき法であり、従来の約半分のj膜厚に薄くし
ても同等の機能を有する金めつき皮膜を得ることができ
半導体集積回路用電子部品製造のコストダウンに大きく
寄与するものである。
The constant current pulse method of the present invention is an effective plating method for reducing the number of holes, and it is possible to obtain a gold plating film with the same functionality even if the film thickness is reduced to approximately half that of the conventional method. This greatly contributes to reducing the cost of manufacturing electronic components for semiconductor integrated circuits.

(実施例) 実施例1 タリウム −+1LOrロー2のめっき′ミクエン酸 
        50g//クエン酸ナトリウム   
50g/l シアン化第−金カリウム 50 g / I!上記の金
めつき浴を使用して撹拌しながら浴温的60°Cで、セ
ラミックパッケージ、基板に、以下のパルス条件により
金めつきを行った。
(Example) Example 1 Plating of thallium-+1LOrlow2'micitric acid
50g // Sodium citrate
50g/l Potassium gold cyanide 50g/I! Gold plating was performed on ceramic packages and substrates using the above gold plating bath under the following pulse conditions at a bath temperature of 60° C. while stirring.

じに盈ゑ許 パルス電流密度      10A/dm2パルスオン
時間      0.1msパルスオフ時間     
 1.9rns上記のめっき浴及び条f![で金めっき
fTE″5を行ったところ、金めつき層にタリウムの共
析がなく、しかも半導体集積回路用電子部品製造めっき
として必要な優れたワイヤーポンデイグ性、ダイボンデ
ィング性及び耐食性を有する金めつき皮膜が得られな。
Allowable pulse current density 10A/dm2 Pulse on time 0.1ms Pulse off time
1.9rns above plating bath and process f! [When gold plating fTE''5 was performed, the gold plating layer did not eutectoid thallium and had excellent wire bonding properties, die bonding properties, and corrosion resistance necessary for plating for manufacturing electronic components for semiconductor integrated circuits. Gold plated film cannot be obtained.

なお、定電流パルス法における平均電流密度は、直流法
の電流密度に相当し、実施例1の場合0゜5 A / 
d m 2となり、従来の直流法の一般的電流密度0.
25A/dm2に比較し、2倍の電流密度、即ち2倍の
速度でめっき作業が行われるものである。そして、本発
明における平均電流密度は、めっきの生産性及び皮膜特
性の観点から、0.1〜0.5A/dm2が好ましい。
Note that the average current density in the constant current pulse method corresponds to the current density in the direct current method, and in the case of Example 1, it was 0°5 A /
d m 2, and the general current density of the conventional DC method is 0.
Compared to 25 A/dm2, plating work is performed at twice the current density, that is, twice the speed. The average current density in the present invention is preferably 0.1 to 0.5 A/dm2 from the viewpoint of plating productivity and film properties.

実施例2: タリウム  量1m−pのめっき谷 クエン酸          30g/lクエン酸ナト
リウム    50g/lリン酸二水素カリウム  1
40g/lシアン化第−金カリウム  50g/i!上
記の金めつき浴を使用して浴温的60°Cで、セラミッ
クパッケージ基板に、以下のパルス条件により金めつき
を行った。
Example 2: Thallium amount 1m-p plating valley Citric acid 30g/l Sodium citrate 50g/l Potassium dihydrogen phosphate 1
40g/l potassium gold cyanide 50g/i! Gold plating was performed on a ceramic package substrate using the above gold plating bath at a bath temperature of 60° C. under the following pulse conditions.

些上又孟丑 パルス電流密度       2Δ/ d rn 2パ
ルスオン時間       0.1msパルスオフ時間
       0.1msこのパルス条件下では平均電
流密度がI A 、−′dm2となり、直流法の通常電
流密度0.25A/dm2と比較して4倍の電流密度、
即ち4倍の速度でめっき作業が可能となった。なお、実
施例2の条件で作製した金めつき皮膜中へのタリウム共
析量は約70ppmであり、これはワイヤーボンデイグ
不良と生じ始めるといわれているタリウム共析量1 o
 o p p rnよりも低いものであって、良好なワ
イヤーボンディング性ひ有している。
Pulse current density 2Δ/d rn 2 pulse on time 0.1 ms Pulse off time 0.1 ms Under this pulse condition, the average current density is I A , -'dm2, and the normal current density for the DC method is 0.25 A/ 4 times the current density compared to dm2,
In other words, it has become possible to perform plating work four times faster. The amount of thallium eutectoid in the gold plating film produced under the conditions of Example 2 was approximately 70 ppm, which is 1 o eutectoid, which is said to begin to cause wire bonding defects.
It is lower than o p p rn and has good wire bonding properties.

(発明の効果) 上記のとおり、クエン酸又はクエン酸塩を3み、かつタ
ウムを1 m g / 1以下含有する金シアンfヒ物
めっき浴を用い、定電流パルス法によって半導体集積回
路用電子部品に金めつきを施す本発明の金めつき法によ
れば、タリウム含有量の極めて少ない金めつき浴を用い
てワイヤーボンデづング性等の特性が優れた電子部品の
金めつき皮膜を高速度(高生産性)で得ることができる
(Effects of the Invention) As described above, electronics for semiconductor integrated circuits were manufactured by a constant current pulse method using a gold cyanide plating bath containing citric acid or citrate and 1 mg/1 or less of taum. According to the gold plating method of the present invention for applying gold plating to parts, a gold plating film with excellent properties such as wire bonding properties can be formed on electronic parts using a gold plating bath with an extremely low thallium content. Can be obtained at high speed (high productivity).

Claims (3)

【特許請求の範囲】[Claims] (1)クエン酸又はクエン酸塩を含み、かつタウムを1
mg/l以下含有する金シアン化物めっき浴を用い、定
電流パルス法によって電子部品に金めっきを施すことを
特徴とする半導体集積回路用電子部品の金めっき法。
(1) Contains citric acid or citrate and contains 1 tauum
A method for gold plating electronic components for semiconductor integrated circuits, which comprises plating gold on electronic components by a constant current pulse method using a gold cyanide plating bath containing mg/l or less.
(2)金シアン化物めっき浴が、タリウムを実質的に含
有しないものである請求項1に記載の半導体集積回路用
電子部品の金めっき法。
(2) The gold plating method for electronic components for semiconductor integrated circuits according to claim 1, wherein the gold cyanide plating bath does not substantially contain thallium.
(3)金シアン化物めっき浴が、リン酸塩を含有してい
る請求項1又は請求項2に記載の半導体集積回路用電子
部品の金めっき法。
(3) The gold plating method for electronic components for semiconductor integrated circuits according to claim 1 or 2, wherein the gold cyanide plating bath contains a phosphate.
JP6581888A 1988-03-22 1988-03-22 Gold plating method for electronic components for semiconductor integrated circuits Expired - Lifetime JPH0622252B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6581888A JPH0622252B2 (en) 1988-03-22 1988-03-22 Gold plating method for electronic components for semiconductor integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6581888A JPH0622252B2 (en) 1988-03-22 1988-03-22 Gold plating method for electronic components for semiconductor integrated circuits

Publications (2)

Publication Number Publication Date
JPH01239856A true JPH01239856A (en) 1989-09-25
JPH0622252B2 JPH0622252B2 (en) 1994-03-23

Family

ID=13297988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6581888A Expired - Lifetime JPH0622252B2 (en) 1988-03-22 1988-03-22 Gold plating method for electronic components for semiconductor integrated circuits

Country Status (1)

Country Link
JP (1) JPH0622252B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6815316B2 (en) 2000-04-27 2004-11-09 Sumitomo Electric Industries, Ltd. Apparatus for fabricating compound semiconductor device
CN111819310A (en) * 2018-03-07 2020-10-23 住友电气工业株式会社 Coating film and coated member

Cited By (6)

* Cited by examiner, † Cited by third party
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US6815316B2 (en) 2000-04-27 2004-11-09 Sumitomo Electric Industries, Ltd. Apparatus for fabricating compound semiconductor device
CN111819310A (en) * 2018-03-07 2020-10-23 住友电气工业株式会社 Coating film and coated member
JPWO2019172010A1 (en) * 2018-03-07 2021-02-18 住友電気工業株式会社 Plating film and plating coating member
EP3763851A4 (en) * 2018-03-07 2021-12-15 Sumitomo Electric Industries, Ltd. Plating film and plated member
US11380602B2 (en) 2018-03-07 2022-07-05 Sumitomo Electric Industries, Ltd. Plating film and plated member
CN111819310B (en) * 2018-03-07 2022-11-25 住友电气工业株式会社 Coating film and coated member

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