JPH01238285A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To speed-up image processing by generating a first read pulse simultaneously with the inputting of an external trigger, driving a vertical shift register with a vertical transfer pulse having a high frequency, generating a second read pulse after exhausting all the charges in the register, and transferring this pulse with a vertical transfer pulse at normal speed. CONSTITUTION:Charges are transferred from a photodetective part 10 to the vertical shift register 11 with a TG pulse at a rising point of time A, however, during a period in which no pulses are impressed, the photoelectrically converted charges are accumulated. Thereafter, in a period of time B, the accumulated charges are transferred to a shift register 12; the frequency of the pulse is set a value above a value necessary for all the charges in the register 11 to be completely transferred. Later at a point of time C, thus transferred charges are transferred to the shift register 11, then transmitted to an amplifier 13 via the register 12. In such a way, a field of video by an external trigger is fetched, also, picking-up of an image in the shutter mode is made possible.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a solid-state imaging device using a solid-state imaging device.
In particular, the present invention relates to a solid-state imaging device capable of shutter operation within a short time in response to input of a trigger signal from the outside.

[Conventional technology]

Conventionally, this type of solid-state imaging device was unable to respond to the trigger signal because the synchronization signal generation circuit of the solid-state imaging device was not reset even when a trigger signal was input from an external source. It has been necessary to wait for a considerable period of time, up to one vertical scanning period, after the trigger signal is input, and the time taken until the trigger signal is reset is irregular.

[Problem to be solved by the invention]

The above-mentioned conventional solid-state imaging devices have disadvantages in that the phase of the output signal does not match the input trigger signal because it cannot respond to the input trigger signal, has a long standby time, and has a different reset period. .

[Means to solve the problem]

The solid-state imaging device of the present invention has a CCD solid-state imaging device using an interline transfer method or a frame transfer method, a driving circuit thereof, and a synchronization signal generation circuit, and the synchronization signal generation circuit starts operating in response to an external trigger signal. have. The drive circuit generates the first read pulse from the light receiving section of the CCD at the same time as the external trigger signal input or within one horizontal scanning period, and after generating the first read pulse, generates a vertical transfer pulse higher than the normal frequency. After a predetermined time, a second read pulse is generated, followed by a normal frequency vertical transfer pulse.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. The solid-state image sensor 1 is a CCD solid-state image sensor using an interline transfer method or a frame transfer method, and a drive circuit 2
generates various drive pulses for the solid-state image sensor 1. The synchronization signal generation circuit 3 has a configuration that allows synchronization to be reset by an external trigger signal, and also has a configuration that allows external synchronization operation. This synchronizing signal generation circuit 3 supplies signals necessary for driving the drive circuit 2. φ81
.phi.H2 represents a driving pulse for the horizontal transfer register of the solid-state image sensor 1, and .phi.v1 to .phi.v4 represent driving pulses for the vertical transfer register.

FIG. 2 shows the structure of an interline transfer type CCD solid-state image sensor. Also, Figure 3 shows C in Figure 2.
3 is a timing chart showing drive pulses applied to each part of a CD solid-state image sensor. In FIG. 2, the light receiving section 10 receives light and accumulates it as a charge. The vertical shift register 11 receives charges from the light receiving section 10 and transfers them to the horizontal shift register 12. The horizontal shift register 12 transfers the charge to the output amplifier 13, from where it is output as a voltage signal.

In the timing chart of FIG. 3, the TG pulse at time A causes the vertical shift register 11 to move from the light receiving section 10 to the vertical shift register 11.
Charge transfer takes place. The light receiving section 10 has a structure in which charges resulting from photoelectric conversion of incident light are accumulated during a period when no TG pulse is applied, and therefore, the period until the next TG pulse is applied is a charge accumulation period. Become. Vertical transfer pulse φ7 at time B. ~φv4 is a pulse for transferring the charge transferred at time A to the horizontal shift register 12, and is set higher than the normal frequency. This frequency is set to be greater than or equal to the value necessary to transfer all the charges that have entered the vertical shift register within the vertical blanking period. At time C, the TG pulse is output again, and the charges accumulated in the light receiving section 10 between time A and time C are transferred to the vertical shift register 11. Timed vertical transfer pulse φv
1 to φv4 are set to a normal frequency (horizontal scanning frequency), and the charges transferred at time C are continuously transferred for one field to the horizontal shift register. The horizontal shift register 12 performs a complete horizontal shift once per horizontal scanning period.
A transfer pulse is applied so that the charge accumulated in the l/register is transferred to the output amplifier 13. At time C, charges are transferred from the vertical shift register even during the horizontal transfer period, but this information is deleted as unnecessary components within the vertical blanking period.

Now, let us consider a case where a solid-state imaging device is operated by inputting a trigger signal from the outside. When a trigger signal is input from the outside, the synchronization signal generation circuit 3 is reset, and at the same time, the TG pulse at time A in FIG. 3 is applied to the drive circuit 2.
It is output from The synchronization signal generation circuit 3 is set so that the vertical blanking period starts immediately after the reset is performed. Further, in the drive circuit 2, the start timing of the TG pulse of time C is set by an external setting, and control is performed so that the vertical blanking period is adjusted according to the length.

〔Effect of the invention〕

As explained above, the present invention generates the first read pulse simultaneously with the input of an external trigger, drives the vertical shift register with a high frequency vertical transfer pulse, sweeps out all the charges in the vertical shift register, and then reads the second read pulse. By generating readout pulses and transmitting them with normal speed vertical transfer pulses, it is possible to capture the image of the field input by the external trigger, and at the same time, it is possible to obtain imaging in shutter mode, which allows image processing. This has the effect of promoting faster speeds.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a structural diagram of a solid-state imaging device, and FIG. 3 is a timing chart of the embodiment of FIG. DESCRIPTION OF SYMBOLS 1... Solid-state image sensor, 2... Drive circuit, 3... Synchronization signal generation circuit, 10...
Light receiving section, 11...Vertical shift register, 12-
...Horizontal shift register, 13...Output amplifier. Agent Patent attorney Uchi Hara Pitch name 1

Claims (1)

[Claims] CC of interline transfer method or frame transfer method
D. A solid-state imaging device comprising a solid-state imaging device, a driving circuit for the solid-state imaging device, and a synchronization signal generation circuit, the synchronization signal generation circuit starting to operate in response to an external trigger signal. The first read pulse for extracting the charge from the section is generated at the same time as the external trigger signal input or within one horizontal scanning period, and after the first read pulse ends, a vertical transfer pulse with a higher frequency than the normal frequency is applied for a predetermined period. A solid-state imaging device characterized in that a second read pulse is generated from the light receiving section after the period, and a vertical transfer pulse of a normal frequency is subsequently generated.