JPH10233947A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an inexpensive image pickup device that performs digital output by providing a digital interface that outputs image data and generating a basic clock that operates a device with the data rate of the digital interface as reference. SOLUTION: A moving image is taken into a personal computer without needing a video capture board by providing an interface 5 that outputs digital video data. Because a basic clock CLK 2 that divides a clock CLK 1 that is outputted from an oscillator 10 which decides the data rate of the interface 5 and drives a camera part is created, video data that corresponds to the transfer rate of the interface 5 is created. Further, the basic clock CLK 2 is supplied to a camera part only while the interface 5 can transfer video data and operates the camera part with a mean data rate of the interface 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an image pickup apparatus suitable for inputting an image to a personal computer.

[0002]

2. Description of the Related Art Hitherto, an image pickup apparatus using a solid-state image pickup device has often been used by being connected to a television monitor having a video input terminal. For this reason, the video signal output by the imaging device is an analog signal based on a television standard such as NTSC or PAL, and the imaging device itself has naturally operated at a speed based on the television standard.

[0003]

In recent years, there has been an increasing demand for capturing images taken by an image pickup apparatus into a personal computer. Since the signal is a signal, when an image captured by the imaging device is input to a personal computer, a board for converting an analog signal based on a television standard output by the imaging device into a digital signal (video capture board) ) Was needed. The video capture board has a data rate when an analog signal based on a television standard is converted into a digital signal (A / D conversion), and an interface for transferring video data after the A / D conversion to a personal computer. Because of different data rates, the mainstream method is to temporarily record one field or one frame of image data in a large-capacity buffer memory and read it back at the speed of a personal computer.

It is an object of the present invention to provide an inexpensive digital output imaging apparatus which can capture moving images in a personal computer without requiring a video capture board or a large-capacity buffer memory.

[0005]

In order to solve the above-mentioned problems, the present invention provides a digital interface for outputting image data to an image pickup apparatus, and sets the image pickup apparatus based on the data rate of the digital interface. A basic clock for operation is generated.
Further, the present invention provides an image pickup device, a driving unit for driving the image pickup device, a signal processing unit for processing an output signal from the image pickup device, and a data transfer unit for transferring output data of the signal processing unit. An image pickup apparatus having a basic clock generating means for generating a basic clock for operating the image sensor, the driving means, and the signal processing means based on a data rate of the data transfer means.

The present invention provides an image pickup device, a driving unit for driving the image pickup device, a signal processing unit for processing an output signal from the image pickup device, and a data transfer unit for transferring output data of the signal processing unit. Wherein the data rate of the data transfer means is R, and the data rate of the image sensor is 1
Assuming that the number of pixels read out during the horizontal scanning period is M, and the number of lines read out during one field period is L, the number of fields F per unit time is F = R / (MLN) (N is A basic clock generating means for generating a basic clock for operating the image sensor, the driving means, and the signal processing means so as to be a natural number is provided.

Further, the present invention provides the basic clock generating means for generating a basic clock from a clock for operating the data transfer means, or for generating a basic clock from a clock supplied from outside the imaging apparatus. Was generated. Further, the present invention provides a basic clock control unit in which the basic clock generation unit supplies the basic clock to the image sensor, the driving unit, and the signal processing unit only during a period in which the data transfer unit can transfer the data. Provided. In addition, the present invention provides a buffer memory for temporarily recording an output signal of the signal processing means, and the basic clock to the image pickup device, the driving means, and the signal processing means when the capacity of the buffer memory becomes small. A basic clock control means for stopping the supply of the clock is provided.

With this configuration, it is possible to realize an inexpensive digital output imaging apparatus that can capture moving images in a personal computer without requiring a video capture board or a large-capacity buffer memory.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a first embodiment of an imaging apparatus according to the present invention will be described with reference to FIG. The image pickup apparatus according to the present embodiment includes an image pickup device 1,
/ N improvement / automatic gain control (CDS / AGC) circuit 2;
An analog / digital (A / D) converter 3, a signal processing unit 4, an interface 5, a clock control unit 7, a clock conversion circuit 8, an image sensor driving circuit / synchronous signal generation circuit 9, and an oscillator 10 It is configured to have.

The configuration of the present embodiment will be described below. For example, an imaging device 1 composed of a CCD device and a CDS / AGC circuit 2
Are driven by a control signal from the image sensor driving circuit / synchronous signal generating circuit 9. The output signal read from the image sensor 1 is supplied to the CDS / AGC circuit 2, where the signal is amplified to be an analog signal whose S / N is improved and whose gain is controlled. The output signal of the CDS / AGC circuit 2 is supplied to an A / D converter 3, where it is converted into a digital signal. The A / D converter 3 is driven by the basic clock CLK2 converted by the clock conversion circuit 8.

The digital output signal of the A / D converter 3 is
The signal is supplied to the signal processing unit 4 driven by the basic clock CLK2. Output signals of the signal processing unit 4 and the image sensor driving circuit / synchronous signal generation circuit 9 are output to the outside via the interface 5.

The interface 5 is provided with a video signal from the signal processing unit 4, a control signal from the image sensor driving circuit / synchronous signal generation circuit 9, and a clock C from the oscillator 10.
LK1 and the basic clock CL from the clock conversion circuit 8
K2 is input. Further, control data is input to the interface 5 from outside the imaging device, and the interface 5 can operate according to a request (control data) of the external device.
Driven by the clock CLK1.

The oscillator 10 generates a clock CLK1 at an operating speed of the external device or a speed related to the operating speed, and the clock CLK1 is supplied to the interface 5 and the clock conversion circuit 8.

The control data input from outside the image pickup device is supplied to the clock control unit 7 via the interface 5. The clock control unit 7 supplies control data to the clock conversion circuit 8. This control data is transmitted during the period when the interface 5 is operable.
This is data for operating the K conversion circuit 8. The basic clock CLK2 output from the clock conversion circuit 8 is supplied to the image sensor driving circuit / synchronization signal generation circuit 9 and the A / D converter 3
Are supplied to the signal processing unit 4 and the interface 5.

Next, the operation will be described. First, an operation until an output signal of the imaging element 1 is output to the outside of the imaging device will be described. The output signal (video signal) of the image sensor 1 is subjected to noise reduction processing and processing for keeping the signal level constant at the CDS / AGC circuit 2, and is converted to a digital signal at the A / D converter 3. The digitally converted video signal is subjected to signal processing as a camera (imaging device) such as luminance signal processing and color signal processing in the signal processing unit 4. The luminance signal and the chrominance signal output from the signal processing unit 4 are converted into an output format of a digital video signal output from the imaging device by the interface 5 and output to the outside of the imaging device in synchronization with the clock CLK1 of the oscillator 10.

The interface 5 outputs a luminance signal or a chrominance signal as it is as parallel data or alternately outputs a luminance signal and a chrominance signal in accordance with a data transmission method with an external device. Either a parallel interface or a serial interface that outputs a luminance signal or a color signal as 1-bit serial data can be used. In addition, signals representing the horizontal and vertical references of the image output from the image sensor driving circuit / synchronous signal generating circuit 9 are also transmitted from the interface 5.
And is added to the luminance and color data and output to the outside of the imaging device.

Next, the operation of controlling the basic clock for driving the camera unit will be described. The clock CLK1 output from the oscillator 10 is a clock having a frequency based on the standard of the interface 5 for connecting the imaging device to a personal computer or the like. The clock CLK1 output from the oscillator 10 is input to the clock conversion circuit 8, and the basic clock CLK2 for driving the camera unit is generated by dividing the frequency as necessary to drive the camera unit. For example, the output format of the digital video signal output from the imaging device is serial data, and the output signal of the signal processing unit 4 is luminance 8
In the case where the bit and the two types of color differences are each 8 bits, and the ratio between the luminance and the data rate of the two types of color difference is 4: 2: 2, the clock CLK1 output from the oscillator 10 is used.
If the frequency is divided by at least 16, the interface 5
The data amount output from the signal processing unit 4 does not become larger than the data amount of the luminance signal or the color signal output from the.

In this case, the number of fields F per unit time is R, the data rate of the interface 5 is M, the number of pixels read out in one horizontal scanning period of the image sensor 1 is M,
Assuming that the number of lines read during one field period is L, F = R / (MLN) (N is 16 in this example). Further, it is determined whether or not video data can be transferred to the outside of the imaging device based on control data input to the clock control unit 7 from the outside of the imaging device via the interface 5, and the camera unit is driven based on the determination result. A signal for controlling whether or not a clock is supplied to the image sensor driving circuit / synchronous signal generation circuit 9, the A / D converter 3, the signal processing unit 4, and the interface 5 is supplied from the clock control unit 7 to the clock conversion circuit 8. .

According to the present embodiment, by providing the interface 5 for outputting digital video data, it is possible to realize an imaging apparatus that can capture a moving image into a personal computer without requiring a video capture board. In addition, since the clock CLK1 output from the oscillator 10 that determines the data rate of the interface 5 is divided to generate the basic clock CLK2 for driving the camera unit, the interface 5
The basic clock is supplied to the camera unit only during a period in which the interface 5 can transfer the video data, and the camera unit is operated at the average data rate of the interface 5. With this configuration, the amount of data output from the signal processing unit 4 is not larger than the amount of data output from the interface 5, and an inexpensive digital output camera that does not require a large-capacity buffer memory is realized. can do.

Referring to FIG. 2, the configuration of an image pickup apparatus according to a second embodiment of the present invention will be described. In this embodiment,
A mechanical shutter 1 according to the embodiment shown in FIG.
3 and an example in which a shutter control unit 14 is added. The configuration other than the added portion is the same as that of the embodiment shown in FIG. 1, and therefore the description is omitted, and only the added portion will be described. The following is the configuration of the added part. The clock CLK1 generated by the oscillator 10 is supplied to the shutter control unit 14. The control signal output from the image sensor driving circuit / synchronous signal generation circuit 9 is supplied to the shutter control unit 14. A control signal output from the shutter control unit 14 is supplied to the mechanical shutter 13. The mechanical shutter 13 limits the exposure time of the image sensor 1.

Next, the operation will be described. For example,
When the image pickup device 1 is a CCD sensor, a signal indicating that the electric charge accumulated in the sensor has been transferred to the CCD is sent from the image pickup device drive circuit / synchronous signal generation circuit 9 to the shutter control unit 14. The shutter control unit 14 opens the mechanical shutter 13 for a certain period of time and closes it again to capture an image of the next field. The time is managed by the clock CLK generated by the oscillator 10.
Perform by 1.

In this embodiment, the mechanical shutter 1
3. Image sensor 1 by shutter control unit 14
In this configuration, the transfer time of image data output from the interface 5 varies depending on, for example, the state of a personal computer or the like connected to the imaging apparatus, and as a result, the length of one field changes. A stable image can always be obtained even if the charge accumulation time of the sensor varies. This embodiment has substantially the same effect as the embodiment shown in FIG.

Referring to FIG. 3, the structure of an image pickup apparatus according to a third embodiment of the present invention will be described. In this embodiment,
The clock CLK1 generated by the oscillator 10 is also supplied to the image pickup device driving circuit / synchronous signal generation circuit 9 of the embodiment shown in FIG. The configuration is such that it is supplied to the clock control unit 7.

The operation of the imaging apparatus according to the embodiment of FIG. 3 will be described with reference to FIG. FIG. 4 shows that the image sensor 1 is a CCD
Image sensor drive circuit / synchronous signal generation circuit 9 in case of sensor
5 is a timing chart showing a part of the operation of FIG. FIG. 4A shows a V (vertical) blanking pulse 90, and a “low” section represents a V blanking period. FIG. 4B shows a pulse 91 for transferring the sensor charge to the CCD.
And when "low", the sensor charge is transferred. FIG.
(C) shows the sensor charge sweeping pulse 92, and "lo"
At the time of w ", the charge of the sensor is swept away. Note that FIG.
The reason why there is variation in the length of one field and the V blanking period is that the transfer time of the image data output from the interface 5 varies depending on the state of the personal computer or the like connected to the imaging apparatus. Is represented. Here, the sensor sweep pulse 92 is
The signal is output at predetermined intervals t from the rise of the V blanking pulse 90. The pulse 91 for transferring the sensor charge to the CCD is such that the V blanking pulse 90 is “low”.
, And is output when the time from the output of the sensor sweep pulse 92 reaches t.

The operation of this embodiment will be described below. The charge accumulated in the sensor portion of the image sensor 1 is transferred to the CCD when the pulse 91 for transferring the sensor charge to the CCD becomes "low". After the pulse 91 for transferring the sensor charge to the CCD is output, the sensor charge sweeping pulse 9 is output.
No. 2 becomes “low” at every predetermined time t and discards the electric charge accumulated in the sensor. This time is managed by the clock CLK1 generated by the oscillator 10.

Even if a signal for one field is read from the CCD and enters the V blanking period, if the time from the output of the sensor charge sweep-out pulse 92 has not reached t, the time becomes t. Up to the basic clock CL of the camera section
A control signal is output from the image sensor driving circuit / synchronous signal generation circuit 9 to the clock control unit 7 in order to stop K2. When the time reaches t, the basic clock CLK2 of the camera section is operated again, a pulse 91 for transferring the sensor charge to the CCD is output, and the signal of the next field is started to be read from the CCD of the image sensor 1.

In this embodiment, the pulse 91 for transferring the sensor charge to the CCD is output after the time t from when the sensor charge sweep-out pulse 92 is output becomes t. The electronic shutter operates so that the exposure time always becomes t, and the same effect as the embodiment of FIG. 2 can be obtained.

Referring to FIG. 5, the configuration of the imaging apparatus according to the third embodiment of the present invention will be described. In this embodiment, the clock control unit 7 of the embodiment shown in FIG.
This is an example in which the microcomputer 17 is replaced. The microcomputer 17 determines whether or not the interface 5 can transfer video data, and controls the clock conversion circuit 8, which has been performed by the clock control unit 7. This embodiment is shown in FIG.
The same effect can be obtained as essentially the same as the embodiment.

Referring to FIG. 6, the configuration of an imaging apparatus according to a fourth embodiment of the present invention will be described. In this embodiment,
Instead of the oscillator 10 of the embodiment shown in FIG.
This is an example in which K3 is input, and the operation is the same as the operation in the first embodiment. This configuration is effective when an interface that transmits and receives data in synchronization with the clock CLK3 of the personal computer is used. This embodiment has substantially the same effects as the embodiment of FIG.

Referring to FIG. 7, the configuration of an imaging apparatus according to a sixth embodiment of the present invention will be described. The imaging device according to this embodiment includes an imaging element 1, a CDS / AGC circuit 2,
A / D converter 3, signal processing unit 4, interface 5, clock control unit 7, clock conversion circuit 8, image sensor driving circuit / synchronous signal generation circuit 9, oscillator 10, camera oscillator 15 And the buffer memory 16
And is configured.

Hereinafter, the configuration of the present embodiment will be described. The image sensor 1 and the CDS / AGC circuit 2 are driven by a control signal from an image sensor driving circuit / synchronous signal generation circuit 9. The output signal of the image sensor 1 is supplied to the CDS / AGC circuit 2. The output signal of the CDS / AGC circuit 2 is A / D
It is supplied to the converter 3. The output signal of the A / D converter 3 is supplied to the signal processing unit 4. The output signal of the signal processing unit 4 is supplied to the buffer memory 16. The output signal of the buffer memory 16 is output to the outside via the interface 5.

The output signal (control signal) of the image pickup device drive circuit / synchronous signal generation circuit 9 is supplied to the buffer memory 16 and the clock control unit 7. The clock CLK1 generated by the oscillator 10 is supplied to the interface 5 and the buffer memory 16. The control data output from the interface 5 is supplied to the buffer memory 16 and the clock control unit 7. The clock control unit 7 supplies control data to the clock conversion circuit 8.

The clock CLK 4 generated by the camera oscillator 15 is supplied to the clock conversion circuit 8.
Clock CLK2 output from clock conversion circuit 8
Are supplied to the image sensor driving circuit / synchronous signal generation circuit 9, the A / D converter 3, the signal processing unit 4, and the buffer memory 16.

Next, the operation will be described. First, an operation until an output signal of the image sensor 1 is recorded in the buffer memory 16 will be described. The output signal of the image sensor 1 is subjected to noise reduction processing and processing to make the signal level constant at the CDS / AGC circuit 2, and is converted to a digital signal at the A / D converter 3. The digitally converted video signal is subjected to camera signal processing such as luminance signal processing and color signal processing in the signal processing unit 4. The luminance signal and the chrominance signal output from the signal processing unit 4 are temporarily recorded in the buffer memory 16. Note that the buffer memory 16 may be a small-capacity memory for at most several horizontal scanning periods. Also, signals representing the horizontal and vertical positions of the screen are input from the image sensor driving circuit / synchronous signal generation circuit 9 to the buffer memory 16 and the buffer memory 1 determined by the horizontal and vertical positions of the screen.
A luminance signal and a chrominance signal are recorded at address 6.

Next, the operation until the luminance signal and the chrominance signal recorded in the buffer memory 16 are output to the outside of the imaging device will be described. A control signal indicating whether or not the video data can be transferred to the outside of the imaging device is input from the outside of the imaging device to the interface 5, and if it can be transferred, a control signal such as an address for reading from the interface 5 to the buffer memory 16 is transmitted. send. This address signal is generated by a counter in the interface 5 indicating horizontal and vertical positions.

The luminance signal and the chrominance signal read from the buffer memory 16 are converted into an output format of a digital video signal output from the imaging device by the interface 5 and output to the outside of the imaging device in synchronization with the clock of the oscillator 10. You. Note that the interface 5 may be a parallel interface that outputs a luminance signal or a color signal as it is, or alternatively outputs a luminance signal and a color signal alternately, or a serial interface that outputs 1-bit serial data. . Oscillator 1
The clock CLK1 output from 0 is a clock having a frequency based on the standard of the interface 5 for connecting the imaging apparatus to a personal computer or the like.

Next, the basic clock CL for driving the camera unit
The operation for controlling K2 will be described. The clock CLK4 generated by the camera oscillator 15 is supplied to the clock conversion circuit 8 and converted into a basic clock CLK2 for driving the camera unit. The signals representing the horizontal and vertical positions of the screen input from the image sensor driving circuit / synchronization signal generation circuit 9 to the buffer memory 16 and the control signals such as the addresses input from the interface 5 to the buffer memory 16 are also transmitted to the clock control unit 7. input. From these two signals, the clock control unit 7 calculates how much video data has not been read out to the buffer memory 16, and sends a control signal to the clock conversion circuit 8 if it is likely to exceed the capacity of the buffer memory 16. Then, the supply of the basic clock CLK2 to the image sensor driving circuit / synchronous signal generating circuit 9, the A / D converter 3, the signal processing unit 4, and the buffer memory 16 is stopped.

According to the present invention, even when the interface 5 cannot transfer video data, the buffer memory 16
Since the camera unit can be operated until the capacity of the camera unit is exceeded, and the camera unit can transfer the video data from the interface 5 while the video data is stored in the buffer memory 16 even during the blanking period, Small-capacity buffer memory 16 and camera oscillator 16
By simply adding the, the moving image can be more efficiently taken into the personal computer. This embodiment has essentially the same effects as the embodiment shown in FIG.

The configuration of the imaging apparatus according to the third embodiment of the present invention will be described with reference to FIG. In this embodiment,
This is an example in which the clock control unit 7 of the embodiment shown in FIG. 7 is replaced with a microcomputer 17, and the calculation of how much video data that has not been read out to the buffer memory 16 is performed by the clock control unit 7. The microcomputer 17 controls the clock conversion circuit 8. This embodiment has essentially the same effects as the embodiment shown in FIG.

[0040]

According to the present invention, a digital interface for outputting image data is provided for the image pickup apparatus, and a basic clock for operating the image pickup apparatus is generated based on the data rate of the digital interface. An inexpensive digital output imaging apparatus that can capture moving images into a personal computer without the need for a buffer memory.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an imaging apparatus according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an imaging apparatus according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of an imaging device according to a third embodiment of the present invention.

FIG. 4 is a timing chart showing a part of the operation of the image sensor driving circuit / synchronous signal generating circuit according to the third embodiment shown in FIG. 3;

FIG. 5 is a configuration diagram of an imaging device according to a fourth embodiment of the present invention.

FIG. 6 is a configuration diagram of an imaging apparatus according to a fifth embodiment of the present invention.

FIG. 7 is a configuration diagram of an imaging apparatus according to a sixth embodiment of the present invention.

FIG. 8 is a configuration diagram of an imaging apparatus according to a seventh embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image sensor 2 CDS / AGC circuit 3 A / D converter 4 Signal processing unit 5 Interface 7 Clock control unit 8 Clock conversion circuit 9 Image sensor drive circuit / synchronous signal generation circuit 10 Oscillator 13 Mechanical shutter 14 Shutter control unit 15 Camera Oscillator 16 Buffer memory 17 Microcomputer 90 V blanking pulse 91 Pulse for transferring sensor charge to CCD 92 Sensor charge sweeping pulse

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Hiroaki Takagishi 5-20-1, Josuihoncho, Kodaira-shi, Tokyo In the semiconductor division of Hitachi, Ltd.

Claims (11)

[Claims] An image pickup device, a driving unit for driving the image pickup device, a signal processing unit for processing an output signal from the image pickup device, and a data transfer unit for transferring output data of the signal processing unit. In the imaging apparatus, a basic clock generation unit that generates a basic clock for operating the imaging element, the driving unit, and the signal processing unit based on a data rate of the data transfer unit is provided. Imaging device. 2. An image pickup device, comprising: a driving unit for driving the image pickup device; a signal processing unit for processing an output signal from the image pickup device; and a data transfer unit for transferring output data of the signal processing unit. In the imaging apparatus, assuming that the data rate of the data transfer unit is R, the number of pixels read out during one horizontal scanning period of the image sensor is M, and the number of lines read out during one field period is L, Basic clock generation for generating a basic clock for operating the image pickup device, the driving unit, and the signal processing unit so that the number F of images becomes F = R / (MLN) (N is a natural number) An imaging device comprising means. 3. The imaging apparatus according to claim 1, wherein the basic clock generating means generates a basic clock from a clock for operating the data transfer means. 4. The imaging apparatus according to claim 1, wherein the basic clock generation means generates a basic clock from a clock supplied from outside the imaging apparatus. 5. Basic clock control means for controlling a basic clock generating means so as to supply the basic clock to the image pickup device, the driving means and the signal processing means only during a period in which the data transfer means can transfer the data. The imaging device according to claim 1 or 2, wherein: 6. A buffer memory for temporarily recording an output signal of said signal processing means, and when the capacity of said buffer memory becomes small, said basic clock to said image pickup device, said driving means and said signal processing means is provided. 3. The imaging apparatus according to claim 1, further comprising a basic clock control unit configured to stop supply of the clock. 7. The imaging apparatus according to claim 5, wherein said basic clock control means is a microcomputer. 8. The image pickup apparatus according to claim 1, wherein data representing a horizontal and vertical reference of an image is added to the video data output from the data transfer means. 9. The imaging device according to claim 1, further comprising a shutter for limiting an exposure time of the imaging device. 10. The imaging device according to claim 9, wherein said shutter is a mechanical shutter. 11. The apparatus according to claim 9, wherein said shutter is an electronic shutter.