JP3166313B2 - Solid-state imaging device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a charge coupled device (CCD).
The present invention relates to a solid-state imaging device using a solid-state image sensor such as a CCD image sensor formed by a Charge Coupled Device, and particularly to a photoelectric conversion element corresponding to a pixel in a first field and a pixel in a second field arranged in a matrix. A frame interline transfer type that transfers imaging charges of each field obtained by a corresponding photoelectric conversion element to a storage unit via a vertical transfer register, and outputs the imaging charges from the storage unit line-sequentially via a horizontal transfer register. A solid-state imaging device including the solid-state image sensor.

[0002]

2. Description of the Related Art In general, a solid-state image sensor having a discrete pixel structure in which a plurality of photoelectric conversion elements are arranged in a matrix is required to cope with an interlaced scanning system used in a normal television system. For example, as shown in FIG. 3, photoelectric conversion elements 21 corresponding to pixels in the first field and photoelectric conversion elements 22 corresponding to pixels in the second field are alternately arranged in the vertical direction. The imaging charges obtained in the field accumulation mode are output in a line-sequential manner.

[0003] In the frame storage mode, to accumulate an imaging charge S _O, S _E over each one frame period in the state was one field period Families with one another by the photoelectric conversion elements 21, 22 of each field, as shown in FIG. 4 , The imaging charge S _O by the photoelectric conversion element 21 in the first field shown in FIG.
And the imaging charge S by the photoelectric conversion element 22 in the second field
_E is alternately read into the vertical transfer register 23 for each field during the vertical blanking period, and
4 and output in a line-sequential manner. Further, in the field accumulation mode, as shown in FIG. 5, the photoelectric conversion elements 21 and 22 of each field accumulate the imaging charges S _O and S _E for one field period, respectively. In the vertical transfer register 23, the imaging charge S _O by the photoelectric conversion element 21 and the imaging charge S _E by the photoelectric conversion element 22 in the second field are alternately combined in the vertical direction for each field during the vertical blanking period and mixed. It is read out and output line-sequentially via the horizontal transfer register 24.

That is, in a solid-state image sensor operating in the frame accumulation mode, one frame period, that is, NT
1/30 second in SC system (1/25 in PAL system)
(Seconds) as an exposure period (shutter speed), and in a solid-state image sensor operating in a field accumulation mode, one field period, that is, 1/60 second in the NTSC system (1/50 second in the PAL system). Is performed during an exposure period (shutter speed).

Here, the solid-state image sensor 20 shown in FIG. 3 converts the imaging charge obtained by the photoelectric conversion elements 21 and 22 from the vertical transfer register 23 to the horizontal transfer register 2.
4, and is known as an inter-line transfer type solid-state image sensor. Conventionally, as a solid-state image sensor, in addition to the above-mentioned interline transfer type sensor, a vertical transfer register using, for example, a CCD is formed at the photoelectric conversion element, and a vertical transfer register using a CCD is provided at the end of the vertical transfer register. A frame transfer type CC in which a storage unit constituted by a register is provided and line-sequentially output from the storage unit via a horizontal transfer register.
There are known a D image sensor and a frame interline transfer type solid-state image sensor in which an accumulation unit is provided between a vertical transfer register and a horizontal transfer register in an interline transfer type solid-state image sensor.

Conventionally, in a solid-state image sensor such as a CCD image sensor, an effective charge accumulation period (exposure period) is controlled by discarding imaging charges generated by a photoelectric conversion element into, for example, an overflow drain. A known electronic shutter function is known. The electronic shutter function is realized by controlling the overflow drain potential by a voltage (shutter pulse) applied to the substrate substrate.

[0007]

In a conventional solid-state image pickup device using a CCD image sensor having an electronic shutter function, when the exposure period is controlled by the electronic shutter function, the solid-state image sensor operates in a field accumulation mode. In principle, an image sensor can control the exposure period only within one field period, and even a solid-state image sensor operating in a frame accumulation mode can apply a shutter pulse to a substrate to apply a shutter pulse. Since the imaging charges S _O and S _{E of} each field obtained by the photoelectric conversion element corresponding to the pixel of the first field and the photoelectric conversion element corresponding to the pixel of the second field are both discarded to the overflow drain, the frame Even if the solid-state image sensor operates in the accumulation mode, Only within Rudo period there is a problem that it is impossible to control the exposure period.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-mentioned problems in the conventional solid-state imaging device, and to control an exposure period within a range from one field period to one frame period by an electronic shutter function. An object of the present invention is to provide a solid-state imaging device capable of performing an imaging operation.

[0009]

According to the present invention, the photoelectric conversion elements corresponding to the pixels in the first field and the photoelectric conversion elements corresponding to the pixels in the second field, which are arranged in a matrix, are obtained by frame storage. A solid-state imaging device including a frame interline transfer type solid-state image sensor that transfers imaging charges of each field to a storage unit via a vertical transfer register and outputs the imaging charges from the storage unit line-sequentially via a horizontal transfer register. In the apparatus, electronic shutter control is performed to discard the imaging charge obtained by the photoelectric conversion element to the overflow drain for each field, and the imaging charge of each field is alternately changed for each field immediately before being discarded to the overflow drain by the electronic shutter control. Read to the vertical transfer register of the imaging unit Reads out an imaging charge accumulation period within one field are accumulated in the photoelectric conversion elements of each field by the electronic shutter control adds the imaging charges of one field read out earlier in the vertical transfer registers,
The imaging charge added to the vertical transfer register of the imaging unit and read out is transferred at high speed from the vertical transfer register to the vertical transfer register of the storage unit during a vertical blanking period,
Driving means for driving the frame interline transfer type solid-state image sensor so as to output the imaging charge line-sequentially from the vertical transfer register of the storage section via the horizontal transfer register. It is.

[0010]

In the solid-state imaging device according to the present invention, the electronic shutter control for discarding the imaging charge obtained by the photoelectric conversion element of the frame-interline transfer type solid-state image sensor to the overflow drain for each field is performed. Immediately before being discarded to the overflow drain, the imaging charge of each field is alternately read out to the vertical transfer register of the imaging unit for each field, and the accumulation period within one field is accumulated in the photoelectric conversion element of each field by the electronic shutter control. Is added to the image transfer charge of one field previously read into the vertical transfer register, and the read image charge is added to the vertical transfer register of the image pickup unit, and the read image charge is read out during the vertical blanking period. Vertical transfer of the above storage unit from transfer register High speed transfer register, and sequentially outputs the line through the horizontal transfer register the imaging charge from the vertical transfer registers of the storage section.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the solid-state imaging device according to the present invention will be described below in detail with reference to the drawings. A solid-state imaging device according to the present invention is configured, for example, as shown in FIG.

The solid-state imaging device shown in FIG. 1 includes a CCD image sensor 10 driven by various timing signals generated by a timing signal generator 1.

The CCD image sensor 10 is a frame interline transfer type solid-state image sensor including an image pickup unit 11, a storage unit 12, and a horizontal transfer register 13.

The image pickup section 11 includes a photoelectric conversion element 14 corresponding to pixels of a first field arranged in a matrix.
And photoelectric conversion element 15 corresponding to the pixel of the second field
And a vertical transfer register 18 of the number of transfer stages corresponding to the number of scanning lines for one field in which the imaging charges S _O and S _E obtained by the photoelectric conversion elements 14 and 15 are read out via the sensor gates 16 and 17, respectively. The first field photoelectric conversion elements 14 and the second field photoelectric conversion elements 15 are alternately arranged in the vertical direction. The accumulation unit 12 accumulates imaging charges of pixels for one field, and includes a vertical transfer register 19 having the same configuration as the vertical transfer register 18 of the imaging unit 11. Further, the horizontal transfer register 13 has a transfer stage number corresponding to the number of pixels in one line.

As shown in FIG. 2, the timing signal generator 1 includes a shutter pulse P _SHT for controlling an electronic shutter applied to a substrate substrate of the CCD image sensor 10 and the image pickup of the CCD image sensor 10. First opening of the sensor gates 16 and 17 of the section 11
And the second sensor gate pulses SG _O and SG _E , the vertical transfer clock pulse φ _VIM for driving the vertical transfer register 18 of the imaging unit 11, and the vertical transfer clock pulse φ _VST for driving the vertical transfer register 19 of the storage unit 12. And various timing signals such as a horizontal transfer clock pulse φ _H for driving the horizontal transfer register 13.

The first sensor gate pulse SG _O to open the sensor gate 16 of the first field, 1 every frame period to read an image pickup charges S _O obtained by the photoelectric conversion elements 14 corresponding to the pixels of the first field It is generated during the vertical blanking period V _BLKO immediately before the video period and at the timing one horizontal scanning period (1H) before the shutter pulse P _SHT for electronic shutter control in the second field. The second sensor gate pulse SG _E to open the sensor gate 17 of the second field, the image of every frame period to be read to obtain image pickup charges S _E by the photoelectric conversion elements 14 corresponding to the pixels of the first field It is generated during the vertical blanking period V _BLKE immediately before the period, and at a timing one horizontal scanning period (1H) before the shutter pulse P _SHT for electronic shutter control in the first field. That is, the first and second sensor gate pulse SG _O, SG _E are each 1
It is generated twice during the frame period.

Further, the shutter pulse P _SHT for electronic shutter control of the first field is in the range of the first sensor gate pulse SG _O previous one field period to 1 frame period in the vertical blanking period V _BLKo To be generated. The shutter pulse P _SHT for electronic shutter control of the second field is generated within the second sensor gate pulse SG _E previous one field period to 1 frame period in the vertical blanking period V _BLKE You.

The vertical transfer clock pulse φ _VIM for driving the vertical transfer register 18 of the imaging unit 11 and the vertical transfer clock pulse φ _VST for driving the vertical transfer register 19 of the storage unit 12 are generated in synchronization with each other. As shown in FIG. 2, during the effective video periods T _O and T _E , a horizontal scanning period (1H) corresponding to the pixel pitch in the vertical direction of the CCD image sensor 10 is generated. per-period of the vertical blanking period V _BLKo output, said first and second sensor gate pulse SG _O in V _BLKE, the high-speed transfer period T _F provided immediately after the timing of the SG _E as fast transfer pulse Is done.

Further, the horizontal transfer clock pulse φ _H for driving the horizontal transfer register 13 is generated at a repetition period corresponding to the horizontal pixel pitch of the CCD image sensor 3.

The CCD image sensor 10
_{Are the} shutter pulse P _SHT generated by the timing signal generator 1 as described above, the first and second sensor gate pulses SG _O and S _{G E} , and the upper vertical transfer clock pulse φ.
It is driven as follows by various timing signals such as _VIM , φ _VST and horizontal transfer clock pulse φ _H.

That is, the CCD image sensor 10
The imaging charges S _O and S _E generated by the respective photoelectric conversion elements 14 and 15 are discarded to the overflow drain every time the shutter pulse P _SHT is applied to the substrate substrate.

The imaging charge S _O obtained by the photoelectric conversion element 14 corresponding to the pixel in the first field is changed every time the sensor gate 16 in the first field is opened by the first sensor gate pulse SG _O. The data is read out to the vertical transfer register 18. Further, the imaging charge S obtained by the photoelectric conversion element 15 corresponding to the pixel in the second field
_E is set to the second value by the second sensor gate pulse SG _E.
Each time the sensor gate 17 of the field is opened, it is read out to the vertical transfer register 18.

In the photoelectric conversion element 14 corresponding to the pixel in the first field, the image pickup charge S _O ^′ is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter in the first field, and then about one field. The imaging charge S _O1 is accumulated over the period T _O1 . The accumulated charge S _O1 of the period T _O1 is read out to the vertical transfer register 18 by the first sensor gate pulse SG _O before 1H of the shutter pulse P _SHT for electronic shutter control of the second field. Further, in the photoelectric conversion element 14 corresponding to the pixel in the first field, the imaging charge S _O ^′ is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter in the second field, and then the vertical blanking period storing imaging charges S _O2 over a period T _O2 from the timing of the sensor gate pulses SG _O of the first field of the V _BLKo. Then, the accumulated charge S _O2 during this period T _O2 is changed by the first sensor gate pulse SG _O 1H before the shutter pulse P _SHT for electronic shutter control in the second field to the vertical transfer register 1.
8 is read. Thus, in the vertical transfer register 18, the period T _O1, T _O2 respective imaging charges accumulated in the S _O1, S _O2 is read out is added. In other words, the vertical transfer register 18, an imaging charge S _O1 + S _O2 with a T _O1 + T _O2 and effective charge accumulation period T _EXP is read.

The imaging charge S _O1 + S _O2 read to the vertical transfer register 18, high-speed transfer period provided immediately after the timing of the first sensor gate pulse SG _O in the vertical blanking period V _BLKo T _{At F} , high-speed transfer is performed from the vertical transfer register 18 of the imaging unit 11 to the vertical transfer register 19 of the storage unit 12.

The vertical blanking period V _BLKO
The vertical transfer register 18 of the imaging unit 11 and the vertical transfer register 19 of the storage unit 12 are driven by the vertical transfer clock pulses φ _VIM and φ _VST of the 1H period during the video period T _O following the above. imaging charges S _O of the first field in the vertical transfer register 19 of the storage section 12 is vertically transferred by one horizontal scanning line minutes through the horizontal transfer register 13 which is driven by the horizontal transfer clock pulse phi _H i.e. They are output line-sequentially.

In the photoelectric conversion element 15 corresponding to the pixel in the second field, the imaging charge S _E ^′ is changed to the shutter pulse P _SHT for controlling the electronic shutter in the second field.
Approximately 1 after being discarded by the overflow drain
The imaging charge S _E1 is accumulated over the field period T _E1 . Then, the accumulated charge S _E1 during this period T _E1 is _equal to 1 of the shutter pulse P _SHT for electronic shutter control in the first field.
It is read out to the vertical transfer register 18 by the first sensor gate pulse SG _E before H. Further, in the photoelectric conversion element 15 corresponding to the pixel in the second field, the imaging charge S _E ^′ is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter in the first field, and then the vertical blanking period starts. storing imaging charges S _O2 over a period T _E2 until the timing of the second field of the sensor gate pulse SG _E of V _BLKE. Then, the accumulated charge S _E2 in this period T _E2 is read out to the vertical transfer register 18 by the second sensor gate pulse S _G 1H before the shutter pulse P _SHT for electronic shutter control in the first field. Thus, in the vertical transfer register 18, the period T _E1, T each stored in _E2 imaging charge S _E1, S _E2 are read are added. In other words, the vertical transfer register 18, an imaging charge S _E1 + S _E2 where the T _E1 + T _E2 and the effective charge accumulation period T _EXP is read.

The imaging charge S _E1 + S _E2 read to the vertical transfer register 18, high-speed transfer period provided immediately after the timing of the second sensor gate pulse SG _E during the vertical blanking period V _BLKE T _{At F} , high-speed transfer is performed from the vertical transfer register 18 of the imaging unit 11 to the vertical transfer register 19 of the storage unit 12.

The vertical blanking period V _BLKO
The vertical transfer register 18 of the imaging unit 11 and the vertical transfer register 19 of the storage unit 12 are driven by the vertical transfer clock pulses φ _VIM and φ _VST of the 1H period during the video period T _O following the above. imaging charges S _O of the second field in the vertical transfer register 19 of the storage section 12 is vertically transferred by one horizontal scanning line minutes through the horizontal transfer register 13 which is driven by the horizontal transfer clock pulse phi _H i.e. They are output line-sequentially.

Thus, the CCD image sensor 1
From 0, the imaging charge S _O1 + S _O2 / with the effective charge accumulation period T _EXP within the range of one field period to one frame period.
S _E1 + S _E2 can be read out alternately for each field, and the electronic shutter function controls the exposure period within the range of one field period to one frame, and performs the imaging operation by interlaced scanning. Can be obtained.

[0030]

As described above, according to the present invention, each of the photoelectric conversion elements corresponding to the pixels in the first field and the photoelectric conversion elements corresponding to the pixels in the second field, each of which is arranged in a matrix, has a frame storage. A frame interline transfer type solid-state image sensor that transfers imaging charges of each field obtained by the above to a storage unit via a vertical transfer register and outputs the imaging charges line-sequentially from the storage unit via a horizontal transfer register. In the solid-state imaging device provided with the electronic shutter control, the imaging charge obtained by the photoelectric conversion element is discarded to the overflow drain for each field, and the imaging charge of each field is discarded for each field immediately before being discarded to the overflow drain by the electronic shutter control. Alternately in the vertical transfer register of the imaging unit. Then, the imaging charge of the accumulation period within one field accumulated in the photoelectric conversion element of each field by the electronic shutter control is added to the imaging charge of one field previously read into the vertical transfer register and read out. The imaging charge read by adding to the vertical transfer register of the unit is transferred at high speed from the vertical transfer register to the vertical transfer register of the storage unit during the vertical blanking period, and the imaging charge is transferred to the vertical transfer register of the storage unit. , The frame interline transfer type solid-state image sensor is driven so as to output line-sequentially through the horizontal transfer register, so that the exposure period is controlled within the range of one field period to one frame by the electronic shutter function. Thus, an imaging operation can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a solid-state imaging device according to the present invention.

FIG. 2 is a timing chart showing an operation of the solid-state imaging device.

FIG. 3 is a block diagram showing a configuration of an interline transfer type CCD image sensor used in a conventional solid-state imaging device.

FIG. 4 is a waveform diagram for explaining an imaging operation in a frame accumulation mode of the interline transfer type CCD image sensor.

FIG. 5 is a waveform diagram for explaining an image pickup operation in a field accumulation mode of the interline transfer type CCD image sensor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Timing signal generator 10 ... CCD image sensor 11 ... Image pick-up part 12 ... Storage part 13 ... Horizontal transfer register 14 ... Photoelectric conversion element of 1st field 15 ... Photoelectric conversion element of second field 18: vertical transfer register

Claims (1)

(57) [Claims] 1. An imaging charge of each field obtained by frame accumulation in a photoelectric conversion element corresponding to a pixel of a first field and a photoelectric conversion element corresponding to a pixel of a second field arranged in a matrix are vertically transferred. A solid-state imaging device including a frame interline transfer type solid-state image sensor that transfers the imaging charges from the accumulation unit line-sequentially through a horizontal transfer register via a register, and transfers the imaging charges to the storage unit via a horizontal transfer register. In addition to performing electronic shutter control for discarding the imaging charge that is taken into the overflow drain for each field, the imaging charge of each field is alternately stored for each field in the vertical transfer register of the imaging unit immediately before being discarded to the overflow drain by the electronic shutter control. Read-out, electronic shutter control Further, the imaging charge in the accumulation period within one field accumulated in the photoelectric conversion element of each field is added to the imaging charge of one field previously read into the vertical transfer register, read out, and added to the vertical transfer register of the imaging unit. The high-speed transfer of the read-out imaging charge from the vertical transfer register to the vertical transfer register of the storage unit during the vertical blanking period, and transfers the imaging charge from the vertical transfer register of the storage unit via the horizontal transfer register. A solid-state imaging device provided with a driving unit for driving the frame interline transfer type solid-state image sensor so as to output line-sequentially.