JPH01235892A - Clocking device - Google Patents

Abstract

PURPOSE:To obtain the high-accuracy device which does not generate a clocking error even if there is a service interruption or restoration in a commercial power supply by synchronizing, by a synchronizing means, a 2nd clocking means with a 1st clocking means during the period when the commercial power supply is impressed and to synchronize a 1st clocking means which does not clock during the service interruption with the 2nd clocking means at the time when the service is restored after the interruption. CONSTITUTION:The 1st, 2nd clocking circuits 20, 21 respectively execute clocking by the output of a 1st oscillation circuit 6 synchronize with the commercial frequency from a commercial power supply circuit 10 and the output of the 2nd oscillation circuit 9 based on the self-oscillation frequency. A central processing circuit 22 judges whether the service is interrupted or not in accordance with the output of a service interruption detecting circuit 10. The circuit 21 is corrected in the specified period and is synchronized with the circuit 20 on the basis of the circuit 20 when the voltage from the circuit 100 is impressed. The circuit 20 stops and the circuit 21 continues clocking and is changed over to the reference when the service is interrupted. The circuit 20 restarts clocking when the service is restored from the interrupted state. The circuit 22 is simultaneously corrected to and synchronized with the clocking of the circuit 21 and is then used as the reference circuit.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a timekeeping device.

[Prior art] Fig. 5 shows an example of a timekeeping device, for example, in 1982-12
In Figure 0, which is a circuit block diagram of a conventional time switch shown in Publication No. 5338, a commercial power supply circuit (100
) reduces the voltage of the commercial power supply (1) by the TL source I lance (2), and the output of the power transformer (2) is half-wave rectified by the rectifier (3) constituting the rectifier circuit (200). The half-wave rectified voltage is converted to a DC voltage by the DC power supply circuit (4), which charges the storage battery (5) and also powers the power failure detection circuit (10), second oscillation circuit (9), and frequency divider circuit (7). ) and the amplifier circuit (8). The oscillation circuit (6) @1 receives a half-wave rectified voltage by the rectifier (3) and outputs a rectangular wave signal proportional to the commercial frequency. A power failure detection circuit (10) receives a voltage half-wave rectified by a rectifier (3), and operates a switching circuit (11) depending on the presence or absence of this voltage. When a half-wave rectified voltage is input, the switching circuit (11) is in the state shown in the figure, that is, the normally closed contact (llb) is connected to the common contact (llc). Therefore, the output signal of the first oscillation circuit (6) is input to the frequency dividing circuit (7) via the switching port 1 & (11). Note that at this time, the second oscillation circuit (which is a self-oscillation circuit using a crystal resonator or the like as an oscillation source)
9) also outputs an output signal of the same frequency as the first oscillation circuit (6) toward the normally open contact (lla) of the switching circuit (11), but the normally open contact (lla) and the common contact (
llc) is not closed, the signal is not transmitted to the frequency divider circuit (7).The output signal of the first oscillation circuit (6) input to the zero frequency divider circuit (7) and sent to the amplifier circuit (8). The frequency-divided signal input to the amplifier circuit (8) is amplified and drives the step motor (12), and after a predetermined time has been counted, an important operation of a switch (not shown) is performed.

Next, the operation when the commercial power source (1) is out of power will be explained. When the commercial power source (1) has a power outage, power is supplied from the storage battery (5) to the power outage detection circuit (1o), the second oscillation circuit (9), the frequency dividing circuit (7), and the amplifier fl (8), respectively. On the other hand, the first oscillation circuit (6) and the power failure detection circuit (lO) no longer receive the half-wave rectified voltage from the rectifier (3), so the first oscillation circuit (6) no longer outputs a square wave. , a power outage detection circuit (1o) detects a power outage and operates a changeover switch (11). That is, the normally open side contact (lla) and the common contact (llc) are electrically connected.

Therefore, instead of the output of the first oscillation circuit (6), the output of the second oscillation circuit (9) is sent to the frequency divider circuit (7), and then the step motor(
12).

[Problems to be Solved by the Invention] In the conventional metering device as described above, when the commercial power source (1) is applied, the output of the first oscillation circuit (6) is used; During a power outage, the 20th oscillation circuit (9)
The time is measured using the output of However, since these two oscillation circuits (6, 9) operate independently of each other, they are not synchronized.
, 9) is replaced each time, there is a problem in that a timing error occurs.

This invention was made to solve the above-mentioned problems, and aims to provide a highly accurate timekeeping device that does not cause timekeeping errors even when the commercial power supply (1) is interrupted and restored. purpose.

[Means for Solving the Problems] A timing device according to the present invention has a DC power supply that constantly supplies DC voltage, receives a voltage having a commercial frequency from a commercial power supply, outputs a voltage at a predetermined frequency, and has the following features: As shown in Figure 1, the first timer measures time based on this frequency, the second timer measures time based on the self-oscillation frequency, and the power outage detection means detects a power outage in the commercial power supply. When voltage is applied from the power supply, the first word 1
A clock display signal based on the clock means is outputted by the switching output means when the commercial power supply is out of power, and a clock display signal based on the second clock means is outputted by the switching output means, and synchronized when the voltage is applied from the commercial power supply. The second timekeeping means is synchronized with the first timekeeping means by the means, and when the commercial power supply is restored from a power outage, the first timekeeping means is synchronized with the second timekeeping means by the synchronization means, and the first timekeeping means is synchronized with the second timekeeping means by the switching output means. The output clock display signal is displayed by a display means.

[Operation] In the present invention, the synchronizing means synchronizes the second time measuring means with the first time measuring means while voltage is being applied from the commercial TL source, and when the commercial power supply is restored after a power outage. At that time, the first timekeeping means, which was not keeping time during the power outage, was replaced with the second timekeeping means.
synchronize with the clocking means of

[Embodiment] FIG. 2 is a circuit block diagram showing an embodiment of the present invention. In FIG.
A commercial power supply (1) of ClooV, 50 Hz is converted to, for example, ACIOV, 50 Hz by a power transformer (2), and the converted voltage is half-wave rectified by a rectifier (3) constituting a rectifier circuit (200). The half-wave rectified voltage is converted to, for example, DC5V by the DC power supply port 1N (4), and the other circuits shown in the figure are converted to DC5V by the DC power supply port 1N (4).
00) and the rectifier circuit (excluding the rectifier circuit (200)). The 50Hz half-wave rectified voltage output from the rectifier (3) is converted to a commercial power supply (
1) is converted into a rectangular wave signal of, for example, 50 Hz synchronized with the commercial frequency, and is input to the first clock circuit (20).

The first clock circuit (20) includes an oscillator tilt(6
) is used as a reference for timing, and the central processing circuit (
22). In addition, the second oscillation circuit (
9) uses, for example, a crystal oscillator and outputs a rectangular wave signal synchronized with the vibration frequency to the second clock circuit (21). Then, the second clock circuit (21) measures time based on the output signal, and outputs a clock signal to the central processing circuit (22). The power failure detection circuit (10) is a rectifier (3)
It receives the half-wave rectified voltage output from the central processing circuit (22) and outputs a signal corresponding to whether this voltage is healthy or not to the central processing circuit (22). The central processing circuit (22) repeatedly reads input, makes judgments, and outputs data according to a pre-stored program.

For example, in FIG. 2, if the central processing circuit (22) determines that voltage is being applied from the commercial power source (1), then the time measured by the first clock circuit (20) (or time measured, hereinafter referred to as Similarly), the second clock circuit (21) is corrected at regular intervals to match the time measured by the first clock circuit (20), and the first clock circuit (20) and the second clock circuit (22) (synchronization means), and at the same time, the 0 display circuit (2
3) displays the time measured using, for example, a liquid crystal display.

If a power outage occurs while the commercial power source (1) is being applied, DC power is supplied from the power outage compensation battery (5), so the commercial 11 source circuit (100) and the rectifier circuit (20
Each circuit except 0) can operate as is, but since the half-wave rectified voltage from the rectifier (3) is not input to the first oscillation circuit (6), it is synchronized with the commercial frequency of the commercial power supply (1). The signal can no longer be output, and the first clock circuit (20)
loses the reference signal for timekeeping and stops the timekeeping operation. However, in the other second clock circuit (21), since the second oscillation circuit (9) that outputs the reference signal is a self-oscillation circuit whose oscillation source is a crystal oscillator or the like, However, the output signal does not stop and timekeeping continues. The power failure detection circuit (10) also includes a rectifier (3).
) is not input, a power outage is detected and a signal is sent to the central processing circuit (22).

FIG. 4 shows an outline of the processing procedure performed inside the central processing circuit (22).

When the central processing circuit (22) determines that there is a power outage in the commercial power supply (1) based on the output signal from the power outage detection Ii circuit (10), the central processing circuit (22) changes the reference clock circuit to the first clock circuit that stopped operating at the time. from the clock circuit (20) to the second clock circuit (21)
Converts the time measured by the second clock circuit (21) into a display signal and outputs it to the display circuit (23) for display (switching output means). Continuing, a timekeeping operation is performed using the second clock circuit (21) as a reference.

When the commercial power supply (1) returns from a power outage, the rectifier (3) replaces the DC power supply from the power outage compensation battery (5).
) DC power is supplied to each circuit from the DC TL source circuit (4).

In addition, the first oscillation circuit (6) receives the half-wave rectified voltage from the rectifier (3), so that it again outputs a rectangular wave signal synchronized with the commercial frequency of the commercial power supply (1), and the fsl The clock circuit (20) resumes timekeeping. The power failure detection circuit (10) detects power restoration by receiving the half-wave rectified voltage output from the rectifier (3), and sends a signal to the central processing circuit (22). When the central processing circuit (22) receives this signal and determines that the power has been restored, it starts the first clock circuit (22).
20) to correct the clock time of the second clock circuit (21) that was the reference during the power outage (synchronization means);
After that, the reference clock circuit is transferred to the second clock circuit (21).
to the first clock circuit (20), the first clock circuit (g)
(20) Converts the measured time to a display signal and converts the time measured in (20) to a display circuit (
23) and displayed (switching output means), and thereafter continues the operation when the commercial power supply (1) is constantly applied.

In addition, in the above embodiment, the first clock circuit (20) and the second clock circuit (20)
Although the clock circuit (21) shown in FIG. The processing circuit (22) may be programmed to have a clock function. FIG. 3 shows the central processing circuit (22) having the first clock circuit function.

Also, in the above embodiment, the case of the hour hand was explained, but
The same can be applied to measurement control devices that require a timekeeping function, such as time switches and maximum demand power meters.

[Effects of the Invention] As described above, according to the present invention, when a voltage is applied from a commercial power source, the first
The clock circuit is configured to display time and synchronize the second clock circuit, and when the commercial power supply is restored from a power outage, the first clock circuit is synchronized with the second clock circuit. Even if the signal source of the clock circuit changes due to a power outage and power restoration, there is an effect that a highly accurate timekeeping device that does not substantially generate timekeeping errors can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main constituent means of a timekeeping device according to an embodiment of the invention, FIG. 2 is a circuit block diagram showing a timekeeping device according to an embodiment of the invention, and FIG. 3 is a block diagram showing the main constituent means of a timekeeping device according to an embodiment of the invention. Circuit block diagram of a timing device showing an embodiment, No. 4
This figure is a flowchart showing a schematic processing procedure according to a program of the central processing circuit (22) shown in FIG. 2, and FIG. 5 is a circuit block diagram showing a time switch as an example of a conventional timekeeping device. In the figure, (1) is a commercial power supply, (4) is a DC power supply circuit, (6) is a first oscillation circuit, (9) is a second oscillation circuit,
(10) is a power outage detection circuit, (20) is a clock circuit,
(21) is the second clock circuit, (22) is the central processing circuit,
(23) is a display circuit, (100) is a commercial power supply IID path,
(200) is a rectifier circuit. Note that the same reference numerals in each figure indicate the same or corresponding parts. Procedural amendment (voluntary)

Claims (1)

[Claims] (1) A power source that receives a voltage having a commercial frequency from a commercial power source and outputs a voltage of a predetermined frequency; a first timekeeping means that measures time based on the frequency of the power source; and a first timekeeping means that measures time based on a self-oscillation frequency. a power outage detection means that detects a power outage of the commercial power source and outputs a signal;
switching output means for outputting a time display signal based on the second time measurement means when the commercial power supply is out of power, and for outputting a time display signal based on the second time measurement means when the commercial power supply is out of power; is the second above
synchronizing means for synchronizing the clocking means with the first clocking means, and synchronizing the first clocking means with the second clocking means when the commercial power supply is restored after a power outage; and the switching output. A timekeeping device comprising: a display means for displaying a timekeeping display signal output from the means; and a DC power supply that constantly supplies DC voltage.