JPH01304383A - Clock device - Google Patents

Abstract

PURPOSE:To maintain the accuracy of a high-accuracy clock without accumulating switching errors at every generation of service interruption by discriminating the timing for switching the clock in prescribed time unit according to the output of a service interruption detecting circuit. CONSTITUTION:The service interruption detecting circuit 9 of the clock which normally makes the 1st time measurement based on a commercial power supply and makes the 2nd time measurement based on the output signal of a crystal oscillation circuit discriminates the presence or absence of the service interruption of the commercial power supply 1 by the current rectification signal of a current rectifier 3 and outputs the result thereof to a clock switching discrimination circuit 13 and a central processing circuit 11. The discrimination circuit 13 maintains the state of the service interruption signal outputted from the detecting circuit 9 until the signal of every specified time unit outputted from the circuit 11 is inputted thereto. The switching circuit 10 is connected to a contact 10c side when the service interruption arises and the circuit is connected to a contact 10b side and the signal is inputted via the contact 10a to the circuit 11 when the service interruption does not arise. The circuit 11 is inputted with the frequency dividing signal from the circuit 10 and makes clock processing. The result thereof is displayed 12. The accuracy of the high-accuracy clock is thus maintained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a commercial frequency synchronous clock device having power outage compensation.

[Prior Art] FIG. 3 is a block diagram showing the configuration of a conventional timepiece device. In the figure, (1) is a commercial power supply, (2) is a power supply 1 to lance, and the next side is connected to the commercial power supply (1),
This commercial power supply (1) constitutes a commercial power supply circuit (100). (3) is a rectifier 2 constituting a rectifier circuit (200), and its input side is connected to the power transformer (2) of the commercial power supply circuit (100).

(4) is a DC power supply circuit, and its input side or rectifier circuit (
200) is connected to the rectifier (3) of this rectifier (3).
Converts the output of the converter into DC power. Reference numeral 5 indicates a power outage compensation battery, the positive side of which is connected to the DC power supply circuit (4), and the negative side thereof grounded to supply DC power in the event of a power outage. (6) is the first frequency divider circuit, the input side of which is connected to the rectifier (3) of the rectifier circuit (200).
200) is waveform rectified and divided by a predetermined frequency. (7) is a crystal oscillator circuit for measuring time during a power outage, and (8) is a second frequency dividing circuit whose input side is connected to the crystal oscillator circuit (7). ) oscillation frequency by the first minute INI IT! Divide by the same frequency as the first path (6).

(9) is the power failure detection circuit, and its input side or rectifier circuit (20
0), and detects whether or not commercial power supply 1) is applied to determine a power outage. (10) is a switching circuit which selects the first frequency dividing circuit (6) or the second frequency dividing circuit (8) according to the signal from the power failure detection circuit (9).

(11) is a central processing circuit, one input side of which is connected to the power failure detection circuit (9), and the other input side of (7) connected to the switching circuit (10).

The clock signal outputted by the switching circuit 10) is counted to measure two hours. 12 is a display circuit connected to the central processing circuit (11), which displays time data measured by the central processing circuit (11).

Figure 4 shows the first dividing circuit 11B (
6) and a timer 1 diagram showing the switching timing of the second frequency dividing circuit (8).

Conventional clock devices are configured as shown in section 2, and are powered by commercial power (
Voltage 2 example of 1) is 1. The voltage of OOV, 50 Hz is stepped down to, for example, ], OV, 50H2 by a power transformer (2), and rectified by a rectifier (3). This rectified output is further converted into, for example, 5 V DC by a DC power supply circuit (4) and supplied. 501 of the rectifier (3) (the z rectified signal is the first frequency dividing circuit (6)), Q i (z
The frequency is divided and converted into a square wave signal.

Output to the switching circuit (10).

The two-crystal oscillator circuit (7) oscillates at a predetermined frequency using a crystal resonator, and the second frequency divider circuit (8) divides the frequency to the same frequency as the output of the first frequency divider circuit (6).

Output to the switching circuit (10).

The power failure detection @path (9) outputs a signal that is connected to the contact (10b) side of the switching circuit (10) when the commercial power source (1) is applied. In a power outage state where the commercial power supply (1) is not applied, the switching circuit 10)
Outputs a signal that is connected to the contact (1, Oc) side.

The central processing circuit (1) inputs the divided signal of the side selected by the switching circuit (10), performs timekeeping processing for one clock, outputs clock data to one display circuit (12), and outputs clock data to one display circuit (12). ) displays the time on a liquid crystal display.

Figure 4 shows the first frequency divider circuit (6) and the second frequency divider circuit selected by the switching circuit (10) in the event of frequent power outages in the commercial power supply (1).
The timing of the frequency dividing circuit 8) is as follows.

Switches every time a power outage occurs. In this example, the maximum value of the clock switching error is between the first frequency dividing circuit (6) and the second frequency dividing circuit (6).
When the divided output of the frequency dividing circuit (8) is set to 10 Hz,
The switching circuit (
The number of switching in 10) is 10 times, so 10 times
1/10 Hz = 1 second.

[Problems to be Solved by the Invention] In the conventional clock device as described above, in order to improve switching errors during power outages, it is necessary to reduce the frequency division ratio of the frequency divider circuit and measure time using a short-cycle clock signal. However, since the commercial power supply has a frequency of 50 Hz or 60 Hz, there is a limit, and if there are many power outages in a short period of time, the accuracy of the clock will drop significantly.

The present invention has been made to solve such problems, and an object of the present invention is to obtain a highly accurate timepiece device without accumulating switching errors every time a power outage occurs.

[Means for Solving the Problems] A clock device according to the present invention always measures a first time based on a commercial frequency detected from a commercial power source, and when the commercial power source is out of power, the clock device measures the first time based on the commercial frequency detected from the commercial power source, and when the commercial power source is out of power, the clock device measures the first time based on the commercial frequency detected from the commercial power source. In a clock device that measures a second time based on a signal, a clock switching timing is determined in predetermined time units according to an output of a power outage detection circuit that detects whether or not the commercial power supply is applied, and A clock switching determination circuit is provided for switching between clocking the time and clocking the second time.

[Operation 1] In the present invention, the 4-clock switching operation allows highly accurate clock measurement without accumulating switching errors even if a plurality of power outages occur within a fixed time unit.

[Embodiment] FIG. 1 is a block diagram showing a timepiece device according to an embodiment of the present invention. In the figure, (1) to (12) are the same as the conventional one shown in FIG. (13) is a clock switching discrimination circuit, one input side of which is connected to the power outage detection circuit (9), and the other input side connected to the central processing circuit (11).
), and one output side or the switching circuit (10
), and the other output side is connected to the central processing circuit (11
), it stores the power outage signal output from the power outage detection port FI@(9), holds the power outage signal output from the central processing circuit (1]) for a certain period of time, and stores the power outage signal output from the central processing circuit (1). Output to the switching circuit (10).

Figure 2 is a time chart 1-1 showing the switching timing of the first frequency divider circuit (6) and the second frequency divider circuit (8) when the commercial power supply (1) is out of power. It is a diagram.

” In a clock device configured as described in item 1.

An example of the voltage of commercial power supply (1) is], OOV, 50
The voltage of 1-1z is determined by the power transformer (2), for example, 1. O
V, 501 (z) and rectified by a rectifier (3). This rectified output is further sent to a DC power supply circuit (4).
For example, the voltage is converted to 5V DC and supplied to each circuit. The 5 Q Hz rectified signal of the rectifier (3) is frequency-divided and converted into, for example, a 1-OHz rectangular wave signal by a first frequency dividing circuit (6), and outputted to a switching circuit (10).

In addition, the crystal oscillator circuit (7) oscillates at a predetermined frequency using a crystal resonator, and the second frequency divider circuit (8) divides the frequency to the same frequency as the output of the first frequency divider circuit (6). , output to the switching circuit (10). The power outage detection circuit (9) uses a rectifier (
3), the commercial power supply (1
) or power outage or not and switch 2 clocks 'I'l
It outputs to a separate circuit (13) and a central processing circuit (11). This clock switching determination circuit (13) converts the power outage signal output from the power outage detection circuit (9) into the central processing circuit (11).
) is maintained in that state until it is manually inputted, and if a power outage occurs within a certain period of time, the switching circuit (10) is switched between contacts < 1. Oc) f!
tll, and if no power outage occurs within a certain period of time, connect to the contact (1, 01:)) side, and contact (], Oa
> is input to the central processing circuit 11).

The central processing circuit (11) manually processes the frequency-divided signal output from the switching circuit (10), performs timekeeping processing for one clock, and outputs a time take to IW8 (1, 2) for one display.

The display circuit (12) displays the time using, for example, a liquid crystal display.

Figure 2 shows the first frequency divider circuit (6) and the second frequency divider circuit selected by the switching circuit (10) in the event of frequent power outages in the commercial power supply (1).
In this example, the fixed time is set to one minute.

A power outage occurred between 10:38 and 10:39.
When the power was restored between 0:40 and 10:41,
As soon as a power outage occurs, the circuit switches to the second frequency dividing circuit (8), but from 10:40 to 10:41 when the power outage is restored.
During the minute, since a power outage has occurred within one minute, the circuit switches to the first frequency dividing circuit (6) at 10:41. 10:04
4 minutes] During 0:45, the power outage is repeated 3 times, but the 1st frequency divider circuit (8) is maintained. In this example, the maximum value of the clock switching error is the 1st minute. Circuit (6
) and the divided output of the second frequency divider circuit (8) is 10Hz, the number of switching times of the switching circuit (10) between 10:38 and 10:45 is 5, so 5 times. X 1/1-0Hz=0.5 seconds.

In the above embodiment, the switching circuit (1o) is configured as a switching switch, but this operation is performed by the central processing circuit (1).
).

[Effects of the Invention] As will not be described below, this invention normally measures a first time based on a commercial frequency detected from a commercial power supply, and when the commercial power supply is out of service, the output signal of the crystal oscillation circuit is In a clock device that sets a second time of 11 o'clock based on 11 o'clock, a clock switching timing is determined in predetermined time units according to an output of a power failure detection circuit that detects whether or not the commercial power is applied.

Since a clock switching discrimination circuit is provided to switch between clocking the first time or clocking the second time, the clock switching is determined in fixed time units.1 If power outages occur frequently, the power outage will occur. This has the effect of making it possible to obtain a highly accurate clock device without causing any switching errors.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of a clock device according to an embodiment of the present invention, FIG. 2 is a diagram of the hour switching timing chart 1 of the present invention, FIG. 3 is a block diagram of the configuration of a conventional clock device, and FIG. 4 is a conventional timing chart diagram of a clock cut-off threat. In the figure, (6) the first frequency dividing circuit, (7)
Crystal oscillator circuit, (8) second frequency divider circuit. Ku)...Power failure detection circuit, (1,0)...Switching circuit, (1,1,) Central processing circuit i1.3>...
They are a clock switching determination circuit, a (1,00) commercial power supply circuit, and a (200) rectifier circuit.

Claims (1)

[Claims] A clock device that normally measures a first time based on a commercial frequency detected from a commercial power supply, and measures a second time based on an output signal of a crystal oscillation circuit during a power outage of the commercial power supply, A clock that determines clock switching timing in predetermined time units according to an output of a power outage detection circuit that detects whether or not commercial power is applied, and switches the clock to either the first time or the second time. A timepiece device characterized by being provided with a switching determination circuit.