JPH01235381A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce parasitic capacitance while improving high-frequency characteristics by forming an emitter electrode at a height lower than base electrodes and connecting the base electrodes by an electrode metal. CONSTITUTION:An Si epitaxial layer 2 is shaped onto an Si substrate 1, a base region 3 is formed through ion implantation or a thermal diffusion, and an oxide film 5 is shaped onto the whole surface of the top face of the base region 3. The pattern of a resist 9 is formed, and the oxide film 5 and the base region 3 are etched, using the resist pattern as a mask. Emitter regions 4 are shaped through an ion implantation method, and the oxide film 5 is etched. The resist is removed, a novel resist 10 is applied, regions in which a base electrode and an emitter electrode are formed are patterned, and electrode metals 7 are shaped. The resist 10 is eliminated, a BPSG film 6 is applied onto the surfaces, and the BPSG film 6 is fluidized at a high temperature of approximately 300 deg.C. The BPSG film 6 is etched, and the surface of the base electrode 7a is exposed. A section to which a base bonding pad must be shaped is patterned, and a second electrode metal 8 is formed to the section.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device with improved high frequency characteristics.

[Conventional technology]

FIG. 3 is a cross-sectional view showing a conventional high-frequency, high-output transistor.
i A base region formed in the epitaxial N2 by ion implantation or thermal diffusion, 4 an emitter region formed in the base region, 5 an oxide film, and 7 an electrode metal.

Next, the manufacturing flow of a conventional semiconductor device will be explained using FIG. 4.

First, as shown in FIG. 4(,), an S
The base region 3 is formed by ion implantation or thermal diffusion into the so-called epitaxial wafer on which the i-epitaxial Ji2 is formed.
form. Furthermore, after forming the oxide film 5 by low pressure CVD method, etc., as shown in FIG. As a mask, the oxide film 5 is etched using a wet method or a dry method. Furthermore, emitter region 4 is formed by ion implantation in this state or with resist 9 removed. Next, as shown in FIG. 4(C), if the cyst 9 remains, remove it and apply a new resist (not shown).
base contact 1 using photolithography technology.
The oxide film 5 is etched to form the oxide film 1. Thereafter, the resist is removed, a new resist 10 is applied, and a region where an emitter electrode is to be formed is patterned using photolithography to form an ri electrode metal. If the resist 10 is removed here, the semiconductor device shown in FIG. 3 can be manufactured.

[Problem to be solved by the invention]

Conventional semiconductor devices are configured as described above, so it is necessary to separately form bonding pads in order to take out the electrodes to the outside, which increases the parasitic capacitance that becomes an obstacle to higher frequencies. (There is a problem that this is not always possible. In particular, the parasitic capacitance l on the base side has a great influence on higher frequencies.

The present invention has been made to solve the above-mentioned problems, and aims to provide a semiconductor device in which parasitic capacitance can be significantly reduced and which does not impede high frequency operation.

[Means to solve the problem]

In the semiconductor device according to the present invention, a required number of emitter regions are formed in a base region formed on an epitaxial wafer, and emitter electrodes are formed in these emitter regions so as to be lower than the base electrodes, and each base electrode The emitter electrodes are insulated from each other by an insulating film and connected by an electrode metal.

[Effect]

In the semiconductor device according to the present invention, the emitter electrode is formed lower than the base electrode, and the base electrodes are connected with electrode metal, so that parasitic capacitance can be significantly reduced, and the size of the base bonding pad can be maximized. Since it can be made to have the same size as the area, the number of wires can be increased accordingly.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

In Figure 1+'c, 1 is a Si substrate, 2 is a Si epitaxial layer, 3 is between base electrodes, 411 is an emitter region, 5 is
is an oxide film, and 6 is BPSG (B-orophospho 5) containing boron and phosphorus, which flows at about 300°C.
ilfi, 7 is an electrode metal, and 8 is a second fE electrode metal formed on the electrode metal 7.

Next, the manufacturing flow of the semiconductor device of the -* embodiment of the present invention will be described using FIGS. 2(a) to 2(d).

First, as shown in FIG. 2(-), Si
Using a so-called epitaxial wafer on which an epitaxial layer 2 has been formed, a base region 3 is formed by ion implantation or thermal diffusion, and oxidized W45 is deposited on the entire upper surface of the base region 3 by low pressure CVD.
Formed by law etc.

Next, as shown in FIG. 2(b), N turns of resist 9 are formed, and using the resist pattern as a mask, oxide film 5 and base region 3 are etched by a wet or dry method.

Next, as shown in FIG. 2(C), after forming the emitter region 4 by ion implantation, a new resist is applied.
Using the patterned resist pattern as a mask, the oxide film 5 is etched using photolithography to form the base contact 11. After that, after removing the resist, a new resist 10 is applied,
A region where an emitter electrode is to be formed is patterned using photolithography to form electrode metal 7. Next, Figure 2 (
As shown in d), remove resist I-10 and add B to it.
A PSG film 6 is applied, and the BPSG film 6 is made to flow at a high temperature of about 300°C. Next, by the etch-back method, B P
The S G jji 5 is etched to expose the surface of the base electrode 7a. After that, apply a new resist (not shown) and use photolithography to pattern the part where the entire base bonding pad is to be formed.
By forming the second electrode gold H48 thereon, the semiconductor device shown in FIG. 1 can be manufactured.

Note that in the above embodiment, BPSGI! Although in is used, it may be an organic film such as polyimide, and the same effect as in the above embodiment is achieved.

Furthermore, although the above embodiments have been described with reference to high frequency, high output transistors, they can also be used in bipolar devices such as fs product circuits such as ECLs, and the same high frequency effect as in the above embodiments can be achieved.

〔Effect of the invention〕

As explained above, the present invention provides a height difference between the emitter electrode and the base electrode, the emitter electrode is formed lower than the base electrode, and furthermore, an electrode metal is provided on these base electrodes to connect each base electrode. Since the base bonding pad is formed in a separate location, the chip size can be reduced, the parasitic appearance caused by the base electrode can be significantly reduced, and the size of the base bonding pad can be increased. You can take it. therefore,
The number of wires can be increased, which has the effect of improving power efficiency.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional side view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a diagram showing a manufacturing flow of a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view of a conventional semiconductor device. 4 are diagrams showing the manufacturing flow of a conventional semiconductor device. In the figure, 1 is a silicon substrate, 2 is a silicon epitaxial layer, 3 is a base region, 4 is an emitter region, 5 is an oxide film, 6 is a BPSG film, 7 is an electrode metal, 7a is a base electrode, and 8 is an electrode metal. . Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent: Masuo Oiwa (2 others) Figure 1 Figure 3 Figure 2 Figure 4 Procedure amendment: IF (spontaneous) 1. Indication of case Japanese Patent Application No. 63-64222 2. Title of invention Semiconductor device 3 , Representative of the person making the amendment Moriya Shiki 4, Agent 5, Column 2 for detailed explanation of the invention in the specification subject to amendment 2 Column for brief explanation of drawings and drawing 6 Contents of amendment (1) Description 2nd page, line 4, “@base area”
[The base region 3] is corrected. (2) Similarly, on page 3, line 5, ``Made the emitter electrode using photolithography'' is corrected to 1--Create the base electrode and emitter electrode using photolithography.'' (3) Similarly, on page 3, line 10, amend the phrase ``as in more than one'' to ``as in more than one''. (4) Similarly, in lines 2 and 3 of page 6, "the emitter electrode was formed using photolithography technology" was corrected to "the base electrode and the emitter electrode were formed using photolithography technology." (5) Similarly, page 8, line 4, 18 is electrode metal”, 1
-8 is the second electrode metal.'' ((3) In the drawings, Fig. 2 (C), (d) and Fig. 4 (
Correct c) as shown in the attached sheet. Above Figure 2 7a Hess Denzai 6

Claims (1)

[Claims] In a semiconductor device, emitter regions are formed at required locations of a base region formed on an epitaxial wafer, emitter electrodes are formed in each of these emitter regions, and a required number of base electrodes each having a base contact with the base region are formed. . A semiconductor device, wherein the emitter electrode is formed to be lower than the base electrode, and the base electrodes are insulated from each of the emitter electrodes by an insulating film and connected by an electrode metal.