JPH0122755B2 - - Google Patents

Info

Publication number
JPH0122755B2
JPH0122755B2 JP10857879A JP10857879A JPH0122755B2 JP H0122755 B2 JPH0122755 B2 JP H0122755B2 JP 10857879 A JP10857879 A JP 10857879A JP 10857879 A JP10857879 A JP 10857879A JP H0122755 B2 JPH0122755 B2 JP H0122755B2
Authority
JP
Japan
Prior art keywords
dry film
adhesive tape
film
applying
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10857879A
Other languages
Japanese (ja)
Other versions
JPS5632799A (en
Inventor
Kyotaka Myagawa
Mitsuo Yamashita
Ayako Myahara
Kenji Yamamoto
Keiji Kurosawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10857879A priority Critical patent/JPS5632799A/en
Publication of JPS5632799A publication Critical patent/JPS5632799A/en
Publication of JPH0122755B2 publication Critical patent/JPH0122755B2/ja
Granted legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Description

【発明の詳細な説明】 本発明はプリント配線板の製造方法の改良に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in a method for manufacturing printed wiring boards.

従来より通信用などの電子機器には、部品の搭
載とそれらの部品間の高密度な配線を効率良く行
なうために多層プリント配線板が用いられてい
る。この多層プリント配線板は予め導体の配線パ
ターンが形成された複数枚の外層材と内層材とを
接着用のプリプレグを挾んで積み重ね、加圧しな
がら加熱して一体化したものである。このような
多層プリント配線板において最近は益々配線の高
密度化が進み、その積層枚数が増加している。と
ころが積層後の厚さを従来と同様にするため各内
層材の厚さを薄くする必要が生じ、現在0.1mm以
下のものも使用されるようになつて来ている。こ
のような薄い内層材としての銅張積層板はそのパ
ターン形成時に次の如き不具合を生ずる。即ち銅
張積層板には予めアートワークフイルムとの位置
合せ用基準孔が設けられているが、感光性ドライ
フイルムを被着した後、基準孔部分のドライフイ
ルムを除去する必要がある。これをナイフ等の刃
物で座ぐつて除去すると基準孔を傷つけてしま
い、その孔径を変化させ、アートワークフイルム
との位置合せ精度を悪化せしめる。本発明はこの
欠点を改良するために案出されたものである。
BACKGROUND ART Multilayer printed wiring boards have conventionally been used in electronic equipment for communications and the like in order to efficiently mount components and conduct high-density wiring between those components. This multilayer printed wiring board is made by stacking a plurality of outer layer materials and inner layer materials on which conductor wiring patterns have been formed in advance, sandwiching prepreg for adhesive, and heating them while applying pressure to integrate them. In such multilayer printed wiring boards, the wiring density has recently been increasing, and the number of laminated boards has been increasing. However, in order to maintain the same thickness after lamination as before, it has become necessary to reduce the thickness of each inner layer material, and materials with a thickness of 0.1 mm or less are now being used. Such a thin copper-clad laminate as an inner layer material causes the following problems during pattern formation. That is, the copper-clad laminate is previously provided with reference holes for alignment with the artwork film, but after the photosensitive dry film is applied, it is necessary to remove the dry film at the reference hole portions. If this is removed by poking with a sharp tool such as a knife, the reference hole will be damaged, the diameter of the hole will change, and the accuracy of alignment with the artwork film will be deteriorated. The present invention has been devised to improve this drawback.

このため本発明においては銅張積層板に感光性
ドライフイルムを被着し、その上にアートワーク
フイルムを位置合せして重ね、露光・現像したの
ちエツチングを行ない回路パターン以外の銅箔を
除去する諸工程より成るプリント配線板の製造方
法において、前記ドライフイルムの被着工程は、
予め接着テープにて積層板の位置合せ用基準孔の
開口部を覆い、次いでドライフイルムを被着した
のち、接着テープ部分のドライフイルムを接着テ
ープと共に除去することを特徴とするものであ
る。
For this reason, in the present invention, a photosensitive dry film is applied to a copper-clad laminate, an artwork film is aligned and stacked on top of the photosensitive dry film, exposed and developed, and then etched to remove the copper foil other than the circuit pattern. In a printed wiring board manufacturing method comprising various steps, the dry film deposition step includes:
This method is characterized in that the opening of the positioning reference hole of the laminate is covered in advance with an adhesive tape, then a dry film is applied, and then the dry film on the adhesive tape portion is removed together with the adhesive tape.

以下添付図面に基づいて本発明方法を詳細に説
明する。
The method of the present invention will be explained in detail below based on the accompanying drawings.

第1図乃至第4図に本発明方法の製造工程説明
図を示す。本発明方法は先ず第1図に示す如く銅
張積層板1の基準孔2を覆うように接着テープ3
をはり付ける。次に第2図の如くドライフイルム
のレジスト4を積層板1の全面に被着する。次に
第3図の如く接着テープ3の外周に沿つてレジス
ト4に切り目5を入れる。最後にテープ3の上の
レジスト4をテープ3と共に第4図の如く除去す
る。
FIGS. 1 to 4 are explanatory diagrams of the manufacturing process of the method of the present invention. In the method of the present invention, as shown in FIG.
Attach. Next, as shown in FIG. 2, a dry film resist 4 is applied to the entire surface of the laminate 1. Next, as shown in FIG. 3, a cut 5 is made in the resist 4 along the outer periphery of the adhesive tape 3. Finally, the resist 4 on the tape 3 is removed together with the tape 3 as shown in FIG.

このようにして基準孔2には何ら損傷を与えず
にレジスト4を除去することができる。
In this way, the resist 4 can be removed without causing any damage to the reference hole 2.

以上説明した如く本発明のプリント配線板の製
造方法は予め基準孔を覆つたテープにより基準孔
を損傷することなくレジストを除去することによ
り、積層板とアートワークフイルムとの位置合せ
精度の向上を可能としたものである。
As explained above, the printed wiring board manufacturing method of the present invention improves the alignment accuracy between the laminate and the artwork film by removing the resist without damaging the reference holes using tape that covers the reference holes in advance. This made it possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及乃至第4図は本発明にかかるプリント
配線板の製造方法の製造工程説明図である。 1……銅張積層板、2……基準孔、3……接着
テープ、4……レジスト、5……切り目。
1 to 4 are manufacturing process explanatory diagrams of a method for manufacturing a printed wiring board according to the present invention. 1... Copper-clad laminate, 2... Reference hole, 3... Adhesive tape, 4... Resist, 5... Cut.

Claims (1)

【特許請求の範囲】[Claims] 1 銅張積層板に感光性ドライフイルムを被着
し、その上にアートワークフイルムを位置合せし
て重ね、露光・現像したのちエツチングを行ない
回路パターン以外の銅箔を除去する諸工程より成
るプリント配線板の製造方法において、前記ドラ
イフイルムの被着工程は、予め接着テープにて積
層板の位置合せ用基準孔の開口部を覆い、次いで
ドライフイルムを被着したのち、接着テープ部分
のドライフイルムを接着テープと共に除去するこ
とを特徴とするプリント配線板の製造方法。
1 Printing consisting of various steps in which a photosensitive dry film is applied to a copper-clad laminate, an artwork film is aligned and stacked on top of the film, exposed and developed, and then etched to remove copper foil other than the circuit pattern. In the method for manufacturing a wiring board, the step of applying the dry film includes covering the opening of the alignment reference hole of the laminate with adhesive tape in advance, then applying the dry film, and then applying the dry film on the adhesive tape portion. A method for manufacturing a printed wiring board, characterized in that the adhesive tape is removed together with the adhesive tape.
JP10857879A 1979-08-28 1979-08-28 Method of manufacturing printed circuit board Granted JPS5632799A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10857879A JPS5632799A (en) 1979-08-28 1979-08-28 Method of manufacturing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10857879A JPS5632799A (en) 1979-08-28 1979-08-28 Method of manufacturing printed circuit board

Publications (2)

Publication Number Publication Date
JPS5632799A JPS5632799A (en) 1981-04-02
JPH0122755B2 true JPH0122755B2 (en) 1989-04-27

Family

ID=14488359

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10857879A Granted JPS5632799A (en) 1979-08-28 1979-08-28 Method of manufacturing printed circuit board

Country Status (1)

Country Link
JP (1) JPS5632799A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006237088A (en) * 2005-02-22 2006-09-07 Sumitomo Metal Electronics Devices Inc Method of manufacturing multilayer printed wiring board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5524711B2 (en) * 1974-03-27 1980-07-01

Also Published As

Publication number Publication date
JPS5632799A (en) 1981-04-02

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