JPH01226796A - Treatment of indium-phosphorus substrate - Google Patents
Treatment of indium-phosphorus substrateInfo
- Publication number
- JPH01226796A JPH01226796A JP5228488A JP5228488A JPH01226796A JP H01226796 A JPH01226796 A JP H01226796A JP 5228488 A JP5228488 A JP 5228488A JP 5228488 A JP5228488 A JP 5228488A JP H01226796 A JPH01226796 A JP H01226796A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- crystal growth
- growth layer
- impurities
- inp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 71
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 title claims description 53
- 239000013078 crystal Substances 0.000 claims abstract description 47
- 238000005530 etching Methods 0.000 claims abstract description 10
- 238000000137 annealing Methods 0.000 claims abstract description 9
- 150000001875 compounds Chemical class 0.000 claims abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 7
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 18
- 238000012545 processing Methods 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 2
- 229910000673 Indium arsenide Inorganic materials 0.000 claims 1
- AJGDITRVXRPLBY-UHFFFAOYSA-N aluminum indium Chemical group [Al].[In] AJGDITRVXRPLBY-UHFFFAOYSA-N 0.000 claims 1
- 239000012535 impurity Substances 0.000 abstract description 28
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 229910052742 iron Inorganic materials 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 37
- 239000007789 gas Substances 0.000 description 11
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 5
- 239000003960 organic solvent Substances 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 125000002524 organometallic group Chemical group 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000002156 adsorbate Substances 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000011149 sulphuric acid Nutrition 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はインジウムリン（ＩｎＰ）基板の処理方法に関
するもので、特にＩｎＰ基板上に、エピタキシャル成長
などにより結晶成長層を形成する際の前処理工程におい
て使用される。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for processing an indium phosphide (InP) substrate, and in particular, a pretreatment step when forming a crystal growth layer on an InP substrate by epitaxial growth or the like. used in
従来、結晶成長前のＩｎＰ基板の前処理は、次のように
してなされてきた。まず、ＩｎＰ基板を用意し、これを
有機溶剤などによって洗浄する。Conventionally, pretreatment of an InP substrate before crystal growth has been performed as follows. First, an InP substrate is prepared and cleaned with an organic solvent or the like.
次に、これを硫酸系エッチャント（Ｈ２ＳＯ４゜ＨＯ，
Ｈ２Ｏの混合液）で薄くエツチングし、ＩｎＰ基板の表
面に吸着している炭素（Ｃ）、酸素（０）、シリコン（
Ｓｌ）などの吸着物を除去する。Next, apply this to a sulfuric acid-based etchant (H2SO4°HO,
The carbon (C), oxygen (0), and silicon (
Remove adsorbates such as Sl).
このような前処理が施されたＩｎＰ基板１は、第２図の
ようなエピタキシャル成長装置にセットされる。この装
置の容器２にはガス導入管３〜７が配設され、また排気
口８が設けられており、ガス導入管３および４からイン
ジウム（Ｉｎ ）を含むガスとリン（Ｐ）を含むガスが
導入される。すると、所定の温度条件下でＩｎＰがＩｎ
Ｐ基板１上に結晶成長し、結晶成長層５が形成されるこ
とになる。The InP substrate 1 subjected to such pretreatment is set in an epitaxial growth apparatus as shown in FIG. A container 2 of this device is provided with gas inlet pipes 3 to 7 and is also provided with an exhaust port 8, and from the gas inlet pipes 3 and 4, gas containing indium (In) and gas containing phosphorus (P) are supplied. will be introduced. Then, under predetermined temperature conditions, InP becomes In
Crystal growth occurs on the P substrate 1, and a crystal growth layer 5 is formed.
ところが、このようなＩｎＰ基板１中に不純物が含まれ
ていると、これが結晶成長温度へ昇温中および成長中に
ＩｎＰ基板１の表面に集中し、結果としてＩｎＰ基板１
と結晶成長層９の境界およびその近傍の不純物濃度が高
くなってしまう。この不純物は、結晶成長層９に形成さ
れるデバイスの特性を劣化させてしまう。However, if such an impurity is contained in the InP substrate 1, it will concentrate on the surface of the InP substrate 1 during the temperature rise to the crystal growth temperature and during growth, and as a result, the InP substrate 1
Therefore, the impurity concentration at the boundary of the crystal growth layer 9 and its vicinity becomes high. This impurity deteriorates the characteristics of a device formed in the crystal growth layer 9.
そこで本発明は、ＩｎＰ基板上に結晶成長層を形成した
ときにも、その境界近傍に不純物が集中しないようにし
たＩｎＰ基板の処理方法を提供することを目的とする。SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for processing an InP substrate that prevents impurities from concentrating near the boundaries even when a crystal growth layer is formed on the InP substrate.
本発明に係るＩｎＰ基板の処理方法は、ＩｎＰからなる
基板上に、リン（Ｐ）を含まない化合物半導体からなる
結晶成長層を堆積する第１の工程と、結晶成長層を堆積
した基板をアニールする第２の工程と、結晶成長層を選
択的に除去して基板を露出する第３の工程と、基板の露
出面を薄（エツチングする第４の工程とを備えることを
特徴とする。The method for processing an InP substrate according to the present invention includes a first step of depositing a crystal growth layer made of a compound semiconductor that does not contain phosphorus (P) on a substrate made of InP, and annealing the substrate on which the crystal growth layer is deposited. A third step of selectively removing the crystal growth layer to expose the substrate, and a fourth step of etching the exposed surface of the substrate.
本発明によれば、ＩｎＰ基板に含まれる不純物はあらか
じめ結晶成長層および基板の表面に偏析させられ、これ
は結晶成長層の選択除去および基板表面の薄いエツチン
グにより除去されることになる。According to the present invention, impurities contained in the InP substrate are segregated in advance into the crystal growth layer and the surface of the substrate, and are removed by selectively removing the crystal growth layer and thinly etching the substrate surface.
以下、添付図面の第１図および第２図を参照して、本発
明の一実施例を説明する。なお、図面の説明において同
一要素には同一符号を付し、重複する説明を省略する。Hereinafter, one embodiment of the present invention will be described with reference to FIGS. 1 and 2 of the accompanying drawings. In addition, in the description of the drawings, the same elements are given the same reference numerals, and redundant description will be omitted.
第１図は一実施例に係るＩｎＰ基板の処理方法を示すた
めの、工程別の断面図である。まず、ＩｎＰ基板１を用
意し、従来方法と同様に有機溶剤等による洗浄を行なう
。次に、このＩｎＰ基板１を第２図と同様のエピタキシ
ャル成長装置にセットし、原料としてＩｎを含むガス、
ガリウム（Ｇａ ）を含むガスおよびヒ素（Ａｓ ）を
含むガスをそれぞれガス導入管３，６．５より導入し、
所定温度にセットする。すると、第１図（ａ）に示すよ
うに、ＩｎＰ基板１上にＧａＩｎＡｓからなる結晶成長
層１０が形成されることになる。このとき、エピタキシ
ャル成長は高温（例えば６００℃）の条件下でなされる
ため、ＩｎＰ基板１中の不純物（Ｓｉ、Ｆｅなど）は拡
散し、表面に近い部分のものはＩｎＰ基板１と結晶成長
層１０の間の界面１１近傍に集中してくることになる。FIG. 1 is a cross-sectional view of each process to show a method of processing an InP substrate according to an embodiment. First, an InP substrate 1 is prepared and cleaned with an organic solvent or the like in the same manner as in the conventional method. Next, this InP substrate 1 is set in an epitaxial growth apparatus similar to that shown in FIG.
A gas containing gallium (Ga) and a gas containing arsenic (As) are introduced through gas introduction pipes 3 and 6.5, respectively,
Set to the specified temperature. Then, as shown in FIG. 1(a), a crystal growth layer 10 made of GaInAs is formed on the InP substrate 1. At this time, since the epitaxial growth is performed under high temperature conditions (for example, 600°C), impurities (Si, Fe, etc.) in the InP substrate 1 are diffused, and the impurities near the surface are mixed with the InP substrate 1 and the crystal growth layer 1. They will be concentrated near the interface 11 between them.
次に、結晶成長層１０が所望の厚さ（例えば０．２μｍ
）になったら原料ガスの供給を停止し、所定時間（例え
ば３０分）のアニールを行なう。Next, the crystal growth layer 10 is grown to a desired thickness (for example, 0.2 μm).
), the supply of raw material gas is stopped and annealing is performed for a predetermined time (for example, 30 minutes).
すると、不純物の拡散は更に進行してＩｎＰ基板１と結
晶成長層１０の界面１１により多くの不純物が集中し、
その一部は結晶成長層１０中に拡散していく（第１図（
ｂ）図示）。このようなアニールによる不純物の積極的
な拡散により、界面１１に集中した分だけＩｎＰ基板１
中の不純物は、特にＩｎＰ基板１の表面に近い部分はど
少なくなる。Then, the diffusion of impurities further progresses, and more impurities are concentrated at the interface 11 between the InP substrate 1 and the crystal growth layer 10.
A part of it diffuses into the crystal growth layer 10 (see Fig. 1 (
b) As shown). Due to the active diffusion of impurities due to such annealing, the InP substrate 1 is concentrated to the extent that the impurities are concentrated at the interface 11.
The amount of impurities in the InP substrate 1 is particularly reduced near the surface of the InP substrate 1.
次に、アニールを停止して１ｎＰ基板１および結晶成長
層１０を冷却し、結晶成長層１０のみを選択的にエツチ
ングする。すると、ＩｎＰ基板１上の結晶成長層１０は
除去され、不純物を多く含んだＩｎＰ基板１表面が露出
することになる。このとき、不純物はＩｎＰ基板１表面
の深さｔ （第１図（Ｃ）図示）の部分に集中している
。そこで、この厚さｔだけ１ｎＰ基板１をエツチングに
より除去すると、第１図（ｄ）のように、表面付近にお
いて不純物の少ないＩｎＰ基板１が得られることになる
。従って、その後にエピタキシャル成長層を形成しても
、再び不純物が集中することは少なくなる。Next, the annealing is stopped, the 1nP substrate 1 and the crystal growth layer 10 are cooled, and only the crystal growth layer 10 is selectively etched. Then, the crystal growth layer 10 on the InP substrate 1 is removed, and the surface of the InP substrate 1 containing many impurities is exposed. At this time, the impurities are concentrated at a depth t (shown in FIG. 1C) on the surface of the InP substrate 1. Therefore, if the 1nP substrate 1 is removed by etching by this thickness t, an InP substrate 1 with few impurities near the surface will be obtained as shown in FIG. 1(d). Therefore, even if an epitaxial growth layer is formed thereafter, impurities are less likely to be concentrated again.
上記の工程に用いられる結晶成長層１０の材料としては
、例えばＧａ１ｎＡｓやＡｊＪＩｎＡｓにょうなＰを含
まない化合物半導体であることが好ましい。これらによ
れば、アニールなどの過程で結晶成長層１０からＡｓが
脱離するのを防止するために一定比上のＡｓの蒸気圧下
に置けば、表面が荒れたりすることがほとんどない。ま
たＩｎＰ基板１との間で結晶成長層１０を選択的に除去
することが可能であるので、たとえ結晶成長層１０の表
面が荒れたとしてもＩｎＰ基板１のオーバーエツチング
後の表面は滑かになる。さらに、これら材料は１ｎＰ基
板１とよく格子整合するので、ＩｎＰ基板１に偏析した
不純物は結晶成長層１０中によく拡散していき、ＩｎＰ
基板１中の不純物を減少させるのに適している。The material of the crystal growth layer 10 used in the above steps is preferably a compound semiconductor that does not contain P, such as Ga1nAs or AjJInAs. According to these, if the crystal growth layer 10 is placed under a vapor pressure of As above a certain ratio in order to prevent As from being desorbed from the crystal growth layer 10 during annealing or the like, the surface will hardly become rough. Furthermore, since it is possible to selectively remove the crystal growth layer 10 between the InP substrate 1 and the InP substrate 1, even if the surface of the crystal growth layer 10 is rough, the surface of the InP substrate 1 after overetching will be smooth. Become. Furthermore, since these materials have good lattice matching with the 1nP substrate 1, impurities segregated in the InP substrate 1 are well diffused into the crystal growth layer 10, and the InP
It is suitable for reducing impurities in the substrate 1.
これに対し、結晶成長層１０としてＰを含むＩｎＰなど
を用いたときには、アニール工程において、結晶成長層
１０からＰが脱離するのを防止するために一定比上のＰ
の蒸気圧下に置かなければならないが、過剰なＰの蒸気
圧下ではＩｎＰに特有な物質移動（ｍａｓｓ ｔｒａｎ
ｓｐｏｒｔ）が生じ、結晶成長層１０の表面が荒れてし
まう。このため、ＩｎＰの結晶成長層１０の表面が荒れ
ないように、Ｐの最適な蒸気圧を決定するのが難しい。On the other hand, when InP containing P or the like is used as the crystal growth layer 10, in order to prevent P from being desorbed from the crystal growth layer 10 in the annealing process,
However, under the vapor pressure of excess P, mass transfer, which is characteristic of InP, occurs.
sport) occurs, and the surface of the crystal growth layer 10 becomes rough. Therefore, it is difficult to determine the optimum vapor pressure of P so that the surface of the InP crystal growth layer 10 is not roughened.
また表面の荒れている結晶成長層１０を除去して、Ｉｎ
Ｐ基板１をオーバーエツチングした場合ＩｎＰ基板１表
面も荒れてしまい、その後のエピタキシャル成長工程（
本工程）にも支障が生じることになる。In addition, the crystal growth layer 10 with a rough surface is removed, and the In
If the P substrate 1 is over-etched, the surface of the InP substrate 1 will also become rough, and the subsequent epitaxial growth process (
This will also cause problems in this process.
次に、本発明の詳細な説明する。Next, the present invention will be explained in detail.
まず、２インチ径のＩｎＰウェーハを用意し、有機溶剤
により洗浄する。次に、このＩｎＰつ工−ハを有機金属
気相成長装置にセットし、Ｉｎを含むガス、Ｇａを含む
ガスおよびＡｓを含むガスを導入し、６００℃程度の温
度で反応させる。すると、ＩｎＰｎ上ウェーハ上ａ１ｎ
Ａｓがエピタキシャル成長されるので、０．２μｍ程度
の厚さになったところで反応を停止させる。その後、引
き続いて６００℃程度の一定温度条件下で放置し、３０
分間のアニールを行なう。First, a 2-inch diameter InP wafer is prepared and cleaned with an organic solvent. Next, this InP reactor is set in a metal organic vapor phase growth apparatus, and a gas containing In, a gas containing Ga, and a gas containing As are introduced and reacted at a temperature of about 600°C. Then, a1n on the InPn wafer
Since As is epitaxially grown, the reaction is stopped when the thickness reaches about 0.2 μm. After that, it was left to stand at a constant temperature of about 600℃ for 30 minutes.
Anneal for 1 minute.
次に、ＩｎＰウェーハを十分に冷却し、有機金属気相成
長装置から取り出してＧａ１ｎＡｓのエツチングを行な
う。このとき、エッチャントとしてリン酸系エッチャン
ト（ＨＰＯ，Ｈｏ。Next, the InP wafer is sufficiently cooled, taken out from the organometallic vapor phase epitaxy apparatus, and subjected to Ga1nAs etching. At this time, a phosphoric acid etchant (HPO, Ho.
Ｈ２Ｏの混合液）を用いるとＧａ１ｎＡｓのみが選択的
にエツチングされ、ＩｎＰウェーハの表面が露出する。When a mixed solution of H2O is used, only Ga1nAs is selectively etched and the surface of the InP wafer is exposed.
次に、ＩｎＰウェーハの表面を硫酸系エッチャント（Ｈ
ＳＯ，ＨＯ，ＨＯ
混合液）で軽くエツチングすると、不純物が集中した表
面層も除去される。Next, the surface of the InP wafer was coated with a sulfuric acid-based etchant (H
Light etching with a mixed solution of SO, HO, HO also removes the surface layer where impurities are concentrated.
このような本発明に係る前処理工程の後に、再びこれを
有機金属気相成長装置にセットし、例えばＩｎ Ｐ、Ｇ
ａ Ｉｎ Ａｓ 、ＡｆＩＩｎ Ａｓなどのエピタキシ
ャル成長層を形成したのちにＦＥＴなどのデバイスを形
成する。このようにすれば、ＩｎＰ基板と結晶成長層の
界面には再び不純物が集中するようなことはなくなり、
従って不純物によるデバイスの特性の悪化を防止するこ
とができる。After such a pretreatment step according to the present invention, this is set in the organometallic vapor phase growth apparatus again, and for example, InP, G
After forming an epitaxial growth layer of aInAs, AfIInAs, or the like, a device such as an FET is formed. In this way, impurities will not be concentrated again at the interface between the InP substrate and the crystal growth layer.
Therefore, deterioration of device characteristics due to impurities can be prevented.
本発明は上記実施例に限定されず、種々の変形が可能で
ある。The present invention is not limited to the above embodiments, and various modifications are possible.
例えば、結晶成長層１０の形成はエピタキシャル成長法
に限らず、Ｐを含まない結晶成長層１０を形成できる手
法であれば、いかなるものでもよい。また、エッチャン
トや温度条件などについても、適宜に変更できる。For example, the formation of the crystal growth layer 10 is not limited to the epitaxial growth method, but any method that can form the crystal growth layer 10 that does not contain P may be used. Further, the etchant, temperature conditions, etc. can also be changed as appropriate.
以上、詳細に説明した通り本発明では、ＩｎＰ基板に含
まれる不純物はあらかじめ表面に集中させられ、これは
結晶成長層の選択除去と基板表面の薄いエツチングによ
り除去されることになるので、このような前処理工程の
後にＩｎＰ基板上に結晶成長層を形成したときにも、そ
の境界近傍に不純物が集中しないようにすることができ
る。従って、本発明により前処理が施された１ｎＰ基板
を用いて電子デバイス、光デバイスを作製すれば、その
特性を極めて優れたものにすることができる。As explained above in detail, in the present invention, the impurities contained in the InP substrate are concentrated on the surface in advance, and are removed by selectively removing the crystal growth layer and thinly etching the substrate surface. Even when a crystal growth layer is formed on an InP substrate after a pretreatment process, impurities can be prevented from concentrating near the boundary. Therefore, if an electronic device or an optical device is manufactured using a 1nP substrate pretreated according to the present invention, the characteristics thereof can be made extremely excellent.
第１図は本発明の一実施例に係るＩｎＰ基板の処理方法
の工程別断面図、第２図はエピタキシャル成長法を説明
する図である。
１・・・ＩｎＰ基板、１０・・・結晶成長層、１１・・
・界面。
特許出願人 住友電気工業株式会社
代理人弁理士 長谷用 芳 樹木発明の処理工
程
第１図
本発明の処理工程
第１図
第２図FIG. 1 is a cross-sectional view showing each process of an InP substrate processing method according to an embodiment of the present invention, and FIG. 2 is a diagram illustrating an epitaxial growth method. DESCRIPTION OF SYMBOLS 1... InP substrate, 10... Crystal growth layer, 11...
·interface. Patent applicant: Sumitomo Electric Industries, Ltd. Patent attorney Yoshi Hase Processing process of the tree invention Figure 1 Processing process of the present invention Figure 1 Figure 2
Claims (1)
化合物半導体からなる結晶成長層を堆積する第１の工程
と、 前記結晶成長層を堆積した前記基板をアニールする第２
の工程と、 前記結晶成長層を選択的に除去して前記基板を露出する
第３の工程と、 前記基板の露出面を薄くエッチングする第４の工程と、 を備えることを特徴とするインジウムリン基板の処理方
法。 ２、前記結晶成長層が前記基板に格子整合していること
を特徴とする請求項１記載のインジウムリン基板の処理
方法。 ３、前記化合物半導体がガリウムインジウムヒ素である
ことを特徴とする請求項１記載のインジウムリン基板の
処理方法。 ４、前記化合物半導体がアルミニウムインジウムヒ素で
あることを特徴とする請求項１記載のインジウムリン基
板の処理方法。[Claims] 1. A first step of depositing a crystal growth layer made of a phosphorous-free compound semiconductor on a substrate made of indium phosphide, and a second step of annealing the substrate on which the crystal growth layer is deposited.
A third step of selectively removing the crystal growth layer to expose the substrate; and a fourth step of thinly etching the exposed surface of the substrate. How to treat the substrate. 2. The method for processing an indium phosphide substrate according to claim 1, wherein the crystal growth layer is lattice matched to the substrate. 3. The method for processing an indium phosphide substrate according to claim 1, wherein the compound semiconductor is gallium indium arsenide. 4. The method for processing an indium phosphide substrate according to claim 1, wherein the compound semiconductor is aluminum indium arsenide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5228488A JPH01226796A (en) | 1988-03-04 | 1988-03-04 | Treatment of indium-phosphorus substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5228488A JPH01226796A (en) | 1988-03-04 | 1988-03-04 | Treatment of indium-phosphorus substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01226796A true JPH01226796A (en) | 1989-09-11 |
Family
ID=12910497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5228488A Pending JPH01226796A (en) | 1988-03-04 | 1988-03-04 | Treatment of indium-phosphorus substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01226796A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996000979A1 (en) * | 1994-06-29 | 1996-01-11 | British Telecommunications Public Limited Company | Preparation of semiconductor substrates |
| US6036769A (en) * | 1994-06-29 | 2000-03-14 | British Telecommunications Public Limited Company | Preparation of semiconductor substrates |
-
1988
- 1988-03-04 JP JP5228488A patent/JPH01226796A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1996000979A1 (en) * | 1994-06-29 | 1996-01-11 | British Telecommunications Public Limited Company | Preparation of semiconductor substrates |
| US6036769A (en) * | 1994-06-29 | 2000-03-14 | British Telecommunications Public Limited Company | Preparation of semiconductor substrates |
| CN1092839C (en) * | 1994-06-29 | 2002-10-16 | 英国电讯公司 | Preparation of semiconductor substrates |
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