JPH01216274A - Lsi testing equipment - Google Patents

Abstract

PURPOSE:To set output timing offset values of a driver of all channels and a comparator to be same by constituting the title device so that a timing adjustment of each channel can be executed, based on a result of timing measurement in a standard measuring system. CONSTITUTION:At the time of bringing an LSI testing device to skew adjustment, a driver 3 and an input of an output comparator 4 are detached from a changeover switch 1 by operating a changeover switch 6, and also, they are connected mutually and connected to a measuring electrode 7. A standard measuring system 8 selects arbitrarily the measuring electrode and measures a timing of its signal waveform. Subsequently, based on the result of measurement of this timing, timing of timing adjusting circuits 2, 5 of each channel are adjusted. In such a way, a timing offset value of an output signal in the driver 3 of all channels and a timing offset value of a timing measurement in the comparator 4 can be set to the same.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art (Fig. 6) Problems to be Solved by the Invention Examples of Means and Actions for Solving the Problems (Figs. 1 to 5) ) Effects of the invention [Summary] This invention relates to a device for testing LS, 1, which adjusts the timing of the input signal of the LSI under test with the aim of reducing the skew between each channel in a multi-channel LSI test device. a driver for adjusting the level of the input signal of the LSI under test; a comparator for identifying the level of the output signal of the LSI under test; and means for setting the timing of the strobe signal that defines the timing of the identification signal of the comparator. In an LSI test equipment equipped with a plurality of channels each having a switch that switches and connects the input pin of the LSI under test and the output of the driver or the output pin of the LSI under test and the input of the comparator, when adjusting the skew, the driver output and the comparator input and are disconnected from the changeover switch, connected to each other, and then connected to the measurement electrode.
Timing is set based on the measurement results of a standard measurement system that measures the timing of the signal waveform of each measurement electrode, and the timing offset values of the drivers and comparators of all channels are made the same.

[Industrial application field]

The present invention relates to an LSI testing device, and particularly to an LSI testing device having a large number of drivers and comparators.
This relates to I test equipment.

As LSIs become highly integrated, LSI test equipment needs to be equipped with a large number of measurement pins. Furthermore, as LSI speeds increase, it is necessary to have higher precision, especially with reduced skew between drivers and comparators.

In LSI test equipment, it is desired to be able to satisfy both the demand for a large number of pins and the demand for high precision.

[Conventional technology]

Figure 6 shows test channel 1 in the conventional 5SI test equipment.
5 shows the configuration of No. 5. In the figure, the test L
Only the configuration of one channel corresponding to one pin under test of SI (OUT) is shown. That is, when the pin under test of the LSI is an input pin, the selector switch 1 is switched to the C side, and the test clock is switched to the timing adjustment circuit 2.
The signal is input from the test pin IA to the DUT via the driver 3 and the pin under test. Also, when the pin under test is an output pin, selector switch 1 is switched to the d side, and the DUT
The output signal from the pin under test is applied to the comparator 4 via the test pin IA, and it is determined whether the voltage level at a certain timing is higher than the reference voltage or not, and an output is generated.

When adjusting the timing on the driver side in the test channel shown in FIG. 6, a separately prepared standard comparator with adjusted timing is used. That is, with the driver output connected to the input of the standard comparator, the delay time is adjusted in the timing adjustment circuit 2 consisting of a delay circuit or the like so that the clock standard comparator detects the signal at a predetermined timing.

Also, when adjusting the timing on the comparator side, use a standard driver whose timing has been adjusted, which is prepared in advance. That is, with the output of the standard driver connected to the comparator input, a delay time is set in a timing adjustment circuit 5 consisting of a delay circuit, etc., and a strobe signal is given to the comparator 4. The strobe signal is a timing signal that performs convergence. Therefore, by changing the timing of the strobe signal, the timing of the change in the input signal to the comparator is measured. Therefore, the above measurement for an input signal that changes at a predetermined timing using a standard driver The delay time of the timing adjustment circuit 5 is adjusted so that the value matches the reference value.

Perform such adjustment for each of the timing adjustment circuits 2.5, and when finished, connect the test pin IA to the pin under test of DOT, and if it is an input pin, give it a test input at a predetermined timing. DUT
can be brought to the required test state. Also, when it is an output pin, it is possible to know whether the output timing of the DUT is good or not based on the comparator output.

An actual LSI test device has, for example, several hundred such channels in response to the increase in the number of pins of an LSI.

[Problem to be solved by the invention]

Conventional LSI with test channels shown in Figure 6
If the number of test channels in the test equipment is very large, even if the high-precision standard measurement system shown in Figure 6 is used as the measurement system, it is difficult to perform high-precision measurements on all pins under test. It is impossible to do this.

In other words, when the number of test channels becomes very large, it is difficult to set the same operation timing for the driver and comparator of each channel due to variations in the electrical length of the wiring to the standard driver and standard comparator, or variations in adjustment. For example, in the case of a multi-pin LSI test device with about 500 pins, it is difficult to suppress the timing accuracy for all pins to less than a few hundred ps.

The present invention is intended to solve the problems of the prior art, and is aimed at solving the problems of the prior art.
Is it possible to adjust the timing for each channel's driver and comparator under the same conditions and with high accuracy in the test equipment? The purpose is to provide LSI test equipment.

[Means to solve the problem]

As shown in the embodiments of FIGS. 1 and 2, the present invention includes a timing adjusting means 2 for setting the timing of input signals to the LSI under test, and adjusting the waveform and level of the input signals to the LSI under test. Driver 3 and LSI under test
a comparator 4 that uses the output signal from the input signal as an input signal to identify the level and generates an output signal; a timing adjustment means 5 that sets the timing of the strobe signal that is the timing signal for this identification; In an LSI test equipment, which is equipped with a plurality of channels corresponding to each input/output pin of the LSI under test, a changeover switch 1 is connected to the output pin and a changeover switch 1 is connected to the input of the comparator 2, and a changeover switch 6 is installed for each channel. At the same time, by providing a standard measurement system 8 and setting the timing in the timing adjustment means 2 and 5 of each channel based on the timing measurement results in the standard measurement system i, the output signals in the drivers 3 of all channels are adjusted. This is to make the timing offset value of the comparator the same as the timing offset value of the current timing measurement by the comparator.

Here, the changeover switch 6 is used to disconnect the output of the driver 3 and the input of the comparator 4 from the changeover switch 1, and connect them to each other and the measurement electrode 7 when adjusting the skew of the LSI testing apparatus.

Further, the standard measurement system 10 is one in which each measurement electrode 7 is arbitrarily selected and the timing of the signal waveform is measured with high precision.

[For production]

A changeover switch 1 is provided corresponding to a plurality of pins under test of the LSI under test, and the timing of an input signal to the LSI under test is adjusted via a timing adjustment means 2 to adjust the waveform and level of the input signal to the input pin. Adjust it via driver 3 and connect it to the input pin of the LSI under test.
An LSI testing device that identifies the voltage level of an output signal from an output pin at a timing specified by a strobe signal via a comparator 4, generates an output signal, and adjusts the timing of the strobe signal via a timing adjustment means 5. In order to adjust the skew between the driver and comparator between each channel of this LSI test equipment, a changeover switch 6 is provided for each channel to separate the output of the driver 3 and the input of the comparator 4 from the changeover switch 1, and to disconnect them from each other. The standard measurement system 8 connects each measurement electrode 7 to the measurement electrode 7.
is arbitrarily selected and the timing of the signal waveform is measured with high precision. Based on the timing measurement results in the standard measurement system 8, the timing settings in the timing adjustment means 2 and 5 of each channel are performed, so that the timing offset value of the output signal in the driver 3 of all channels and the current timing of the comparator are set. It becomes possible to make the measurement timing offset value the same.

〔Example〕

FIG. 1 shows the configuration of each test channel of an LSI test device which is an embodiment of the present invention. The same parts as in FIG. 6 are designated by the same numbers, '6 is a changeover switch, and 7 is a It is a measurement electrode.

When testing the DUT, the selector switch 6 is set to side a.
In this state, it has the same configuration as a conventional LSI testing device and can operate in the same manner as a conventional device.
On the other hand, when adjusting the timing of the LSI test equipment, the selector switch 6 is set to the b side. In this case, driver 3 and comparator 4 are not connected to the DUT, and the output of driver 3 is connected to the input of comparator 4 and measurement electrode 7. The standard measurement system connected to 7 makes it possible to measure with high precision.

FIG. 2 shows the overall configuration of an LSI test device according to an embodiment of the present invention, and only the configuration corresponding to the two channels indicated by subscripts 1.2 is shown, and the components numbered with each subscript are These are equivalent to the components with numbers without subscripts in FIG. Note that the measurement electrodes 71 and 7□ are each EO.
It is assumed that it is integrated with a measuring section made of a crystal or the like. Reference numeral 8 denotes a standard measurement system, which has the same configuration as that explained in FIG. 9 is the LSI under test (DUT
) is mounted on the performance board IOA, and the pin to be tested is the test pin IA.

, and the pin under test j is connected to the test pin IAZ.

When testing the DUT 9, the a side is selected for the changeover switches 6I and 6□, and the C or d side is selected for the changeover switches 1+ and 1□ depending on whether the pin under test is an input pin or an output pin. The same applies to each changeover switch connected to all other pins under test of the DUT 9 (not shown).

In this state, similarly to conventional LSI test equipment, the driver 3. ．． 3. A test clock can be input to the DUT via the . Also, the strobe setting timing and timing adjustment circuit 51
．． By performing identification using the comparators 4+ and 4z at the timing determined by the adjustment of 5□, it is possible to determine whether the DUT output passes or fails. In this case, input can be given to the DUT at any timing by changing the clock setting timing externally.
Alternatively, the output timing of the DUT can be measured by checking the presence or absence of the cosciparator output while changing the strobe setting timing.

When adjusting the timing of the LSI test equipment, the b side is selected for each selector switch 61, 6□, and each driver 33
, 3□ outputs each comparator 4++4□ to measuring electrode 7
1. Connected to 7□. In this state, in the standard measurement system 8, the measurement electrode 7. ．． The timing adjustment circuits 23 and 2□ are set by scanning the measuring section including 7t and performing timing measurement with high accuracy, and the driver 31
．． The output timing of 3□ can be adjusted. Also, the driver 31.3 whose timing is adjusted in this way
The timing adjustment circuit 51.5□ can be adjusted by inputting the output of □ to the comparator 41.4□ and measuring the timing using the comparator 41.4t.

In order to maintain the same timing setting conditions for each channel in the configuration shown in Figure 2, the electrical length of the line connecting the driver and comparator and the branch position for the measurement electrode are accurate for all pins. must be the same. Further, it is desirable that the line length between the branch point and the measurement electrode be as short as possible.

FIG. 3 shows the configuration of a standard measurement system using a non-contact probe according to the present invention. In the figure, reference numeral 11 denotes a measurement electrode that comes into contact with the pin to be measured, and is an electro-optical (E
O) Crystal 12 and transparent electrode 13 are integrated into the measuring section 1
0 is formed.

14 is a high-precision delay circuit that performs timing adjustment to delay the input clock by a required time based on delay data. A driver 15 drives a laser diode (LD) 16 in accordance with a timing-adjusted input clock, so that the LD 16 emits light. The light from the LD 16 passes through the beam splitter 17 and becomes linearly polarized light.
The light is converted into circularly polarized light through a four-wavelength (λ/4) plate 18, and enters the measurement unit 10 through a deflection means 19 made of a mirror or the like.

At this time, the measurement electrode! When a voltage is applied between the EO crystal 12 and the grounded transparent electrode 13, the EO crystal 12 exhibits birefringence. Therefore, when a laser beam is incident on the measuring section, reflected light is generated within the EO crystal 12.

This reflected light passes through the transparent electrode 13 and the deflection means 19, and then passes through the λ/4
The output light enters the temporary 18 and is converted into elliptically polarized light, and the output light is reflected at the internal boundary surface of the beam splitter 17, changes its direction by 90'', enters the photodiode 20, is converted into an electrical signal, and passes through the amplifier 21. After being amplified, it is converted into a digital signal of a predetermined number of bits by an analog-to-digital converter (ADC) 22 to produce output data.

At this time, the high-precision delay circuit 14 is used to change the timing of the laser beam that irradiates the measuring section according to the delay data, and the clock with a fixed delay is applied as a strobe signal to the ADC 22 to perform analog-to-digital conversion. If the output of the ADC 22 is used to determine the voltage waveform of the input signal at the pin under test that is in contact with the measurement electrode 11, by detecting the point where the voltage on the rising edge of this waveform matches the reference voltage. , signal timing measurements can be made. A standard measurement system using such a non-contact probe is described in detail in Japanese Patent Application No. 183852/1983.

FIG. 4 explains the relationship between the generation of output data and delayed data, and the timing at which the output data (voltage) matches a certain threshold value is determined.

In this way, with the standard measurement system shown in Figure 3, the timing of the signal at the pin under test can be measured without contacting the pin under test and without using a measurement cable. Highly accurate timing measurement can be performed without being affected by impedance, capacitance of the measurement terminal, etc.

In this case, the measuring section 10 is arranged in multiple stages corresponding to the input/output pins of the DUT, and the above-mentioned measurements are performed for each input/output pin while scanning each measuring section with a laser beam via the deflection means 19. It is configured so that it can be done.

In addition, in a standard measurement system that measures the timing of the signal waveform at each measurement electrode, in order to make the optical path length of the laser beam the same for all measurement electrodes, the measurement electrode is placed around the circumference of the inner wall of the cylindrical casing in the LSI test equipment. The central axis thereof is aligned with the rotation axis of the deflection means 19.

The laser pulse irradiation timing for sampling the voltage waveform on the measurement electrode is controlled by delaying the clock with high precision by the high precision delay circuit 14 as described above.

FIG. 5 is a flowchart showing the procedure for timing adjustment in each driver and comparator using the LSI testing apparatus of the present invention.

Initially, selector switch SWI for all pins (Fig. 1, 2
Changeover switch 6 in the diagram? , 6t, 6g) are set to the b side, and the pulse generation timings of the drivers of all pins are set to the same reference value (step S1).

Step S to irradiate the measurement electrode of each pin with a laser pulse.
2) Measure the waveform timing with high precision using a standard measurement system (step 33). The driver's clock timing is adjusted by the driver's timing adjustment circuit until the measured value Ts at this time becomes the sum of the driver's timing setting value and a fixed offset value corresponding to the electrical length between the driver and the measurement electrode. (Steps S4 and S5).

Next, the comparator measures the edge timing north of the driver (step S6), and the measured value Tc
is the measured value Ts obtained for the driver using the standard measurement system.
Then, the strobe timing of the comparator is adjusted by the timing adjustment circuit on the comparator side until the sum of the constant offset value corresponding to the electrical length between the measurement electrode and the comparator is reached (S7 and S8).

By performing the above operations on all pins, the skew between the driver and comparator between each pin is reduced. Further, by performing the above adjustment when a temperature change exceeding an allowable value is detected, skew due to temperature change is also reduced.

In this way, when the timing adjustment is completed, the changeover switch SW1 of all pins is set to the a side, and the timing of the driver of each pin is returned to the original setting value, and the DUT is tested.

〔Effect of the invention〕

As explained above, according to the present invention, in an LSI test device equipped with multiple channels of drivers and comparators, the skew of drivers and comparators between each channel is reduced, and LSI tests can be performed with high accuracy. become able to.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the configuration of a test channel in a practical example of the present invention, Figure 2 is a diagram showing the overall configuration of an example of the present invention, and Figure 3 is a diagram showing a standard measurement system using a non-contact probe. FIG. 4 is a diagram showing the relationship between output data generation and delay data. FIG. 5 is a flowchart showing the timing adjustment procedure in the LSI test equipment of the present invention. FIG. 6 is a diagram showing the conventional test channel. FIG. 1.1r, Ig...Selector switch IA, IA+, IAx...Test pin 2.2. ．． 2
□...Timing adjustment circuit 3.3. ．． 3□...Driver 4.41.4□...Comparator 5.5+, 5g...Timing adjustment circuit 6.6+
, 6□... Selector switch 7.7. ,? □...Measuring electrode 8...Standard measurement system 9...LSI under test (DUT) Patent applicant Fujitsu Ltd. Agent Patent attorney Kugobe Tamamushi (1 other person) Implementation of this defense Example 1: Figure 9 shows the configuration of a test channel. Figure 9 shows the overall configuration of an embodiment of the present invention. Figure 9 shows the configuration of a standard measurement system using a non-contact probe.
figure

Claims (3)

[Claims] (1) Timing adjustment means (2) that sets the timing of input signals to the LSI under test, a driver (3) that adjusts the waveform and level of the input signals to the LSI under test, and output from the LSI under test. A comparator (4) that receives a signal as input, identifies the level, and generates an output signal; and a timing adjustment means (4) that sets the timing of a strobe signal that defines the timing of the identification signal of the comparator.
5), and the driver (3) is connected to the input pin of the LSI under test.
), and the output pin is connected to the output of the comparator (5).
) and the selector switch (1) that connects the input of the LS under test.
In an LSI test equipment that has multiple channels corresponding to each input/output pin of I, when adjusting the skew of the LSI test equipment, the driver (3
) and the input of the comparator (4) from the changeover switch (1) and connect them to each other and the measurement electrode (7), and It is equipped with a standard measurement system (8) that arbitrarily selects a measurement electrode (7) and measures the timing of its signal waveform, and includes timing adjustment means (2) for each channel based on the timing measurement results in the standard measurement system (8). ) and (5), the timing offset value of the output signal in the driver (3) of all channels and the timing offset value of the timing measurement in the comparator (5) are made the same. L to do
SI test equipment. (2) The standard measurement system (8) includes an electro-optic crystal in contact with each measurement electrode (7), and irradiates the electro-optic crystal with a laser beam from the side opposite to the measurement electrode (7). 2. The LSI testing apparatus according to claim 1, wherein the voltage state of said measuring electrode (7) is detected by detecting birefringence induced within said crystal. (3) The LSI testing apparatus according to claim 2, wherein the optical path length of the laser beam that irradiates the electro-optic crystal is the same for each measurement electrode (7). .